root/drivers/usb/mtu3/mtu3.h

INCLUDED FROM

DEFINITIONS

1. dev_to_ssusb
2. gadget_to_mtu3
3. is_first_entry
4. to_mtu3_request
5. to_mtu3_ep
6. next_request
7. mtu3_writel
8. mtu3_readl
9. mtu3_setbits
10. mtu3_clrbits

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * mtu3.h - MediaTek USB3 DRD header
   4  *
   5  * Copyright (C) 2016 MediaTek Inc.
   6  *
   7  * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
   8  */
   9 
  10 #ifndef __MTU3_H__
  11 #define __MTU3_H__
  12 
  13 #include <linux/device.h>
  14 #include <linux/dmapool.h>
  15 #include <linux/extcon.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/phy/phy.h>
  19 #include <linux/regulator/consumer.h>
  20 #include <linux/usb.h>
  21 #include <linux/usb/ch9.h>
  22 #include <linux/usb/gadget.h>
  23 #include <linux/usb/otg.h>
  24 
  25 struct mtu3;
  26 struct mtu3_ep;
  27 struct mtu3_request;
  28 
  29 #include "mtu3_hw_regs.h"
  30 #include "mtu3_qmu.h"
  31 
  32 #define MU3D_EP_TXCR0(epnum)    (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
  33 #define MU3D_EP_TXCR1(epnum)    (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
  34 #define MU3D_EP_TXCR2(epnum)    (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
  35 
  36 #define MU3D_EP_RXCR0(epnum)    (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
  37 #define MU3D_EP_RXCR1(epnum)    (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
  38 #define MU3D_EP_RXCR2(epnum)    (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
  39 
  40 #define USB_QMU_TQHIAR(epnum)   (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
  41 #define USB_QMU_RQHIAR(epnum)   (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
  42 
  43 #define USB_QMU_RQCSR(epnum)    (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
  44 #define USB_QMU_RQSAR(epnum)    (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
  45 #define USB_QMU_RQCPR(epnum)    (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
  46 
  47 #define USB_QMU_TQCSR(epnum)    (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
  48 #define USB_QMU_TQSAR(epnum)    (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
  49 #define USB_QMU_TQCPR(epnum)    (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
  50 
  51 #define SSUSB_U3_CTRL(p)        (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
  52 #define SSUSB_U2_CTRL(p)        (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
  53 
  54 #define MTU3_DRIVER_NAME        "mtu3"
  55 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  56 
  57 #define MTU3_EP_ENABLED         BIT(0)
  58 #define MTU3_EP_STALL           BIT(1)
  59 #define MTU3_EP_WEDGE           BIT(2)
  60 #define MTU3_EP_BUSY            BIT(3)
  61 
  62 #define MTU3_U3_IP_SLOT_DEFAULT 2
  63 #define MTU3_U2_IP_SLOT_DEFAULT 1
  64 
  65 /**
  66  * IP TRUNK version
  67  * from 0x1003 version, USB3 Gen2 is supported, two changes affect driver:
  68  * 1. MAXPKT and MULTI bits layout of TXCSR1 and RXCSR1 are adjusted,
  69  *    but not backward compatible
  70  * 2. QMU extend buffer length supported
  71  */
  72 #define MTU3_TRUNK_VERS_1003    0x1003
  73 
  74 /**
  75  * Normally the device works on HS or SS, to simplify fifo management,
  76  * devide fifo into some 512B parts, use bitmap to manage it; And
  77  * 128 bits size of bitmap is large enough, that means it can manage
  78  * up to 64KB fifo size.
  79  * NOTE: MTU3_EP_FIFO_UNIT should be power of two
  80  */
  81 #define MTU3_EP_FIFO_UNIT               (1 << 9)
  82 #define MTU3_FIFO_BIT_SIZE              128
  83 #define MTU3_U2_IP_EP0_FIFO_SIZE        64
  84 
  85 /**
  86  * Maximum size of ep0 response buffer for ch9 requests,
  87  * the SET_SEL request uses 6 so far, and GET_STATUS is 2
  88  */
  89 #define EP0_RESPONSE_BUF  6
  90 
  91 /* device operated link and speed got from DEVICE_CONF register */
  92 enum mtu3_speed {
  93         MTU3_SPEED_INACTIVE = 0,
  94         MTU3_SPEED_FULL = 1,
  95         MTU3_SPEED_HIGH = 3,
  96         MTU3_SPEED_SUPER = 4,
  97         MTU3_SPEED_SUPER_PLUS = 5,
  98 };
  99 
 100 /**
 101  * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
 102  *              without data stage.
 103  * @MU3D_EP0_STATE_TX: IN data stage
 104  * @MU3D_EP0_STATE_RX: OUT data stage
 105  * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
 106  *              waits for its completion interrupt
 107  * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
 108  *              after receives a SETUP.
 109  */
 110 enum mtu3_g_ep0_state {
 111         MU3D_EP0_STATE_SETUP = 1,
 112         MU3D_EP0_STATE_TX,
 113         MU3D_EP0_STATE_RX,
 114         MU3D_EP0_STATE_TX_END,
 115         MU3D_EP0_STATE_STALL,
 116 };
 117 
 118 /**
 119  * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
 120  *              by IDPIN signal.
 121  * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
 122  *              IDPIN signal.
 123  * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
 124  */
 125 enum mtu3_dr_force_mode {
 126         MTU3_DR_FORCE_NONE = 0,
 127         MTU3_DR_FORCE_HOST,
 128         MTU3_DR_FORCE_DEVICE,
 129 };
 130 
 131 /**
 132  * @base: the base address of fifo
 133  * @limit: the bitmap size in bits
 134  * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
 135  */
 136 struct mtu3_fifo_info {
 137         u32 base;
 138         u32 limit;
 139         DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
 140 };
 141 
 142 /**
 143  * General Purpose Descriptor (GPD):
 144  *      The format of TX GPD is a little different from RX one.
 145  *      And the size of GPD is 16 bytes.
 146  *
 147  * @dw0_info:
 148  *      bit0: Hardware Own (HWO)
 149  *      bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
 150  *      bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
 151  *      bit6: [EL] Zero Length Packet (ZLP), moved from @dw3_info[29]
 152  *      bit7: Interrupt On Completion (IOC)
 153  *      bit[31:16]: ([EL] bit[31:12]) allow data buffer length (RX ONLY),
 154  *              the buffer length of the data to receive
 155  *      bit[23:16]: ([EL] bit[31:24]) extension address (TX ONLY),
 156  *              lower 4 bits are extension bits of @buffer,
 157  *              upper 4 bits are extension bits of @next_gpd
 158  * @next_gpd: Physical address of the next GPD
 159  * @buffer: Physical address of the data buffer
 160  * @dw3_info:
 161  *      bit[15:0]: ([EL] bit[19:0]) data buffer length,
 162  *              (TX): the buffer length of the data to transmit
 163  *              (RX): The total length of data received
 164  *      bit[23:16]: ([EL] bit[31:24]) extension address (RX ONLY),
 165  *              lower 4 bits are extension bits of @buffer,
 166  *              upper 4 bits are extension bits of @next_gpd
 167  *      bit29: ([EL] abandoned) Zero Length Packet (ZLP) (TX ONLY)
 168  */
 169 struct qmu_gpd {
 170         __le32 dw0_info;
 171         __le32 next_gpd;
 172         __le32 buffer;
 173         __le32 dw3_info;
 174 } __packed;
 175 
 176 /**
 177 * dma: physical base address of GPD segment
 178 * start: virtual base address of GPD segment
 179 * end: the last GPD element
 180 * enqueue: the first empty GPD to use
 181 * dequeue: the first completed GPD serviced by ISR
 182 * NOTE: the size of GPD ring should be >= 2
 183 */
 184 struct mtu3_gpd_ring {
 185         dma_addr_t dma;
 186         struct qmu_gpd *start;
 187         struct qmu_gpd *end;
 188         struct qmu_gpd *enqueue;
 189         struct qmu_gpd *dequeue;
 190 };
 191 
 192 /**
 193 * @vbus: vbus 5V used by host mode
 194 * @edev: external connector used to detect vbus and iddig changes
 195 * @vbus_nb: notifier for vbus detection
 196 * @vbus_work : work of vbus detection notifier, used to avoid sleep in
 197 *               notifier callback which is atomic context
 198 * @vbus_event : event of vbus detecion notifier
 199 * @id_nb : notifier for iddig(idpin) detection
 200 * @id_work : work of iddig detection notifier
 201 * @id_event : event of iddig detecion notifier
 202 * @role_sw : use USB Role Switch to support dual-role switch, can't use
 203 *               extcon at the same time, and extcon is deprecated.
 204 * @role_sw_used : true when the USB Role Switch is used.
 205 * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
 206 * @manual_drd_enabled: it's true when supports dual-role device by debugfs
 207 *               to switch host/device modes depending on user input.
 208 */
 209 struct otg_switch_mtk {
 210         struct regulator *vbus;
 211         struct extcon_dev *edev;
 212         struct notifier_block vbus_nb;
 213         struct work_struct vbus_work;
 214         unsigned long vbus_event;
 215         struct notifier_block id_nb;
 216         struct work_struct id_work;
 217         unsigned long id_event;
 218         struct usb_role_switch *role_sw;
 219         bool role_sw_used;
 220         bool is_u3_drd;
 221         bool manual_drd_enabled;
 222 };
 223 
 224 /**
 225  * @mac_base: register base address of device MAC, exclude xHCI's
 226  * @ippc_base: register base address of IP Power and Clock interface (IPPC)
 227  * @vusb33: usb3.3V shared by device/host IP
 228  * @sys_clk: system clock of mtu3, shared by device/host IP
 229  * @ref_clk: reference clock
 230  * @mcu_clk: mcu_bus_ck clock for AHB bus etc
 231  * @dma_clk: dma_bus_ck clock for AXI bus etc
 232  * @dr_mode: works in which mode:
 233  *              host only, device only or dual-role mode
 234  * @u2_ports: number of usb2.0 host ports
 235  * @u3_ports: number of usb3.0 host ports
 236  * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
 237  *              disable u3port0, bit1==1 to disable u3port1,... etc
 238  * @dbgfs_root: only used when supports manual dual-role switch via debugfs
 239  * @uwk_en: it's true when supports remote wakeup in host mode
 240  * @uwk: syscon including usb wakeup glue layer between SSUSB IP and SPM
 241  * @uwk_reg_base: the base address of the wakeup glue layer in @uwk
 242  * @uwk_vers: the version of the wakeup glue layer
 243  */
 244 struct ssusb_mtk {
 245         struct device *dev;
 246         struct mtu3 *u3d;
 247         void __iomem *mac_base;
 248         void __iomem *ippc_base;
 249         struct phy **phys;
 250         int num_phys;
 251         /* common power & clock */
 252         struct regulator *vusb33;
 253         struct clk *sys_clk;
 254         struct clk *ref_clk;
 255         struct clk *mcu_clk;
 256         struct clk *dma_clk;
 257         /* otg */
 258         struct otg_switch_mtk otg_switch;
 259         enum usb_dr_mode dr_mode;
 260         bool is_host;
 261         int u2_ports;
 262         int u3_ports;
 263         int u3p_dis_msk;
 264         struct dentry *dbgfs_root;
 265         /* usb wakeup for host mode */
 266         bool uwk_en;
 267         struct regmap *uwk;
 268         u32 uwk_reg_base;
 269         u32 uwk_vers;
 270 };
 271 
 272 /**
 273  * @fifo_size: it is (@slot + 1) * @fifo_seg_size
 274  * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
 275  */
 276 struct mtu3_ep {
 277         struct usb_ep ep;
 278         char name[12];
 279         struct mtu3 *mtu;
 280         u8 epnum;
 281         u8 type;
 282         u8 is_in;
 283         u16 maxp;
 284         int slot;
 285         u32 fifo_size;
 286         u32 fifo_addr;
 287         u32 fifo_seg_size;
 288         struct mtu3_fifo_info *fifo;
 289 
 290         struct list_head req_list;
 291         struct mtu3_gpd_ring gpd_ring;
 292         const struct usb_ss_ep_comp_descriptor *comp_desc;
 293         const struct usb_endpoint_descriptor *desc;
 294 
 295         int flags;
 296         u8 wedged;
 297         u8 busy;
 298 };
 299 
 300 struct mtu3_request {
 301         struct usb_request request;
 302         struct list_head list;
 303         struct mtu3_ep *mep;
 304         struct mtu3 *mtu;
 305         struct qmu_gpd *gpd;
 306         int epnum;
 307 };
 308 
 309 static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
 310 {
 311         return dev_get_drvdata(dev);
 312 }
 313 
 314 /**
 315  * struct mtu3 - device driver instance data.
 316  * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
 317  *              MTU3_U3_IP_SLOT_DEFAULT for U3 IP
 318  * @may_wakeup: means device's remote wakeup is enabled
 319  * @is_self_powered: is reported in device status and the config descriptor
 320  * @delayed_status: true when function drivers ask for delayed status
 321  * @gen2cp: compatible with USB3 Gen2 IP
 322  * @ep0_req: dummy request used while handling standard USB requests
 323  *              for GET_STATUS and SET_SEL
 324  * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
 325  */
 326 struct mtu3 {
 327         spinlock_t lock;
 328         struct ssusb_mtk *ssusb;
 329         struct device *dev;
 330         void __iomem *mac_base;
 331         void __iomem *ippc_base;
 332         int irq;
 333 
 334         struct mtu3_fifo_info tx_fifo;
 335         struct mtu3_fifo_info rx_fifo;
 336 
 337         struct mtu3_ep *ep_array;
 338         struct mtu3_ep *in_eps;
 339         struct mtu3_ep *out_eps;
 340         struct mtu3_ep *ep0;
 341         int num_eps;
 342         int slot;
 343         int active_ep;
 344 
 345         struct dma_pool *qmu_gpd_pool;
 346         enum mtu3_g_ep0_state ep0_state;
 347         struct usb_gadget g;    /* the gadget */
 348         struct usb_gadget_driver *gadget_driver;
 349         struct mtu3_request ep0_req;
 350         u8 setup_buf[EP0_RESPONSE_BUF];
 351         u32 max_speed;
 352 
 353         unsigned is_active:1;
 354         unsigned may_wakeup:1;
 355         unsigned is_self_powered:1;
 356         unsigned test_mode:1;
 357         unsigned softconnect:1;
 358         unsigned u1_enable:1;
 359         unsigned u2_enable:1;
 360         unsigned is_u3_ip:1;
 361         unsigned delayed_status:1;
 362         unsigned gen2cp:1;
 363 
 364         u8 address;
 365         u8 test_mode_nr;
 366         u32 hw_version;
 367 };
 368 
 369 static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
 370 {
 371         return container_of(g, struct mtu3, g);
 372 }
 373 
 374 static inline int is_first_entry(const struct list_head *list,
 375         const struct list_head *head)
 376 {
 377         return list_is_last(head, list);
 378 }
 379 
 380 static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
 381 {
 382         return req ? container_of(req, struct mtu3_request, request) : NULL;
 383 }
 384 
 385 static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
 386 {
 387         return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
 388 }
 389 
 390 static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
 391 {
 392         return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
 393                                         list);
 394 }
 395 
 396 static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
 397 {
 398         writel(data, base + offset);
 399 }
 400 
 401 static inline u32 mtu3_readl(void __iomem *base, u32 offset)
 402 {
 403         return readl(base + offset);
 404 }
 405 
 406 static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
 407 {
 408         void __iomem *addr = base + offset;
 409         u32 tmp = readl(addr);
 410 
 411         writel((tmp | (bits)), addr);
 412 }
 413 
 414 static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
 415 {
 416         void __iomem *addr = base + offset;
 417         u32 tmp = readl(addr);
 418 
 419         writel((tmp & ~(bits)), addr);
 420 }
 421 
 422 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
 423 struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
 424 void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
 425 void mtu3_req_complete(struct mtu3_ep *mep,
 426                 struct usb_request *req, int status);
 427 
 428 int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
 429                 int interval, int burst, int mult);
 430 void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
 431 void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
 432 void mtu3_ep0_setup(struct mtu3 *mtu);
 433 void mtu3_start(struct mtu3 *mtu);
 434 void mtu3_stop(struct mtu3 *mtu);
 435 void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
 436 
 437 int mtu3_gadget_setup(struct mtu3 *mtu);
 438 void mtu3_gadget_cleanup(struct mtu3 *mtu);
 439 void mtu3_gadget_reset(struct mtu3 *mtu);
 440 void mtu3_gadget_suspend(struct mtu3 *mtu);
 441 void mtu3_gadget_resume(struct mtu3 *mtu);
 442 void mtu3_gadget_disconnect(struct mtu3 *mtu);
 443 
 444 irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
 445 extern const struct usb_ep_ops mtu3_ep0_ops;
 446 
 447 #endif