This source file includes following definitions.
- xhci_intel_unregister_pdev
- xhci_create_intel_xhci_sw_pdev
- xhci_ext_cap_init
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8 #include <linux/platform_device.h>
9 #include <linux/property.h>
10 #include <linux/pci.h>
11 #include "xhci.h"
12
13 #define USB_SW_DRV_NAME "intel_xhci_usb_sw"
14 #define USB_SW_RESOURCE_SIZE 0x400
15
16 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
17
18 static const struct property_entry role_switch_props[] = {
19 PROPERTY_ENTRY_BOOL("sw_switch_disable"),
20 {},
21 };
22
23 static void xhci_intel_unregister_pdev(void *arg)
24 {
25 platform_device_unregister(arg);
26 }
27
28 static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset)
29 {
30 struct usb_hcd *hcd = xhci_to_hcd(xhci);
31 struct device *dev = hcd->self.controller;
32 struct platform_device *pdev;
33 struct pci_dev *pci = to_pci_dev(dev);
34 struct resource res = { 0, };
35 int ret;
36
37 pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE);
38 if (!pdev) {
39 xhci_err(xhci, "couldn't allocate %s platform device\n",
40 USB_SW_DRV_NAME);
41 return -ENOMEM;
42 }
43
44 res.start = hcd->rsrc_start + cap_offset;
45 res.end = res.start + USB_SW_RESOURCE_SIZE - 1;
46 res.name = USB_SW_DRV_NAME;
47 res.flags = IORESOURCE_MEM;
48
49 ret = platform_device_add_resources(pdev, &res, 1);
50 if (ret) {
51 dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n");
52 platform_device_put(pdev);
53 return ret;
54 }
55
56 if (pci->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
57 ret = platform_device_add_properties(pdev, role_switch_props);
58 if (ret) {
59 dev_err(dev, "failed to register device properties\n");
60 platform_device_put(pdev);
61 return ret;
62 }
63 }
64
65 pdev->dev.parent = dev;
66
67 ret = platform_device_add(pdev);
68 if (ret) {
69 dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n");
70 platform_device_put(pdev);
71 return ret;
72 }
73
74 ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev);
75 if (ret) {
76 dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n");
77 return ret;
78 }
79
80 return 0;
81 }
82
83 int xhci_ext_cap_init(struct xhci_hcd *xhci)
84 {
85 void __iomem *base = &xhci->cap_regs->hc_capbase;
86 u32 offset, val;
87 int ret;
88
89 offset = xhci_find_next_ext_cap(base, 0, 0);
90
91 while (offset) {
92 val = readl(base + offset);
93
94 switch (XHCI_EXT_CAPS_ID(val)) {
95 case XHCI_EXT_CAPS_VENDOR_INTEL:
96 if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) {
97 ret = xhci_create_intel_xhci_sw_pdev(xhci,
98 offset);
99 if (ret)
100 return ret;
101 }
102 break;
103 }
104 offset = xhci_find_next_ext_cap(base, offset, 0);
105 }
106
107 return 0;
108 }
109 EXPORT_SYMBOL_GPL(xhci_ext_cap_init);