This source file includes following definitions.
- phy_meson_gxl_usb2_init
- phy_meson_gxl_usb2_exit
- phy_meson_gxl_usb2_reset
- phy_meson_gxl_usb2_set_mode
- phy_meson_gxl_usb2_power_off
- phy_meson_gxl_usb2_power_on
- phy_meson_gxl_usb2_probe
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8 #include <linux/clk.h>
9 #include <linux/delay.h>
10 #include <linux/io.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13 #include <linux/regmap.h>
14 #include <linux/reset.h>
15 #include <linux/phy/phy.h>
16 #include <linux/platform_device.h>
17
18
19 #define U2P_R0 0x0
20 #define U2P_R0_BYPASS_SEL BIT(0)
21 #define U2P_R0_BYPASS_DM_EN BIT(1)
22 #define U2P_R0_BYPASS_DP_EN BIT(2)
23 #define U2P_R0_TXBITSTUFF_ENH BIT(3)
24 #define U2P_R0_TXBITSTUFF_EN BIT(4)
25 #define U2P_R0_DM_PULLDOWN BIT(5)
26 #define U2P_R0_DP_PULLDOWN BIT(6)
27 #define U2P_R0_DP_VBUS_VLD_EXT_SEL BIT(7)
28 #define U2P_R0_DP_VBUS_VLD_EXT BIT(8)
29 #define U2P_R0_ADP_PRB_EN BIT(9)
30 #define U2P_R0_ADP_DISCHARGE BIT(10)
31 #define U2P_R0_ADP_CHARGE BIT(11)
32 #define U2P_R0_DRV_VBUS BIT(12)
33 #define U2P_R0_ID_PULLUP BIT(13)
34 #define U2P_R0_LOOPBACK_EN_B BIT(14)
35 #define U2P_R0_OTG_DISABLE BIT(15)
36 #define U2P_R0_COMMON_ONN BIT(16)
37 #define U2P_R0_FSEL_MASK GENMASK(19, 17)
38 #define U2P_R0_REF_CLK_SEL_MASK GENMASK(21, 20)
39 #define U2P_R0_POWER_ON_RESET BIT(22)
40 #define U2P_R0_V_ATE_TEST_EN_B_MASK GENMASK(24, 23)
41 #define U2P_R0_ID_SET_ID_DQ BIT(25)
42 #define U2P_R0_ATE_RESET BIT(26)
43 #define U2P_R0_FSV_MINUS BIT(27)
44 #define U2P_R0_FSV_PLUS BIT(28)
45 #define U2P_R0_BYPASS_DM_DATA BIT(29)
46 #define U2P_R0_BYPASS_DP_DATA BIT(30)
47
48 #define U2P_R1 0x4
49 #define U2P_R1_BURN_IN_TEST BIT(0)
50 #define U2P_R1_ACA_ENABLE BIT(1)
51 #define U2P_R1_DCD_ENABLE BIT(2)
52 #define U2P_R1_VDAT_SRC_EN_B BIT(3)
53 #define U2P_R1_VDAT_DET_EN_B BIT(4)
54 #define U2P_R1_CHARGES_SEL BIT(5)
55 #define U2P_R1_TX_PREEMP_PULSE_TUNE BIT(6)
56 #define U2P_R1_TX_PREEMP_AMP_TUNE_MASK GENMASK(8, 7)
57 #define U2P_R1_TX_RES_TUNE_MASK GENMASK(10, 9)
58 #define U2P_R1_TX_RISE_TUNE_MASK GENMASK(12, 11)
59 #define U2P_R1_TX_VREF_TUNE_MASK GENMASK(16, 13)
60 #define U2P_R1_TX_FSLS_TUNE_MASK GENMASK(20, 17)
61 #define U2P_R1_TX_HSXV_TUNE_MASK GENMASK(22, 21)
62 #define U2P_R1_OTG_TUNE_MASK GENMASK(25, 23)
63 #define U2P_R1_SQRX_TUNE_MASK GENMASK(28, 26)
64 #define U2P_R1_COMP_DIS_TUNE_MASK GENMASK(31, 29)
65
66
67 #define U2P_R2 0x8
68 #define U2P_R2_TESTDATA_IN_MASK GENMASK(7, 0)
69 #define U2P_R2_TESTADDR_MASK GENMASK(11, 8)
70 #define U2P_R2_TESTDATA_OUT_SEL BIT(12)
71 #define U2P_R2_TESTCLK BIT(13)
72 #define U2P_R2_TESTDATA_OUT_MASK GENMASK(17, 14)
73 #define U2P_R2_ACA_PIN_RANGE_C BIT(18)
74 #define U2P_R2_ACA_PIN_RANGE_B BIT(19)
75 #define U2P_R2_ACA_PIN_RANGE_A BIT(20)
76 #define U2P_R2_ACA_PIN_GND BIT(21)
77 #define U2P_R2_ACA_PIN_FLOAT BIT(22)
78 #define U2P_R2_CHARGE_DETECT BIT(23)
79 #define U2P_R2_DEVICE_SESSION_VALID BIT(24)
80 #define U2P_R2_ADP_PROBE BIT(25)
81 #define U2P_R2_ADP_SENSE BIT(26)
82 #define U2P_R2_SESSION_END BIT(27)
83 #define U2P_R2_VBUS_VALID BIT(28)
84 #define U2P_R2_B_VALID BIT(29)
85 #define U2P_R2_A_VALID BIT(30)
86 #define U2P_R2_ID_DIG BIT(31)
87
88 #define U2P_R3 0xc
89
90 #define RESET_COMPLETE_TIME 500
91
92 struct phy_meson_gxl_usb2_priv {
93 struct regmap *regmap;
94 enum phy_mode mode;
95 int is_enabled;
96 struct clk *clk;
97 struct reset_control *reset;
98 };
99
100 static const struct regmap_config phy_meson_gxl_usb2_regmap_conf = {
101 .reg_bits = 8,
102 .val_bits = 32,
103 .reg_stride = 4,
104 .max_register = U2P_R3,
105 };
106
107 static int phy_meson_gxl_usb2_init(struct phy *phy)
108 {
109 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
110 int ret;
111
112 ret = reset_control_reset(priv->reset);
113 if (ret)
114 return ret;
115
116 ret = clk_prepare_enable(priv->clk);
117 if (ret)
118 return ret;
119
120 return 0;
121 }
122
123 static int phy_meson_gxl_usb2_exit(struct phy *phy)
124 {
125 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
126
127 clk_disable_unprepare(priv->clk);
128
129 return 0;
130 }
131
132 static int phy_meson_gxl_usb2_reset(struct phy *phy)
133 {
134 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
135
136 if (priv->is_enabled) {
137
138 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET,
139 U2P_R0_POWER_ON_RESET);
140 udelay(RESET_COMPLETE_TIME);
141 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET,
142 0);
143 udelay(RESET_COMPLETE_TIME);
144 }
145
146 return 0;
147 }
148
149 static int phy_meson_gxl_usb2_set_mode(struct phy *phy,
150 enum phy_mode mode, int submode)
151 {
152 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
153
154 switch (mode) {
155 case PHY_MODE_USB_HOST:
156 case PHY_MODE_USB_OTG:
157 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_DM_PULLDOWN,
158 U2P_R0_DM_PULLDOWN);
159 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_DP_PULLDOWN,
160 U2P_R0_DP_PULLDOWN);
161 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_ID_PULLUP, 0);
162 break;
163
164 case PHY_MODE_USB_DEVICE:
165 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_DM_PULLDOWN,
166 0);
167 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_DP_PULLDOWN,
168 0);
169 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_ID_PULLUP,
170 U2P_R0_ID_PULLUP);
171 break;
172
173 default:
174 return -EINVAL;
175 }
176
177 phy_meson_gxl_usb2_reset(phy);
178
179 priv->mode = mode;
180
181 return 0;
182 }
183
184 static int phy_meson_gxl_usb2_power_off(struct phy *phy)
185 {
186 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
187
188 priv->is_enabled = 0;
189
190
191 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET,
192 U2P_R0_POWER_ON_RESET);
193
194 return 0;
195 }
196
197 static int phy_meson_gxl_usb2_power_on(struct phy *phy)
198 {
199 struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
200 int ret;
201
202 priv->is_enabled = 1;
203
204
205 regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET, 0);
206
207 ret = phy_meson_gxl_usb2_set_mode(phy, priv->mode, 0);
208 if (ret) {
209 phy_meson_gxl_usb2_power_off(phy);
210
211 dev_err(&phy->dev, "Failed to initialize PHY with mode %d\n",
212 priv->mode);
213 return ret;
214 }
215
216 return 0;
217 }
218
219 static const struct phy_ops phy_meson_gxl_usb2_ops = {
220 .init = phy_meson_gxl_usb2_init,
221 .exit = phy_meson_gxl_usb2_exit,
222 .power_on = phy_meson_gxl_usb2_power_on,
223 .power_off = phy_meson_gxl_usb2_power_off,
224 .set_mode = phy_meson_gxl_usb2_set_mode,
225 .reset = phy_meson_gxl_usb2_reset,
226 .owner = THIS_MODULE,
227 };
228
229 static int phy_meson_gxl_usb2_probe(struct platform_device *pdev)
230 {
231 struct device *dev = &pdev->dev;
232 struct phy_provider *phy_provider;
233 struct resource *res;
234 struct phy_meson_gxl_usb2_priv *priv;
235 struct phy *phy;
236 void __iomem *base;
237 int ret;
238
239 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
240 if (!priv)
241 return -ENOMEM;
242
243 platform_set_drvdata(pdev, priv);
244
245 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
246 base = devm_ioremap_resource(dev, res);
247 if (IS_ERR(base))
248 return PTR_ERR(base);
249
250
251 priv->mode = PHY_MODE_USB_HOST;
252
253 priv->regmap = devm_regmap_init_mmio(dev, base,
254 &phy_meson_gxl_usb2_regmap_conf);
255 if (IS_ERR(priv->regmap))
256 return PTR_ERR(priv->regmap);
257
258 priv->clk = devm_clk_get_optional(dev, "phy");
259 if (IS_ERR(priv->clk))
260 return PTR_ERR(priv->clk);
261
262 priv->reset = devm_reset_control_get_optional_shared(dev, "phy");
263 if (IS_ERR(priv->reset))
264 return PTR_ERR(priv->reset);
265
266 phy = devm_phy_create(dev, NULL, &phy_meson_gxl_usb2_ops);
267 if (IS_ERR(phy)) {
268 ret = PTR_ERR(phy);
269 if (ret != -EPROBE_DEFER)
270 dev_err(dev, "failed to create PHY\n");
271
272 return ret;
273 }
274
275 phy_set_drvdata(phy, priv);
276
277 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
278
279 return PTR_ERR_OR_ZERO(phy_provider);
280 }
281
282 static const struct of_device_id phy_meson_gxl_usb2_of_match[] = {
283 { .compatible = "amlogic,meson-gxl-usb2-phy", },
284 { },
285 };
286 MODULE_DEVICE_TABLE(of, phy_meson_gxl_usb2_of_match);
287
288 static struct platform_driver phy_meson_gxl_usb2_driver = {
289 .probe = phy_meson_gxl_usb2_probe,
290 .driver = {
291 .name = "phy-meson-gxl-usb2",
292 .of_match_table = phy_meson_gxl_usb2_of_match,
293 },
294 };
295 module_platform_driver(phy_meson_gxl_usb2_driver);
296
297 MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
298 MODULE_DESCRIPTION("Meson GXL and GXM USB2 PHY driver");
299 MODULE_LICENSE("GPL v2");