This source file includes following definitions.
- host1x_debug_show_channel_cdma
- host1x_debug_show_channel_fifo
- host1x_debug_show_mlocks
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9 #include "../dev.h"
10 #include "../debug.h"
11 #include "../cdma.h"
12 #include "../channel.h"
13
14 static void host1x_debug_show_channel_cdma(struct host1x *host,
15 struct host1x_channel *ch,
16 struct output *o)
17 {
18 struct host1x_cdma *cdma = &ch->cdma;
19 u32 dmaput, dmaget, dmactrl;
20 u32 offset, class;
21 u32 ch_stat;
22
23 dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT);
24 dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET);
25 dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
26 offset = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_OFFSET);
27 class = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_CLASS);
28 ch_stat = host1x_ch_readl(ch, HOST1X_CHANNEL_CHANNELSTAT);
29
30 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev));
31
32 if (dmactrl & HOST1X_CHANNEL_DMACTRL_DMASTOP ||
33 !ch->cdma.push_buffer.mapped) {
34 host1x_debug_output(o, "inactive\n\n");
35 return;
36 }
37
38 if (class == HOST1X_CLASS_HOST1X && offset == HOST1X_UCLASS_WAIT_SYNCPT)
39 host1x_debug_output(o, "waiting on syncpt\n");
40 else
41 host1x_debug_output(o, "active class %02x, offset %04x\n",
42 class, offset);
43
44 host1x_debug_output(o, "DMAPUT %08x, DMAGET %08x, DMACTL %08x\n",
45 dmaput, dmaget, dmactrl);
46 host1x_debug_output(o, "CHANNELSTAT %02x\n", ch_stat);
47
48 show_channel_gathers(o, cdma);
49 host1x_debug_output(o, "\n");
50 }
51
52 static void host1x_debug_show_channel_fifo(struct host1x *host,
53 struct host1x_channel *ch,
54 struct output *o)
55 {
56 #if HOST1X_HW <= 6
57 u32 rd_ptr, wr_ptr, start, end;
58 u32 payload = INVALID_PAYLOAD;
59 unsigned int data_count = 0;
60 #endif
61 u32 val;
62
63 host1x_debug_output(o, "%u: fifo:\n", ch->id);
64
65 val = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDFIFO_STAT);
66 host1x_debug_output(o, "CMDFIFO_STAT %08x\n", val);
67 if (val & HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY) {
68 host1x_debug_output(o, "[empty]\n");
69 return;
70 }
71
72 val = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDFIFO_RDATA);
73 host1x_debug_output(o, "CMDFIFO_RDATA %08x\n", val);
74
75 #if HOST1X_HW <= 6
76
77 host1x_hypervisor_writel(host, 0x1, HOST1X_HV_ICG_EN_OVERRIDE);
78
79 val = 0;
80 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE;
81 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(ch->id);
82 host1x_hypervisor_writel(host, val, HOST1X_HV_CMDFIFO_PEEK_CTRL);
83
84 val = host1x_hypervisor_readl(host, HOST1X_HV_CMDFIFO_PEEK_PTRS);
85 rd_ptr = HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(val);
86 wr_ptr = HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(val);
87
88 val = host1x_hypervisor_readl(host, HOST1X_HV_CMDFIFO_SETUP(ch->id));
89 start = HOST1X_HV_CMDFIFO_SETUP_BASE_V(val);
90 end = HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(val);
91
92 do {
93 val = 0;
94 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE;
95 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(ch->id);
96 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(rd_ptr);
97 host1x_hypervisor_writel(host, val,
98 HOST1X_HV_CMDFIFO_PEEK_CTRL);
99
100 val = host1x_hypervisor_readl(host,
101 HOST1X_HV_CMDFIFO_PEEK_READ);
102
103 if (!data_count) {
104 host1x_debug_output(o, "%03x 0x%08x: ",
105 rd_ptr - start, val);
106 data_count = show_channel_command(o, val, &payload);
107 } else {
108 host1x_debug_cont(o, "%08x%s", val,
109 data_count > 1 ? ", " : "])\n");
110 data_count--;
111 }
112
113 if (rd_ptr == end)
114 rd_ptr = start;
115 else
116 rd_ptr++;
117 } while (rd_ptr != wr_ptr);
118
119 if (data_count)
120 host1x_debug_cont(o, ", ...])\n");
121 host1x_debug_output(o, "\n");
122
123 host1x_hypervisor_writel(host, 0x0, HOST1X_HV_CMDFIFO_PEEK_CTRL);
124 host1x_hypervisor_writel(host, 0x0, HOST1X_HV_ICG_EN_OVERRIDE);
125 #endif
126 }
127
128 static void host1x_debug_show_mlocks(struct host1x *host, struct output *o)
129 {
130
131 }