root/drivers/gpu/drm/i915/display/intel_dsi.h

INCLUDED FROM

DEFINITIONS

1. to_intel_dsi_host
2. enc_to_intel_dsi
3. is_vid_mode
4. is_cmd_mode
5. intel_dsi_encoder_ports

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23 
  24 #ifndef _INTEL_DSI_H
  25 #define _INTEL_DSI_H
  26 
  27 #include <drm/drm_crtc.h>
  28 #include <drm/drm_mipi_dsi.h>
  29 
  30 #include "intel_display_types.h"
  31 
  32 #define INTEL_DSI_VIDEO_MODE    0
  33 #define INTEL_DSI_COMMAND_MODE  1
  34 
  35 /* Dual Link support */
  36 #define DSI_DUAL_LINK_NONE              0
  37 #define DSI_DUAL_LINK_FRONT_BACK        1
  38 #define DSI_DUAL_LINK_PIXEL_ALT         2
  39 
  40 struct intel_dsi_host;
  41 
  42 struct intel_dsi {
  43         struct intel_encoder base;
  44 
  45         struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
  46         intel_wakeref_t io_wakeref[I915_MAX_PORTS];
  47 
  48         /* GPIO Desc for CRC based Panel control */
  49         struct gpio_desc *gpio_panel;
  50 
  51         struct intel_connector *attached_connector;
  52 
  53         /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
  54         union {
  55                 u16 ports;      /* VLV DSI */
  56                 u16 phys;       /* ICL DSI */
  57         };
  58 
  59         /* if true, use HS mode, otherwise LP */
  60         bool hs;
  61 
  62         /* virtual channel */
  63         int channel;
  64 
  65         /* Video mode or command mode */
  66         u16 operation_mode;
  67 
  68         /* number of DSI lanes */
  69         unsigned int lane_count;
  70 
  71         /*
  72          * video mode pixel format
  73          *
  74          * XXX: consolidate on .format in struct mipi_dsi_device.
  75          */
  76         enum mipi_dsi_pixel_format pixel_format;
  77 
  78         /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
  79         u32 video_mode_format;
  80 
  81         /* eot for MIPI_EOT_DISABLE register */
  82         u8 eotp_pkt;
  83         u8 clock_stop;
  84 
  85         u8 escape_clk_div;
  86         u8 dual_link;
  87 
  88         u16 dcs_backlight_ports;
  89         u16 dcs_cabc_ports;
  90 
  91         /* RGB or BGR */
  92         bool bgr_enabled;
  93 
  94         u8 pixel_overlap;
  95         u32 port_bits;
  96         u32 bw_timer;
  97         u32 dphy_reg;
  98 
  99         /* data lanes dphy timing */
 100         u32 dphy_data_lane_reg;
 101         u32 video_frmt_cfg_bits;
 102         u16 lp_byte_clk;
 103 
 104         /* timeouts in byte clocks */
 105         u16 hs_tx_timeout;
 106         u16 lp_rx_timeout;
 107         u16 turn_arnd_val;
 108         u16 rst_timer_val;
 109         u16 hs_to_lp_count;
 110         u16 clk_lp_to_hs_count;
 111         u16 clk_hs_to_lp_count;
 112 
 113         u16 init_count;
 114         u32 pclk;
 115         u16 burst_mode_ratio;
 116 
 117         /* all delays in ms */
 118         u16 backlight_off_delay;
 119         u16 backlight_on_delay;
 120         u16 panel_on_delay;
 121         u16 panel_off_delay;
 122         u16 panel_pwr_cycle_delay;
 123 };
 124 
 125 struct intel_dsi_host {
 126         struct mipi_dsi_host base;
 127         struct intel_dsi *intel_dsi;
 128         enum port port;
 129 
 130         /* our little hack */
 131         struct mipi_dsi_device *device;
 132 };
 133 
 134 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
 135 {
 136         return container_of(h, struct intel_dsi_host, base);
 137 }
 138 
 139 #define for_each_dsi_port(__port, __ports_mask) \
 140         for_each_port_masked(__port, __ports_mask)
 141 #define for_each_dsi_phy(__phy, __phys_mask) \
 142         for_each_phy_masked(__phy, __phys_mask)
 143 
 144 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 145 {
 146         return container_of(encoder, struct intel_dsi, base.base);
 147 }
 148 
 149 static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
 150 {
 151         return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE;
 152 }
 153 
 154 static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
 155 {
 156         return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE;
 157 }
 158 
 159 static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
 160 {
 161         return enc_to_intel_dsi(&encoder->base)->ports;
 162 }
 163 
 164 /* icl_dsi.c */
 165 void icl_dsi_init(struct drm_i915_private *dev_priv);
 166 
 167 /* intel_dsi.c */
 168 int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
 169 int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
 170 enum drm_panel_orientation
 171 intel_dsi_get_panel_orientation(struct intel_connector *connector);
 172 
 173 /* vlv_dsi.c */
 174 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 175 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 176 int intel_dsi_get_modes(struct drm_connector *connector);
 177 enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
 178                                           struct drm_display_mode *mode);
 179 struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
 180                                            const struct mipi_dsi_host_ops *funcs,
 181                                            enum port port);
 182 void vlv_dsi_init(struct drm_i915_private *dev_priv);
 183 
 184 /* vlv_dsi_pll.c */
 185 int vlv_dsi_pll_compute(struct intel_encoder *encoder,
 186                         struct intel_crtc_state *config);
 187 void vlv_dsi_pll_enable(struct intel_encoder *encoder,
 188                         const struct intel_crtc_state *config);
 189 void vlv_dsi_pll_disable(struct intel_encoder *encoder);
 190 u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
 191                      struct intel_crtc_state *config);
 192 void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 193 
 194 bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 195 int bxt_dsi_pll_compute(struct intel_encoder *encoder,
 196                         struct intel_crtc_state *config);
 197 void bxt_dsi_pll_enable(struct intel_encoder *encoder,
 198                         const struct intel_crtc_state *config);
 199 void bxt_dsi_pll_disable(struct intel_encoder *encoder);
 200 u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
 201                      struct intel_crtc_state *config);
 202 void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 203 
 204 /* intel_dsi_vbt.c */
 205 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
 206 void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
 207                                  enum mipi_seq seq_id);
 208 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
 209 void intel_dsi_log_params(struct intel_dsi *intel_dsi);
 210 
 211 #endif /* _INTEL_DSI_H */