1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2019 Intel Corporation
4 */
5
6 #ifndef __INTEL_RESET_TYPES_H_
7 #define __INTEL_RESET_TYPES_H_
8
9 #include <linux/mutex.h>
10 #include <linux/wait.h>
11 #include <linux/srcu.h>
12
13 struct intel_reset {
14 /**
15 * flags: Control various stages of the GPU reset
16 *
17 * #I915_RESET_BACKOFF - When we start a global reset, we need to
18 * serialise with any other users attempting to do the same, and
19 * any global resources that may be clobber by the reset (such as
20 * FENCE registers).
21 *
22 * #I915_RESET_ENGINE[num_engines] - Since the driver doesn't need to
23 * acquire the struct_mutex to reset an engine, we need an explicit
24 * flag to prevent two concurrent reset attempts in the same engine.
25 * As the number of engines continues to grow, allocate the flags from
26 * the most significant bits.
27 *
28 * #I915_WEDGED - If reset fails and we can no longer use the GPU,
29 * we set the #I915_WEDGED bit. Prior to command submission, e.g.
30 * i915_request_alloc(), this bit is checked and the sequence
31 * aborted (with -EIO reported to userspace) if set.
32 */
33 unsigned long flags;
34 #define I915_RESET_BACKOFF 0
35 #define I915_RESET_MODESET 1
36 #define I915_RESET_ENGINE 2
37 #define I915_WEDGED (BITS_PER_LONG - 1)
38
39 struct mutex mutex; /* serialises wedging/unwedging */
40
41 /**
42 * Waitqueue to signal when the reset has completed. Used by clients
43 * that wait for dev_priv->mm.wedged to settle.
44 */
45 wait_queue_head_t queue;
46
47 struct srcu_struct backoff_srcu;
48 };
49
50 #endif /* _INTEL_RESET_TYPES_H_ */