root/drivers/gpu/drm/sun4i/sun8i_csc.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
   4  */
   5 
   6 #ifndef _SUN8I_CSC_H_
   7 #define _SUN8I_CSC_H_
   8 
   9 #include <drm/drm_color_mgmt.h>
  10 
  11 struct sun8i_mixer;
  12 
  13 /* VI channel CSC units offsets */
  14 #define CCSC00_OFFSET 0xAA050
  15 #define CCSC01_OFFSET 0xFA000
  16 #define CCSC10_OFFSET 0xA0000
  17 #define CCSC11_OFFSET 0xF0000
  18 
  19 #define SUN8I_CSC_CTRL(base)            (base + 0x0)
  20 #define SUN8I_CSC_COEFF(base, i)        (base + 0x10 + 4 * i)
  21 
  22 #define SUN8I_CSC_CTRL_EN               BIT(0)
  23 
  24 enum sun8i_csc_mode {
  25         SUN8I_CSC_MODE_OFF,
  26         SUN8I_CSC_MODE_YUV2RGB,
  27         SUN8I_CSC_MODE_YVU2RGB,
  28 };
  29 
  30 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
  31                                      enum sun8i_csc_mode mode,
  32                                      enum drm_color_encoding encoding,
  33                                      enum drm_color_range range);
  34 void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable);
  35 
  36 #endif