drivers/gpu/drm/radeon/radeon

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This source file includes following definitions.
radeon_agp_init
radeon_agp_resume
radeon_agp_fini
radeon_agp_suspend
   1 /*
   2  * Copyright 2008 Red Hat Inc.
   3  * Copyright 2009 Jerome Glisse.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Dave Airlie
  25  *    Jerome Glisse <glisse@freedesktop.org>
  26  */
  27 
  28 #include <drm/drm_agpsupport.h>
  29 #include <drm/drm_device.h>
  30 #include <drm/drm_pci.h>
  31 #include <drm/radeon_drm.h>
  32 
  33 #include "radeon.h"
  34 
  35 #if IS_ENABLED(CONFIG_AGP)
  36 
  37 struct radeon_agpmode_quirk {
  38         u32 hostbridge_vendor;
  39         u32 hostbridge_device;
  40         u32 chip_vendor;
  41         u32 chip_device;
  42         u32 subsys_vendor;
  43         u32 subsys_device;
  44         u32 default_mode;
  45 };
  46 
  47 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
  48         /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
  49         { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
  50         /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
  51         { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
  52         /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */
  53         { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,
  54                 0x148c, 0x2073, 4},
  55         /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
  56         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,
  57                 PCI_VENDOR_ID_IBM, 0x052f, 1},
  58         /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */
  59         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
  60                 PCI_VENDOR_ID_IBM, 0x0550, 1},
  61         /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */
  62         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
  63                 PCI_VENDOR_ID_IBM, 0x054d, 1},
  64         /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
  65         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
  66                 PCI_VENDOR_ID_IBM, 0x0530, 1},
  67         /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
  68         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,
  69                 PCI_VENDOR_ID_IBM, 0x054f, 2},
  70         /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */
  71         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
  72                 PCI_VENDOR_ID_SONY, 0x816b, 2},
  73         /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
  74         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
  75                 PCI_VENDOR_ID_SONY, 0x8195, 8},
  76         /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
  77         { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,
  78                 PCI_VENDOR_ID_DELL, 0x00e3, 2},
  79         /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */
  80         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,
  81                 PCI_VENDOR_ID_DELL, 0x0149, 1},
  82         /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */
  83         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
  84                 PCI_VENDOR_ID_IBM, 0x0531, 1},
  85         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
  86         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  87                 0x1025, 0x0061, 1},
  88         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
  89         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  90                 0x1025, 0x0064, 1},
  91         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
  92         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  93                 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},
  94         /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
  95         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  96                 0x10cf, 0x127f, 1},
  97         /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
  98         { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
  99                 0x1787, 0x5960, 4},
 100         /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
 101         { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,
 102                 0x17af, 0x2020, 4},
 103         /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
 104         { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,
 105                 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},
 106         /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
 107         { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,
 108                 PCI_VENDOR_ID_ATI, 0x013a, 2},
 109         /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
 110         { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
 111                 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},
 112         /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
 113         { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
 114                 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},
 115         /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
 116         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,
 117                 0x174b, 0x7149, 4},
 118         /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
 119         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
 120                 0x1462, 0x0380, 4},
 121         /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
 122         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,
 123                 0x148c, 0x2073, 4},
 124         /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
 125         { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,
 126                 PCI_VENDOR_ID_SONY, 0x8175, 1},
 127         { 0, 0, 0, 0, 0, 0, 0 },
 128 };
 129 #endif
 130 
 131 int radeon_agp_init(struct radeon_device *rdev)
 132 {
 133 #if IS_ENABLED(CONFIG_AGP)
 134         struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;
 135         struct drm_agp_mode mode;
 136         struct drm_agp_info info;
 137         uint32_t agp_status;
 138         int default_mode;
 139         bool is_v3;
 140         int ret;
 141 
 142         /* Acquire AGP. */
 143         ret = drm_agp_acquire(rdev->ddev);
 144         if (ret) {
 145                 DRM_ERROR("Unable to acquire AGP: %d\n", ret);
 146                 return ret;
 147         }
 148 
 149         ret = drm_agp_info(rdev->ddev, &info);
 150         if (ret) {
 151                 drm_agp_release(rdev->ddev);
 152                 DRM_ERROR("Unable to get AGP info: %d\n", ret);
 153                 return ret;
 154         }
 155 
 156         if (rdev->ddev->agp->agp_info.aper_size < 32) {
 157                 drm_agp_release(rdev->ddev);
 158                 dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
 159                         "need at least 32M, disabling AGP\n",
 160                         rdev->ddev->agp->agp_info.aper_size);
 161                 return -EINVAL;
 162         }
 163 
 164         mode.mode = info.mode;
 165         /* chips with the agp to pcie bridge don't have the AGP_STATUS register
 166          * Just use the whatever mode the host sets up.
 167          */
 168         if (rdev->family <= CHIP_RV350)
 169                 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
 170         else
 171                 agp_status = mode.mode;
 172         is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
 173 
 174         if (is_v3) {
 175                 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
 176         } else {
 177                 if (agp_status & RADEON_AGP_4X_MODE) {
 178                         default_mode = 4;
 179                 } else if (agp_status & RADEON_AGP_2X_MODE) {
 180                         default_mode = 2;
 181                 } else {
 182                         default_mode = 1;
 183                 }
 184         }
 185 
 186         /* Apply AGPMode Quirks */
 187         while (p && p->chip_device != 0) {
 188                 if (info.id_vendor == p->hostbridge_vendor &&
 189                     info.id_device == p->hostbridge_device &&
 190                     rdev->pdev->vendor == p->chip_vendor &&
 191                     rdev->pdev->device == p->chip_device &&
 192                     rdev->pdev->subsystem_vendor == p->subsys_vendor &&
 193                     rdev->pdev->subsystem_device == p->subsys_device) {
 194                         default_mode = p->default_mode;
 195                 }
 196                 ++p;
 197         }
 198 
 199         if (radeon_agpmode > 0) {
 200                 if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||
 201                     (radeon_agpmode > (is_v3 ? 8 : 4)) ||
 202                     (radeon_agpmode & (radeon_agpmode - 1))) {
 203                         DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",
 204                                   radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",
 205                                   default_mode);
 206                         radeon_agpmode = default_mode;
 207                 } else {
 208                         DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);
 209                 }
 210         } else {
 211                 radeon_agpmode = default_mode;
 212         }
 213 
 214         mode.mode &= ~RADEON_AGP_MODE_MASK;
 215         if (is_v3) {
 216                 switch (radeon_agpmode) {
 217                 case 8:
 218                         mode.mode |= RADEON_AGPv3_8X_MODE;
 219                         break;
 220                 case 4:
 221                 default:
 222                         mode.mode |= RADEON_AGPv3_4X_MODE;
 223                         break;
 224                 }
 225         } else {
 226                 switch (radeon_agpmode) {
 227                 case 4:
 228                         mode.mode |= RADEON_AGP_4X_MODE;
 229                         break;
 230                 case 2:
 231                         mode.mode |= RADEON_AGP_2X_MODE;
 232                         break;
 233                 case 1:
 234                 default:
 235                         mode.mode |= RADEON_AGP_1X_MODE;
 236                         break;
 237                 }
 238         }
 239 
 240         mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */
 241         ret = drm_agp_enable(rdev->ddev, mode);
 242         if (ret) {
 243                 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
 244                 drm_agp_release(rdev->ddev);
 245                 return ret;
 246         }
 247 
 248         rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;
 249         rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;
 250         rdev->mc.gtt_start = rdev->mc.agp_base;
 251         rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;
 252         dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
 253                 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);
 254 
 255         /* workaround some hw issues */
 256         if (rdev->family < CHIP_R200) {
 257                 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);
 258         }
 259         return 0;
 260 #else
 261         return 0;
 262 #endif
 263 }
 264 
 265 void radeon_agp_resume(struct radeon_device *rdev)
 266 {
 267 #if IS_ENABLED(CONFIG_AGP)
 268         int r;
 269         if (rdev->flags & RADEON_IS_AGP) {
 270                 r = radeon_agp_init(rdev);
 271                 if (r)
 272                         dev_warn(rdev->dev, "radeon AGP reinit failed\n");
 273         }
 274 #endif
 275 }
 276 
 277 void radeon_agp_fini(struct radeon_device *rdev)
 278 {
 279 #if IS_ENABLED(CONFIG_AGP)
 280         if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
 281                 drm_agp_release(rdev->ddev);
 282         }
 283 #endif
 284 }
 285 
 286 void radeon_agp_suspend(struct radeon_device *rdev)
 287 {
 288         radeon_agp_fini(rdev);
 289 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/gpu/drm/radeon/radeon_agp.c

DEFINITIONS
