This source file includes following definitions.
- vmw_getparam_ioctl
- vmw_mask_multisample
- vmw_fill_compat_cap
- vmw_get_cap_3d_ioctl
- vmw_present_ioctl
- vmw_present_readback_ioctl
- vmw_fops_poll
- vmw_fops_read
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  28 #include "vmwgfx_drv.h"
  29 #include <drm/vmwgfx_drm.h>
  30 #include "vmwgfx_kms.h"
  31 #include "device_include/svga3d_caps.h"
  32 
  33 struct svga_3d_compat_cap {
  34         SVGA3dCapsRecordHeader header;
  35         SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
  36 };
  37 
  38 int vmw_getparam_ioctl(struct drm_device *dev, void *data,
  39                        struct drm_file *file_priv)
  40 {
  41         struct vmw_private *dev_priv = vmw_priv(dev);
  42         struct drm_vmw_getparam_arg *param =
  43             (struct drm_vmw_getparam_arg *)data;
  44         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
  45 
  46         switch (param->param) {
  47         case DRM_VMW_PARAM_NUM_STREAMS:
  48                 param->value = vmw_overlay_num_overlays(dev_priv);
  49                 break;
  50         case DRM_VMW_PARAM_NUM_FREE_STREAMS:
  51                 param->value = vmw_overlay_num_free_overlays(dev_priv);
  52                 break;
  53         case DRM_VMW_PARAM_3D:
  54                 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
  55                 break;
  56         case DRM_VMW_PARAM_HW_CAPS:
  57                 param->value = dev_priv->capabilities;
  58                 break;
  59         case DRM_VMW_PARAM_HW_CAPS2:
  60                 param->value = dev_priv->capabilities2;
  61                 break;
  62         case DRM_VMW_PARAM_FIFO_CAPS:
  63                 param->value = dev_priv->fifo.capabilities;
  64                 break;
  65         case DRM_VMW_PARAM_MAX_FB_SIZE:
  66                 param->value = dev_priv->prim_bb_mem;
  67                 break;
  68         case DRM_VMW_PARAM_FIFO_HW_VERSION:
  69         {
  70                 u32 *fifo_mem = dev_priv->mmio_virt;
  71                 const struct vmw_fifo_state *fifo = &dev_priv->fifo;
  72 
  73                 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
  74                         param->value = SVGA3D_HWVERSION_WS8_B1;
  75                         break;
  76                 }
  77 
  78                 param->value =
  79                         vmw_mmio_read(fifo_mem +
  80                                       ((fifo->capabilities &
  81                                         SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
  82                                        SVGA_FIFO_3D_HWVERSION_REVISED :
  83                                        SVGA_FIFO_3D_HWVERSION));
  84                 break;
  85         }
  86         case DRM_VMW_PARAM_MAX_SURF_MEMORY:
  87                 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  88                     !vmw_fp->gb_aware)
  89                         param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
  90                 else
  91                         param->value = dev_priv->memory_size;
  92                 break;
  93         case DRM_VMW_PARAM_3D_CAPS_SIZE:
  94                 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  95                     vmw_fp->gb_aware)
  96                         param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
  97                 else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
  98                         param->value = sizeof(struct svga_3d_compat_cap) +
  99                                 sizeof(uint32_t);
 100                 else
 101                         param->value = (SVGA_FIFO_3D_CAPS_LAST -
 102                                         SVGA_FIFO_3D_CAPS + 1) *
 103                                 sizeof(uint32_t);
 104                 break;
 105         case DRM_VMW_PARAM_MAX_MOB_MEMORY:
 106                 vmw_fp->gb_aware = true;
 107                 param->value = dev_priv->max_mob_pages * PAGE_SIZE;
 108                 break;
 109         case DRM_VMW_PARAM_MAX_MOB_SIZE:
 110                 param->value = dev_priv->max_mob_size;
 111                 break;
 112         case DRM_VMW_PARAM_SCREEN_TARGET:
 113                 param->value =
 114                         (dev_priv->active_display_unit == vmw_du_screen_target);
 115                 break;
 116         case DRM_VMW_PARAM_DX:
 117                 param->value = dev_priv->has_dx;
 118                 break;
 119         case DRM_VMW_PARAM_SM4_1:
 120                 param->value = dev_priv->has_sm4_1;
 121                 break;
 122         default:
 123                 return -EINVAL;
 124         }
 125 
 126         return 0;
 127 }
 128 
 129 static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
 130 {
 131         
 132 
 133 
 134 
 135 
 136         if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
 137                 return 0;
 138 
 139         return fmt_value;
 140 }
 141 
 142 static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
 143                                size_t size)
 144 {
 145         struct svga_3d_compat_cap *compat_cap =
 146                 (struct svga_3d_compat_cap *) bounce;
 147         unsigned int i;
 148         size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
 149         unsigned int max_size;
 150 
 151         if (size < pair_offset)
 152                 return -EINVAL;
 153 
 154         max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
 155 
 156         if (max_size > SVGA3D_DEVCAP_MAX)
 157                 max_size = SVGA3D_DEVCAP_MAX;
 158 
 159         compat_cap->header.length =
 160                 (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
 161         compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
 162 
 163         spin_lock(&dev_priv->cap_lock);
 164         for (i = 0; i < max_size; ++i) {
 165                 vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
 166                 compat_cap->pairs[i][0] = i;
 167                 compat_cap->pairs[i][1] = vmw_mask_multisample
 168                         (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
 169         }
 170         spin_unlock(&dev_priv->cap_lock);
 171 
 172         return 0;
 173 }
 174 
 175 
 176 int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
 177                          struct drm_file *file_priv)
 178 {
 179         struct drm_vmw_get_3d_cap_arg *arg =
 180                 (struct drm_vmw_get_3d_cap_arg *) data;
 181         struct vmw_private *dev_priv = vmw_priv(dev);
 182         uint32_t size;
 183         u32 *fifo_mem;
 184         void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
 185         void *bounce;
 186         int ret;
 187         bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
 188         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 189 
 190         if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) {
 191                 VMW_DEBUG_USER("Illegal GET_3D_CAP argument.\n");
 192                 return -EINVAL;
 193         }
 194 
 195         if (gb_objects && vmw_fp->gb_aware)
 196                 size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
 197         else if (gb_objects)
 198                 size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
 199         else
 200                 size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
 201                         sizeof(uint32_t);
 202 
 203         if (arg->max_size < size)
 204                 size = arg->max_size;
 205 
 206         bounce = vzalloc(size);
 207         if (unlikely(bounce == NULL)) {
 208                 DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
 209                 return -ENOMEM;
 210         }
 211 
 212         if (gb_objects && vmw_fp->gb_aware) {
 213                 int i, num;
 214                 uint32_t *bounce32 = (uint32_t *) bounce;
 215 
 216                 num = size / sizeof(uint32_t);
 217                 if (num > SVGA3D_DEVCAP_MAX)
 218                         num = SVGA3D_DEVCAP_MAX;
 219 
 220                 spin_lock(&dev_priv->cap_lock);
 221                 for (i = 0; i < num; ++i) {
 222                         vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
 223                         *bounce32++ = vmw_mask_multisample
 224                                 (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
 225                 }
 226                 spin_unlock(&dev_priv->cap_lock);
 227         } else if (gb_objects) {
 228                 ret = vmw_fill_compat_cap(dev_priv, bounce, size);
 229                 if (unlikely(ret != 0))
 230                         goto out_err;
 231         } else {
 232                 fifo_mem = dev_priv->mmio_virt;
 233                 memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
 234         }
 235 
 236         ret = copy_to_user(buffer, bounce, size);
 237         if (ret)
 238                 ret = -EFAULT;
 239 out_err:
 240         vfree(bounce);
 241 
 242         if (unlikely(ret != 0))
 243                 DRM_ERROR("Failed to report 3D caps info.\n");
 244 
 245         return ret;
 246 }
 247 
 248 int vmw_present_ioctl(struct drm_device *dev, void *data,
 249                       struct drm_file *file_priv)
 250 {
 251         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 252         struct vmw_private *dev_priv = vmw_priv(dev);
 253         struct drm_vmw_present_arg *arg =
 254                 (struct drm_vmw_present_arg *)data;
 255         struct vmw_surface *surface;
 256         struct drm_vmw_rect __user *clips_ptr;
 257         struct drm_vmw_rect *clips = NULL;
 258         struct drm_framebuffer *fb;
 259         struct vmw_framebuffer *vfb;
 260         struct vmw_resource *res;
 261         uint32_t num_clips;
 262         int ret;
 263 
 264         num_clips = arg->num_clips;
 265         clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
 266 
 267         if (unlikely(num_clips == 0))
 268                 return 0;
 269 
 270         if (clips_ptr == NULL) {
 271                 VMW_DEBUG_USER("Variable clips_ptr must be specified.\n");
 272                 ret = -EINVAL;
 273                 goto out_clips;
 274         }
 275 
 276         clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
 277         if (clips == NULL) {
 278                 DRM_ERROR("Failed to allocate clip rect list.\n");
 279                 ret = -ENOMEM;
 280                 goto out_clips;
 281         }
 282 
 283         ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
 284         if (ret) {
 285                 DRM_ERROR("Failed to copy clip rects from userspace.\n");
 286                 ret = -EFAULT;
 287                 goto out_no_copy;
 288         }
 289 
 290         drm_modeset_lock_all(dev);
 291 
 292         fb = drm_framebuffer_lookup(dev, file_priv, arg->fb_id);
 293         if (!fb) {
 294                 VMW_DEBUG_USER("Invalid framebuffer id.\n");
 295                 ret = -ENOENT;
 296                 goto out_no_fb;
 297         }
 298         vfb = vmw_framebuffer_to_vfb(fb);
 299 
 300         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
 301         if (unlikely(ret != 0))
 302                 goto out_no_ttm_lock;
 303 
 304         ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
 305                                               user_surface_converter,
 306                                               &res);
 307         if (ret)
 308                 goto out_no_surface;
 309 
 310         surface = vmw_res_to_srf(res);
 311         ret = vmw_kms_present(dev_priv, file_priv,
 312                               vfb, surface, arg->sid,
 313                               arg->dest_x, arg->dest_y,
 314                               clips, num_clips);
 315 
 316         
 317         vmw_surface_unreference(&surface);
 318 
 319 out_no_surface:
 320         ttm_read_unlock(&dev_priv->reservation_sem);
 321 out_no_ttm_lock:
 322         drm_framebuffer_put(fb);
 323 out_no_fb:
 324         drm_modeset_unlock_all(dev);
 325 out_no_copy:
 326         kfree(clips);
 327 out_clips:
 328         return ret;
 329 }
 330 
 331 int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
 332                                struct drm_file *file_priv)
 333 {
 334         struct vmw_private *dev_priv = vmw_priv(dev);
 335         struct drm_vmw_present_readback_arg *arg =
 336                 (struct drm_vmw_present_readback_arg *)data;
 337         struct drm_vmw_fence_rep __user *user_fence_rep =
 338                 (struct drm_vmw_fence_rep __user *)
 339                 (unsigned long)arg->fence_rep;
 340         struct drm_vmw_rect __user *clips_ptr;
 341         struct drm_vmw_rect *clips = NULL;
 342         struct drm_framebuffer *fb;
 343         struct vmw_framebuffer *vfb;
 344         uint32_t num_clips;
 345         int ret;
 346 
 347         num_clips = arg->num_clips;
 348         clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
 349 
 350         if (unlikely(num_clips == 0))
 351                 return 0;
 352 
 353         if (clips_ptr == NULL) {
 354                 VMW_DEBUG_USER("Argument clips_ptr must be specified.\n");
 355                 ret = -EINVAL;
 356                 goto out_clips;
 357         }
 358 
 359         clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
 360         if (clips == NULL) {
 361                 DRM_ERROR("Failed to allocate clip rect list.\n");
 362                 ret = -ENOMEM;
 363                 goto out_clips;
 364         }
 365 
 366         ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
 367         if (ret) {
 368                 DRM_ERROR("Failed to copy clip rects from userspace.\n");
 369                 ret = -EFAULT;
 370                 goto out_no_copy;
 371         }
 372 
 373         drm_modeset_lock_all(dev);
 374 
 375         fb = drm_framebuffer_lookup(dev, file_priv, arg->fb_id);
 376         if (!fb) {
 377                 VMW_DEBUG_USER("Invalid framebuffer id.\n");
 378                 ret = -ENOENT;
 379                 goto out_no_fb;
 380         }
 381 
 382         vfb = vmw_framebuffer_to_vfb(fb);
 383         if (!vfb->bo) {
 384                 VMW_DEBUG_USER("Framebuffer not buffer backed.\n");
 385                 ret = -EINVAL;
 386                 goto out_no_ttm_lock;
 387         }
 388 
 389         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
 390         if (unlikely(ret != 0))
 391                 goto out_no_ttm_lock;
 392 
 393         ret = vmw_kms_readback(dev_priv, file_priv,
 394                                vfb, user_fence_rep,
 395                                clips, num_clips);
 396 
 397         ttm_read_unlock(&dev_priv->reservation_sem);
 398 out_no_ttm_lock:
 399         drm_framebuffer_put(fb);
 400 out_no_fb:
 401         drm_modeset_unlock_all(dev);
 402 out_no_copy:
 403         kfree(clips);
 404 out_clips:
 405         return ret;
 406 }
 407 
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 417 
 418 __poll_t vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
 419 {
 420         struct drm_file *file_priv = filp->private_data;
 421         struct vmw_private *dev_priv =
 422                 vmw_priv(file_priv->minor->dev);
 423 
 424         vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
 425         return drm_poll(filp, wait);
 426 }
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 439 
 440 ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
 441                       size_t count, loff_t *offset)
 442 {
 443         struct drm_file *file_priv = filp->private_data;
 444         struct vmw_private *dev_priv =
 445                 vmw_priv(file_priv->minor->dev);
 446 
 447         vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
 448         return drm_read(filp, buffer, count, offset);
 449 }