drivers/watchdog/iTCO

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This source file includes following definitions.
seconds_to_ticks
ticks_to_seconds
no_reboot_bit
update_no_reboot_bit_def
update_no_reboot_bit_pci
update_no_reboot_bit_mem
update_no_reboot_bit_cnt
iTCO_wdt_no_reboot_bit_setup
iTCO_wdt_start
iTCO_wdt_stop
iTCO_wdt_ping
iTCO_wdt_set_timeout
iTCO_wdt_get_timeleft
iTCO_wdt_probe
need_suspend
need_suspend
iTCO_wdt_suspend_noirq
iTCO_wdt_resume_noirq
iTCO_wdt_init_module
iTCO_wdt_cleanup_module
   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *      intel TCO Watchdog Driver
   4  *
   5  *      (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
   6  *
   7  *      Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
   8  *      provide warranty for any of this software. This material is
   9  *      provided "AS-IS" and at no charge.
  10  *
  11  *      The TCO watchdog is implemented in the following I/O controller hubs:
  12  *      (See the intel documentation on http://developer.intel.com.)
  13  *      document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
  14  *      document number 290687-002, 298242-027: 82801BA (ICH2)
  15  *      document number 290733-003, 290739-013: 82801CA (ICH3-S)
  16  *      document number 290716-001, 290718-007: 82801CAM (ICH3-M)
  17  *      document number 290744-001, 290745-025: 82801DB (ICH4)
  18  *      document number 252337-001, 252663-008: 82801DBM (ICH4-M)
  19  *      document number 273599-001, 273645-002: 82801E (C-ICH)
  20  *      document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
  21  *      document number 300641-004, 300884-013: 6300ESB
  22  *      document number 301473-002, 301474-026: 82801F (ICH6)
  23  *      document number 313082-001, 313075-006: 631xESB, 632xESB
  24  *      document number 307013-003, 307014-024: 82801G (ICH7)
  25  *      document number 322896-001, 322897-001: NM10
  26  *      document number 313056-003, 313057-017: 82801H (ICH8)
  27  *      document number 316972-004, 316973-012: 82801I (ICH9)
  28  *      document number 319973-002, 319974-002: 82801J (ICH10)
  29  *      document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
  30  *      document number 320066-003, 320257-008: EP80597 (IICH)
  31  *      document number 324645-001, 324646-001: Cougar Point (CPT)
  32  *      document number TBD                   : Patsburg (PBG)
  33  *      document number TBD                   : DH89xxCC
  34  *      document number TBD                   : Panther Point
  35  *      document number TBD                   : Lynx Point
  36  *      document number TBD                   : Lynx Point-LP
  37  */
  38 
  39 /*
  40  *      Includes, defines, variables, module parameters, ...
  41  */
  42 
  43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44 
  45 /* Module and version information */
  46 #define DRV_NAME        "iTCO_wdt"
  47 #define DRV_VERSION     "1.11"
  48 
  49 /* Includes */
  50 #include <linux/acpi.h>                 /* For ACPI support */
  51 #include <linux/bits.h>                 /* For BIT() */
  52 #include <linux/module.h>               /* For module specific items */
  53 #include <linux/moduleparam.h>          /* For new moduleparam's */
  54 #include <linux/types.h>                /* For standard types (like size_t) */
  55 #include <linux/errno.h>                /* For the -ENODEV/... values */
  56 #include <linux/kernel.h>               /* For printk/panic/... */
  57 #include <linux/watchdog.h>             /* For the watchdog specific items */
  58 #include <linux/init.h>                 /* For __init/__exit/... */
  59 #include <linux/fs.h>                   /* For file operations */
  60 #include <linux/platform_device.h>      /* For platform_driver framework */
  61 #include <linux/pci.h>                  /* For pci functions */
  62 #include <linux/ioport.h>               /* For io-port access */
  63 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
  64 #include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
  65 #include <linux/io.h>                   /* For inb/outb/... */
  66 #include <linux/platform_data/itco_wdt.h>
  67 
  68 #include "iTCO_vendor.h"
  69 
  70 /* Address definitions for the TCO */
  71 /* TCO base address */
  72 #define TCOBASE(p)      ((p)->tco_res->start)
  73 /* SMI Control and Enable Register */
  74 #define SMI_EN(p)       ((p)->smi_res->start)
  75 
  76 #define TCO_RLD(p)      (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */
  77 #define TCOv1_TMR(p)    (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/
  78 #define TCO_DAT_IN(p)   (TCOBASE(p) + 0x02) /* TCO Data In Register     */
  79 #define TCO_DAT_OUT(p)  (TCOBASE(p) + 0x03) /* TCO Data Out Register    */
  80 #define TCO1_STS(p)     (TCOBASE(p) + 0x04) /* TCO1 Status Register     */
  81 #define TCO2_STS(p)     (TCOBASE(p) + 0x06) /* TCO2 Status Register     */
  82 #define TCO1_CNT(p)     (TCOBASE(p) + 0x08) /* TCO1 Control Register    */
  83 #define TCO2_CNT(p)     (TCOBASE(p) + 0x0a) /* TCO2 Control Register    */
  84 #define TCOv2_TMR(p)    (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/
  85 
  86 /* internal variables */
  87 struct iTCO_wdt_private {
  88         struct watchdog_device wddev;
  89 
  90         /* TCO version/generation */
  91         unsigned int iTCO_version;
  92         struct resource *tco_res;
  93         struct resource *smi_res;
  94         /*
  95          * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
  96          * or memory-mapped PMC register bit 4 (TCO version 3).
  97          */
  98         struct resource *gcs_pmc_res;
  99         unsigned long __iomem *gcs_pmc;
 100         /* the lock for io operations */
 101         spinlock_t io_lock;
 102         /* the PCI-device */
 103         struct pci_dev *pci_dev;
 104         /* whether or not the watchdog has been suspended */
 105         bool suspended;
 106         /* no reboot API private data */
 107         void *no_reboot_priv;
 108         /* no reboot update function pointer */
 109         int (*update_no_reboot_bit)(void *p, bool set);
 110 };
 111 
 112 /* module parameters */
 113 #define WATCHDOG_TIMEOUT 30     /* 30 sec default heartbeat */
 114 static int heartbeat = WATCHDOG_TIMEOUT;  /* in seconds */
 115 module_param(heartbeat, int, 0);
 116 MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
 117         "5..76 (TCO v1) or 3..614 (TCO v2), default="
 118                                 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 119 
 120 static bool nowayout = WATCHDOG_NOWAYOUT;
 121 module_param(nowayout, bool, 0);
 122 MODULE_PARM_DESC(nowayout,
 123         "Watchdog cannot be stopped once started (default="
 124                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 125 
 126 static int turn_SMI_watchdog_clear_off = 1;
 127 module_param(turn_SMI_watchdog_clear_off, int, 0);
 128 MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
 129         "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
 130 
 131 /*
 132  * Some TCO specific functions
 133  */
 134 
 135 /*
 136  * The iTCO v1 and v2's internal timer is stored as ticks which decrement
 137  * every 0.6 seconds.  v3's internal timer is stored as seconds (some
 138  * datasheets incorrectly state 0.6 seconds).
 139  */
 140 static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private *p,
 141                                             int secs)
 142 {
 143         return p->iTCO_version == 3 ? secs : (secs * 10) / 6;
 144 }
 145 
 146 static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private *p,
 147                                             int ticks)
 148 {
 149         return p->iTCO_version == 3 ? ticks : (ticks * 6) / 10;
 150 }
 151 
 152 static inline u32 no_reboot_bit(struct iTCO_wdt_private *p)
 153 {
 154         u32 enable_bit;
 155 
 156         switch (p->iTCO_version) {
 157         case 5:
 158         case 3:
 159                 enable_bit = 0x00000010;
 160                 break;
 161         case 2:
 162                 enable_bit = 0x00000020;
 163                 break;
 164         case 4:
 165         case 1:
 166         default:
 167                 enable_bit = 0x00000002;
 168                 break;
 169         }
 170 
 171         return enable_bit;
 172 }
 173 
 174 static int update_no_reboot_bit_def(void *priv, bool set)
 175 {
 176         return 0;
 177 }
 178 
 179 static int update_no_reboot_bit_pci(void *priv, bool set)
 180 {
 181         struct iTCO_wdt_private *p = priv;
 182         u32 val32 = 0, newval32 = 0;
 183 
 184         pci_read_config_dword(p->pci_dev, 0xd4, &val32);
 185         if (set)
 186                 val32 |= no_reboot_bit(p);
 187         else
 188                 val32 &= ~no_reboot_bit(p);
 189         pci_write_config_dword(p->pci_dev, 0xd4, val32);
 190         pci_read_config_dword(p->pci_dev, 0xd4, &newval32);
 191 
 192         /* make sure the update is successful */
 193         if (val32 != newval32)
 194                 return -EIO;
 195 
 196         return 0;
 197 }
 198 
 199 static int update_no_reboot_bit_mem(void *priv, bool set)
 200 {
 201         struct iTCO_wdt_private *p = priv;
 202         u32 val32 = 0, newval32 = 0;
 203 
 204         val32 = readl(p->gcs_pmc);
 205         if (set)
 206                 val32 |= no_reboot_bit(p);
 207         else
 208                 val32 &= ~no_reboot_bit(p);
 209         writel(val32, p->gcs_pmc);
 210         newval32 = readl(p->gcs_pmc);
 211 
 212         /* make sure the update is successful */
 213         if (val32 != newval32)
 214                 return -EIO;
 215 
 216         return 0;
 217 }
 218 
 219 static int update_no_reboot_bit_cnt(void *priv, bool set)
 220 {
 221         struct iTCO_wdt_private *p = priv;
 222         u16 val, newval;
 223 
 224         val = inw(TCO1_CNT(p));
 225         if (set)
 226                 val |= BIT(0);
 227         else
 228                 val &= ~BIT(0);
 229         outw(val, TCO1_CNT(p));
 230         newval = inw(TCO1_CNT(p));
 231 
 232         /* make sure the update is successful */
 233         return val != newval ? -EIO : 0;
 234 }
 235 
 236 static void iTCO_wdt_no_reboot_bit_setup(struct iTCO_wdt_private *p,
 237                 struct itco_wdt_platform_data *pdata)
 238 {
 239         if (pdata->update_no_reboot_bit) {
 240                 p->update_no_reboot_bit = pdata->update_no_reboot_bit;
 241                 p->no_reboot_priv = pdata->no_reboot_priv;
 242                 return;
 243         }
 244 
 245         if (p->iTCO_version >= 6)
 246                 p->update_no_reboot_bit = update_no_reboot_bit_cnt;
 247         else if (p->iTCO_version >= 2)
 248                 p->update_no_reboot_bit = update_no_reboot_bit_mem;
 249         else if (p->iTCO_version == 1)
 250                 p->update_no_reboot_bit = update_no_reboot_bit_pci;
 251         else
 252                 p->update_no_reboot_bit = update_no_reboot_bit_def;
 253 
 254         p->no_reboot_priv = p;
 255 }
 256 
 257 static int iTCO_wdt_start(struct watchdog_device *wd_dev)
 258 {
 259         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 260         unsigned int val;
 261 
 262         spin_lock(&p->io_lock);
 263 
 264         iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout);
 265 
 266         /* disable chipset's NO_REBOOT bit */
 267         if (p->update_no_reboot_bit(p->no_reboot_priv, false)) {
 268                 spin_unlock(&p->io_lock);
 269                 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
 270                 return -EIO;
 271         }
 272 
 273         /* Force the timer to its reload value by writing to the TCO_RLD
 274            register */
 275         if (p->iTCO_version >= 2)
 276                 outw(0x01, TCO_RLD(p));
 277         else if (p->iTCO_version == 1)
 278                 outb(0x01, TCO_RLD(p));
 279 
 280         /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
 281         val = inw(TCO1_CNT(p));
 282         val &= 0xf7ff;
 283         outw(val, TCO1_CNT(p));
 284         val = inw(TCO1_CNT(p));
 285         spin_unlock(&p->io_lock);
 286 
 287         if (val & 0x0800)
 288                 return -1;
 289         return 0;
 290 }
 291 
 292 static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
 293 {
 294         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 295         unsigned int val;
 296 
 297         spin_lock(&p->io_lock);
 298 
 299         iTCO_vendor_pre_stop(p->smi_res);
 300 
 301         /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
 302         val = inw(TCO1_CNT(p));
 303         val |= 0x0800;
 304         outw(val, TCO1_CNT(p));
 305         val = inw(TCO1_CNT(p));
 306 
 307         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 308         p->update_no_reboot_bit(p->no_reboot_priv, true);
 309 
 310         spin_unlock(&p->io_lock);
 311 
 312         if ((val & 0x0800) == 0)
 313                 return -1;
 314         return 0;
 315 }
 316 
 317 static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
 318 {
 319         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 320 
 321         spin_lock(&p->io_lock);
 322 
 323         /* Reload the timer by writing to the TCO Timer Counter register */
 324         if (p->iTCO_version >= 2) {
 325                 outw(0x01, TCO_RLD(p));
 326         } else if (p->iTCO_version == 1) {
 327                 /* Reset the timeout status bit so that the timer
 328                  * needs to count down twice again before rebooting */
 329                 outw(0x0008, TCO1_STS(p));      /* write 1 to clear bit */
 330 
 331                 outb(0x01, TCO_RLD(p));
 332         }
 333 
 334         spin_unlock(&p->io_lock);
 335         return 0;
 336 }
 337 
 338 static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
 339 {
 340         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 341         unsigned int val16;
 342         unsigned char val8;
 343         unsigned int tmrval;
 344 
 345         tmrval = seconds_to_ticks(p, t);
 346 
 347         /* For TCO v1 the timer counts down twice before rebooting */
 348         if (p->iTCO_version == 1)
 349                 tmrval /= 2;
 350 
 351         /* from the specs: */
 352         /* "Values of 0h-3h are ignored and should not be attempted" */
 353         if (tmrval < 0x04)
 354                 return -EINVAL;
 355         if ((p->iTCO_version >= 2 && tmrval > 0x3ff) ||
 356             (p->iTCO_version == 1 && tmrval > 0x03f))
 357                 return -EINVAL;
 358 
 359         /* Write new heartbeat to watchdog */
 360         if (p->iTCO_version >= 2) {
 361                 spin_lock(&p->io_lock);
 362                 val16 = inw(TCOv2_TMR(p));
 363                 val16 &= 0xfc00;
 364                 val16 |= tmrval;
 365                 outw(val16, TCOv2_TMR(p));
 366                 val16 = inw(TCOv2_TMR(p));
 367                 spin_unlock(&p->io_lock);
 368 
 369                 if ((val16 & 0x3ff) != tmrval)
 370                         return -EINVAL;
 371         } else if (p->iTCO_version == 1) {
 372                 spin_lock(&p->io_lock);
 373                 val8 = inb(TCOv1_TMR(p));
 374                 val8 &= 0xc0;
 375                 val8 |= (tmrval & 0xff);
 376                 outb(val8, TCOv1_TMR(p));
 377                 val8 = inb(TCOv1_TMR(p));
 378                 spin_unlock(&p->io_lock);
 379 
 380                 if ((val8 & 0x3f) != tmrval)
 381                         return -EINVAL;
 382         }
 383 
 384         wd_dev->timeout = t;
 385         return 0;
 386 }
 387 
 388 static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
 389 {
 390         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 391         unsigned int val16;
 392         unsigned char val8;
 393         unsigned int time_left = 0;
 394 
 395         /* read the TCO Timer */
 396         if (p->iTCO_version >= 2) {
 397                 spin_lock(&p->io_lock);
 398                 val16 = inw(TCO_RLD(p));
 399                 val16 &= 0x3ff;
 400                 spin_unlock(&p->io_lock);
 401 
 402                 time_left = ticks_to_seconds(p, val16);
 403         } else if (p->iTCO_version == 1) {
 404                 spin_lock(&p->io_lock);
 405                 val8 = inb(TCO_RLD(p));
 406                 val8 &= 0x3f;
 407                 if (!(inw(TCO1_STS(p)) & 0x0008))
 408                         val8 += (inb(TCOv1_TMR(p)) & 0x3f);
 409                 spin_unlock(&p->io_lock);
 410 
 411                 time_left = ticks_to_seconds(p, val8);
 412         }
 413         return time_left;
 414 }
 415 
 416 /*
 417  *      Kernel Interfaces
 418  */
 419 
 420 static const struct watchdog_info ident = {
 421         .options =              WDIOF_SETTIMEOUT |
 422                                 WDIOF_KEEPALIVEPING |
 423                                 WDIOF_MAGICCLOSE,
 424         .firmware_version =     0,
 425         .identity =             DRV_NAME,
 426 };
 427 
 428 static const struct watchdog_ops iTCO_wdt_ops = {
 429         .owner =                THIS_MODULE,
 430         .start =                iTCO_wdt_start,
 431         .stop =                 iTCO_wdt_stop,
 432         .ping =                 iTCO_wdt_ping,
 433         .set_timeout =          iTCO_wdt_set_timeout,
 434         .get_timeleft =         iTCO_wdt_get_timeleft,
 435 };
 436 
 437 /*
 438  *      Init & exit routines
 439  */
 440 
 441 static int iTCO_wdt_probe(struct platform_device *pdev)
 442 {
 443         struct device *dev = &pdev->dev;
 444         struct itco_wdt_platform_data *pdata = dev_get_platdata(dev);
 445         struct iTCO_wdt_private *p;
 446         unsigned long val32;
 447         int ret;
 448 
 449         if (!pdata)
 450                 return -ENODEV;
 451 
 452         p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
 453         if (!p)
 454                 return -ENOMEM;
 455 
 456         spin_lock_init(&p->io_lock);
 457 
 458         p->tco_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_TCO);
 459         if (!p->tco_res)
 460                 return -ENODEV;
 461 
 462         p->iTCO_version = pdata->version;
 463         p->pci_dev = to_pci_dev(dev->parent);
 464 
 465         p->smi_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_SMI);
 466         if (p->smi_res) {
 467                 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
 468                 if (!devm_request_region(dev, p->smi_res->start,
 469                                          resource_size(p->smi_res),
 470                                          pdev->name)) {
 471                         pr_err("I/O address 0x%04llx already in use, device disabled\n",
 472                                (u64)SMI_EN(p));
 473                         return -EBUSY;
 474                 }
 475         } else if (iTCO_vendorsupport ||
 476                    turn_SMI_watchdog_clear_off >= p->iTCO_version) {
 477                 pr_err("SMI I/O resource is missing\n");
 478                 return -ENODEV;
 479         }
 480 
 481         iTCO_wdt_no_reboot_bit_setup(p, pdata);
 482 
 483         /*
 484          * Get the Memory-Mapped GCS or PMC register, we need it for the
 485          * NO_REBOOT flag (TCO v2 and v3).
 486          */
 487         if (p->iTCO_version >= 2 && p->iTCO_version < 6 &&
 488             !pdata->update_no_reboot_bit) {
 489                 p->gcs_pmc_res = platform_get_resource(pdev,
 490                                                        IORESOURCE_MEM,
 491                                                        ICH_RES_MEM_GCS_PMC);
 492                 p->gcs_pmc = devm_ioremap_resource(dev, p->gcs_pmc_res);
 493                 if (IS_ERR(p->gcs_pmc))
 494                         return PTR_ERR(p->gcs_pmc);
 495         }
 496 
 497         /* Check chipset's NO_REBOOT bit */
 498         if (p->update_no_reboot_bit(p->no_reboot_priv, false) &&
 499             iTCO_vendor_check_noreboot_on()) {
 500                 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
 501                 return -ENODEV; /* Cannot reset NO_REBOOT bit */
 502         }
 503 
 504         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 505         p->update_no_reboot_bit(p->no_reboot_priv, true);
 506 
 507         if (turn_SMI_watchdog_clear_off >= p->iTCO_version) {
 508                 /*
 509                  * Bit 13: TCO_EN -> 0
 510                  * Disables TCO logic generating an SMI#
 511                  */
 512                 val32 = inl(SMI_EN(p));
 513                 val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
 514                 outl(val32, SMI_EN(p));
 515         }
 516 
 517         if (!devm_request_region(dev, p->tco_res->start,
 518                                  resource_size(p->tco_res),
 519                                  pdev->name)) {
 520                 pr_err("I/O address 0x%04llx already in use, device disabled\n",
 521                        (u64)TCOBASE(p));
 522                 return -EBUSY;
 523         }
 524 
 525         pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
 526                 pdata->name, pdata->version, (u64)TCOBASE(p));
 527 
 528         /* Clear out the (probably old) status */
 529         switch (p->iTCO_version) {
 530         case 6:
 531         case 5:
 532         case 4:
 533                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 534                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 535                 break;
 536         case 3:
 537                 outl(0x20008, TCO1_STS(p));
 538                 break;
 539         case 2:
 540         case 1:
 541         default:
 542                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 543                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 544                 outw(0x0004, TCO2_STS(p)); /* Clear BOOT_STS bit */
 545                 break;
 546         }
 547 
 548         p->wddev.info = &ident,
 549         p->wddev.ops = &iTCO_wdt_ops,
 550         p->wddev.bootstatus = 0;
 551         p->wddev.timeout = WATCHDOG_TIMEOUT;
 552         watchdog_set_nowayout(&p->wddev, nowayout);
 553         p->wddev.parent = dev;
 554 
 555         watchdog_set_drvdata(&p->wddev, p);
 556         platform_set_drvdata(pdev, p);
 557 
 558         /* Make sure the watchdog is not running */
 559         iTCO_wdt_stop(&p->wddev);
 560 
 561         /* Check that the heartbeat value is within it's range;
 562            if not reset to the default */
 563         if (iTCO_wdt_set_timeout(&p->wddev, heartbeat)) {
 564                 iTCO_wdt_set_timeout(&p->wddev, WATCHDOG_TIMEOUT);
 565                 pr_info("timeout value out of range, using %d\n",
 566                         WATCHDOG_TIMEOUT);
 567         }
 568 
 569         watchdog_stop_on_reboot(&p->wddev);
 570         watchdog_stop_on_unregister(&p->wddev);
 571         ret = devm_watchdog_register_device(dev, &p->wddev);
 572         if (ret != 0) {
 573                 pr_err("cannot register watchdog device (err=%d)\n", ret);
 574                 return ret;
 575         }
 576 
 577         pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
 578                 heartbeat, nowayout);
 579 
 580         return 0;
 581 }
 582 
 583 #ifdef CONFIG_PM_SLEEP
 584 /*
 585  * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
 586  * the watchdog cannot be pinged while in that state.  In ACPI sleep states the
 587  * watchdog is stopped by the platform firmware.
 588  */
 589 
 590 #ifdef CONFIG_ACPI
 591 static inline bool need_suspend(void)
 592 {
 593         return acpi_target_system_state() == ACPI_STATE_S0;
 594 }
 595 #else
 596 static inline bool need_suspend(void) { return true; }
 597 #endif
 598 
 599 static int iTCO_wdt_suspend_noirq(struct device *dev)
 600 {
 601         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 602         int ret = 0;
 603 
 604         p->suspended = false;
 605         if (watchdog_active(&p->wddev) && need_suspend()) {
 606                 ret = iTCO_wdt_stop(&p->wddev);
 607                 if (!ret)
 608                         p->suspended = true;
 609         }
 610         return ret;
 611 }
 612 
 613 static int iTCO_wdt_resume_noirq(struct device *dev)
 614 {
 615         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 616 
 617         if (p->suspended)
 618                 iTCO_wdt_start(&p->wddev);
 619 
 620         return 0;
 621 }
 622 
 623 static const struct dev_pm_ops iTCO_wdt_pm = {
 624         .suspend_noirq = iTCO_wdt_suspend_noirq,
 625         .resume_noirq = iTCO_wdt_resume_noirq,
 626 };
 627 
 628 #define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
 629 #else
 630 #define ITCO_WDT_PM_OPS NULL
 631 #endif /* CONFIG_PM_SLEEP */
 632 
 633 static struct platform_driver iTCO_wdt_driver = {
 634         .probe          = iTCO_wdt_probe,
 635         .driver         = {
 636                 .name   = DRV_NAME,
 637                 .pm     = ITCO_WDT_PM_OPS,
 638         },
 639 };
 640 
 641 static int __init iTCO_wdt_init_module(void)
 642 {
 643         pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
 644 
 645         return platform_driver_register(&iTCO_wdt_driver);
 646 }
 647 
 648 static void __exit iTCO_wdt_cleanup_module(void)
 649 {
 650         platform_driver_unregister(&iTCO_wdt_driver);
 651         pr_info("Watchdog Module Unloaded\n");
 652 }
 653 
 654 module_init(iTCO_wdt_init_module);
 655 module_exit(iTCO_wdt_cleanup_module);
 656 
 657 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
 658 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
 659 MODULE_VERSION(DRV_VERSION);
 660 MODULE_LICENSE("GPL");
 661 MODULE_ALIAS("platform:" DRV_NAME);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/watchdog/iTCO_wdt.c

DEFINITIONS
