drivers/watchdog/max63xx

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This source file includes following definitions.
max63xx_select_timeout
max63xx_wdt_ping
max63xx_wdt_start
max63xx_wdt_stop
max63xx_mmap_ping
max63xx_mmap_set
max63xx_mmap_init
max63xx_wdt_probe
   1 /*
   2  * drivers/char/watchdog/max63xx_wdt.c
   3  *
   4  * Driver for max63{69,70,71,72,73,74} watchdog timers
   5  *
   6  * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2. This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  *
  12  * This driver assumes the watchdog pins are memory mapped (as it is
  13  * the case for the Arcom Zeus). Should it be connected over GPIOs or
  14  * another interface, some abstraction will have to be introduced.
  15  */
  16 
  17 #include <linux/err.h>
  18 #include <linux/module.h>
  19 #include <linux/moduleparam.h>
  20 #include <linux/mod_devicetable.h>
  21 #include <linux/types.h>
  22 #include <linux/kernel.h>
  23 #include <linux/watchdog.h>
  24 #include <linux/bitops.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/io.h>
  28 #include <linux/slab.h>
  29 
  30 #define DEFAULT_HEARTBEAT 60
  31 #define MAX_HEARTBEAT     60
  32 
  33 static unsigned int heartbeat = DEFAULT_HEARTBEAT;
  34 static bool nowayout  = WATCHDOG_NOWAYOUT;
  35 
  36 /*
  37  * Memory mapping: a single byte, 3 first lower bits to select bit 3
  38  * to ping the watchdog.
  39  */
  40 #define MAX6369_WDSET   (7 << 0)
  41 #define MAX6369_WDI     (1 << 3)
  42 
  43 #define MAX6369_WDSET_DISABLED  3
  44 
  45 static int nodelay;
  46 
  47 struct max63xx_wdt {
  48         struct watchdog_device wdd;
  49         const struct max63xx_timeout *timeout;
  50 
  51         /* memory mapping */
  52         void __iomem *base;
  53         spinlock_t lock;
  54 
  55         /* WDI and WSET bits write access routines */
  56         void (*ping)(struct max63xx_wdt *wdt);
  57         void (*set)(struct max63xx_wdt *wdt, u8 set);
  58 };
  59 
  60 /*
  61  * The timeout values used are actually the absolute minimum the chip
  62  * offers. Typical values on my board are slightly over twice as long
  63  * (10s setting ends up with a 25s timeout), and can be up to 3 times
  64  * the nominal setting (according to the datasheet). So please take
  65  * these values with a grain of salt. Same goes for the initial delay
  66  * "feature". Only max6373/74 have a few settings without this initial
  67  * delay (selected with the "nodelay" parameter).
  68  *
  69  * I also decided to remove from the tables any timeout smaller than a
  70  * second, as it looked completly overkill...
  71  */
  72 
  73 /* Timeouts in second */
  74 struct max63xx_timeout {
  75         const u8 wdset;
  76         const u8 tdelay;
  77         const u8 twd;
  78 };
  79 
  80 static const struct max63xx_timeout max6369_table[] = {
  81         { 5,  1,  1 },
  82         { 6, 10, 10 },
  83         { 7, 60, 60 },
  84         { },
  85 };
  86 
  87 static const struct max63xx_timeout max6371_table[] = {
  88         { 6, 60,  3 },
  89         { 7, 60, 60 },
  90         { },
  91 };
  92 
  93 static const struct max63xx_timeout max6373_table[] = {
  94         { 2, 60,  1 },
  95         { 5,  0,  1 },
  96         { 1,  3,  3 },
  97         { 7, 60, 10 },
  98         { 6,  0, 10 },
  99         { },
 100 };
 101 
 102 static struct max63xx_timeout *
 103 max63xx_select_timeout(struct max63xx_timeout *table, int value)
 104 {
 105         while (table->twd) {
 106                 if (value <= table->twd) {
 107                         if (nodelay && table->tdelay == 0)
 108                                 return table;
 109 
 110                         if (!nodelay)
 111                                 return table;
 112                 }
 113 
 114                 table++;
 115         }
 116 
 117         return NULL;
 118 }
 119 
 120 static int max63xx_wdt_ping(struct watchdog_device *wdd)
 121 {
 122         struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
 123 
 124         wdt->ping(wdt);
 125         return 0;
 126 }
 127 
 128 static int max63xx_wdt_start(struct watchdog_device *wdd)
 129 {
 130         struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
 131 
 132         wdt->set(wdt, wdt->timeout->wdset);
 133 
 134         /* check for a edge triggered startup */
 135         if (wdt->timeout->tdelay == 0)
 136                 wdt->ping(wdt);
 137         return 0;
 138 }
 139 
 140 static int max63xx_wdt_stop(struct watchdog_device *wdd)
 141 {
 142         struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
 143 
 144         wdt->set(wdt, MAX6369_WDSET_DISABLED);
 145         return 0;
 146 }
 147 
 148 static const struct watchdog_ops max63xx_wdt_ops = {
 149         .owner = THIS_MODULE,
 150         .start = max63xx_wdt_start,
 151         .stop = max63xx_wdt_stop,
 152         .ping = max63xx_wdt_ping,
 153 };
 154 
 155 static const struct watchdog_info max63xx_wdt_info = {
 156         .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
 157         .identity = "max63xx Watchdog",
 158 };
 159 
 160 static void max63xx_mmap_ping(struct max63xx_wdt *wdt)
 161 {
 162         u8 val;
 163 
 164         spin_lock(&wdt->lock);
 165 
 166         val = __raw_readb(wdt->base);
 167 
 168         __raw_writeb(val | MAX6369_WDI, wdt->base);
 169         __raw_writeb(val & ~MAX6369_WDI, wdt->base);
 170 
 171         spin_unlock(&wdt->lock);
 172 }
 173 
 174 static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set)
 175 {
 176         u8 val;
 177 
 178         spin_lock(&wdt->lock);
 179 
 180         val = __raw_readb(wdt->base);
 181         val &= ~MAX6369_WDSET;
 182         val |= set & MAX6369_WDSET;
 183         __raw_writeb(val, wdt->base);
 184 
 185         spin_unlock(&wdt->lock);
 186 }
 187 
 188 static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt)
 189 {
 190         wdt->base = devm_platform_ioremap_resource(p, 0);
 191         if (IS_ERR(wdt->base))
 192                 return PTR_ERR(wdt->base);
 193 
 194         spin_lock_init(&wdt->lock);
 195 
 196         wdt->ping = max63xx_mmap_ping;
 197         wdt->set = max63xx_mmap_set;
 198         return 0;
 199 }
 200 
 201 static int max63xx_wdt_probe(struct platform_device *pdev)
 202 {
 203         struct device *dev = &pdev->dev;
 204         struct max63xx_wdt *wdt;
 205         struct max63xx_timeout *table;
 206         int err;
 207 
 208         wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
 209         if (!wdt)
 210                 return -ENOMEM;
 211 
 212         table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
 213 
 214         if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
 215                 heartbeat = DEFAULT_HEARTBEAT;
 216 
 217         wdt->timeout = max63xx_select_timeout(table, heartbeat);
 218         if (!wdt->timeout) {
 219                 dev_err(dev, "unable to satisfy %ds heartbeat request\n",
 220                         heartbeat);
 221                 return -EINVAL;
 222         }
 223 
 224         err = max63xx_mmap_init(pdev, wdt);
 225         if (err)
 226                 return err;
 227 
 228         platform_set_drvdata(pdev, &wdt->wdd);
 229         watchdog_set_drvdata(&wdt->wdd, wdt);
 230 
 231         wdt->wdd.parent = dev;
 232         wdt->wdd.timeout = wdt->timeout->twd;
 233         wdt->wdd.info = &max63xx_wdt_info;
 234         wdt->wdd.ops = &max63xx_wdt_ops;
 235 
 236         watchdog_set_nowayout(&wdt->wdd, nowayout);
 237 
 238         err = devm_watchdog_register_device(dev, &wdt->wdd);
 239         if (err)
 240                 return err;
 241 
 242         dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
 243                  wdt->timeout->twd, wdt->timeout->tdelay);
 244         return 0;
 245 }
 246 
 247 static const struct platform_device_id max63xx_id_table[] = {
 248         { "max6369_wdt", (kernel_ulong_t)max6369_table, },
 249         { "max6370_wdt", (kernel_ulong_t)max6369_table, },
 250         { "max6371_wdt", (kernel_ulong_t)max6371_table, },
 251         { "max6372_wdt", (kernel_ulong_t)max6371_table, },
 252         { "max6373_wdt", (kernel_ulong_t)max6373_table, },
 253         { "max6374_wdt", (kernel_ulong_t)max6373_table, },
 254         { },
 255 };
 256 MODULE_DEVICE_TABLE(platform, max63xx_id_table);
 257 
 258 static struct platform_driver max63xx_wdt_driver = {
 259         .probe          = max63xx_wdt_probe,
 260         .id_table       = max63xx_id_table,
 261         .driver         = {
 262                 .name   = "max63xx_wdt",
 263         },
 264 };
 265 
 266 module_platform_driver(max63xx_wdt_driver);
 267 
 268 MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
 269 MODULE_DESCRIPTION("max63xx Watchdog Driver");
 270 
 271 module_param(heartbeat, int, 0);
 272 MODULE_PARM_DESC(heartbeat,
 273                  "Watchdog heartbeat period in seconds from 1 to "
 274                  __MODULE_STRING(MAX_HEARTBEAT) ", default "
 275                  __MODULE_STRING(DEFAULT_HEARTBEAT));
 276 
 277 module_param(nowayout, bool, 0);
 278 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 279                  __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 280 
 281 module_param(nodelay, int, 0);
 282 MODULE_PARM_DESC(nodelay,
 283                  "Force selection of a timeout setting without initial delay "
 284                  "(max6373/74 only, default=0)");
 285 
 286 MODULE_LICENSE("GPL v2");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/watchdog/max63xx_wdt.c

DEFINITIONS
