root/drivers/pinctrl/pinctrl-axp209.c

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DEFINITIONS

This source file includes following definitions.
  1. axp20x_gpio_get_reg
  2. axp20x_gpio_input
  3. axp20x_gpio_get
  4. axp20x_gpio_get_direction
  5. axp20x_gpio_output
  6. axp20x_gpio_set
  7. axp20x_pmx_set
  8. axp20x_pmx_func_cnt
  9. axp20x_pmx_func_name
  10. axp20x_pmx_func_groups
  11. axp20x_pmx_set_mux
  12. axp20x_pmx_gpio_set_direction
  13. axp20x_groups_cnt
  14. axp20x_group_pins
  15. axp20x_group_name
  16. axp20x_funcs_groups_from_mask
  17. axp20x_build_funcs_groups
  18. axp20x_pctl_probe

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * AXP20x pinctrl and GPIO driver
   4  *
   5  * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
   6  * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com>
   7  */
   8 
   9 #include <linux/bitops.h>
  10 #include <linux/device.h>
  11 #include <linux/gpio/driver.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel.h>
  15 #include <linux/mfd/axp20x.h>
  16 #include <linux/module.h>
  17 #include <linux/of.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pinctrl/pinconf-generic.h>
  20 #include <linux/pinctrl/pinctrl.h>
  21 #include <linux/pinctrl/pinmux.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/regmap.h>
  24 #include <linux/slab.h>
  25 
  26 #define AXP20X_GPIO_FUNCTIONS           0x7
  27 #define AXP20X_GPIO_FUNCTION_OUT_LOW    0
  28 #define AXP20X_GPIO_FUNCTION_OUT_HIGH   1
  29 #define AXP20X_GPIO_FUNCTION_INPUT      2
  30 
  31 #define AXP20X_FUNC_GPIO_OUT            0
  32 #define AXP20X_FUNC_GPIO_IN             1
  33 #define AXP20X_FUNC_LDO                 2
  34 #define AXP20X_FUNC_ADC                 3
  35 #define AXP20X_FUNCS_NB                 4
  36 
  37 #define AXP20X_MUX_GPIO_OUT             0
  38 #define AXP20X_MUX_GPIO_IN              BIT(1)
  39 #define AXP20X_MUX_ADC                  BIT(2)
  40 
  41 #define AXP813_MUX_ADC                  (BIT(2) | BIT(0))
  42 
  43 struct axp20x_pctrl_desc {
  44         const struct pinctrl_pin_desc   *pins;
  45         unsigned int                    npins;
  46         /* Stores the pins supporting LDO function. Bit offset is pin number. */
  47         u8                              ldo_mask;
  48         /* Stores the pins supporting ADC function. Bit offset is pin number. */
  49         u8                              adc_mask;
  50         u8                              gpio_status_offset;
  51         u8                              adc_mux;
  52 };
  53 
  54 struct axp20x_pinctrl_function {
  55         const char      *name;
  56         unsigned int    muxval;
  57         const char      **groups;
  58         unsigned int    ngroups;
  59 };
  60 
  61 struct axp20x_pctl {
  62         struct gpio_chip        chip;
  63         struct regmap           *regmap;
  64         struct pinctrl_dev                      *pctl_dev;
  65         struct device                           *dev;
  66         const struct axp20x_pctrl_desc          *desc;
  67         struct axp20x_pinctrl_function          funcs[AXP20X_FUNCS_NB];
  68 };
  69 
  70 static const struct pinctrl_pin_desc axp209_pins[] = {
  71         PINCTRL_PIN(0, "GPIO0"),
  72         PINCTRL_PIN(1, "GPIO1"),
  73         PINCTRL_PIN(2, "GPIO2"),
  74 };
  75 
  76 static const struct pinctrl_pin_desc axp813_pins[] = {
  77         PINCTRL_PIN(0, "GPIO0"),
  78         PINCTRL_PIN(1, "GPIO1"),
  79 };
  80 
  81 static const struct axp20x_pctrl_desc axp20x_data = {
  82         .pins   = axp209_pins,
  83         .npins  = ARRAY_SIZE(axp209_pins),
  84         .ldo_mask = BIT(0) | BIT(1),
  85         .adc_mask = BIT(0) | BIT(1),
  86         .gpio_status_offset = 4,
  87         .adc_mux = AXP20X_MUX_ADC,
  88 };
  89 
  90 static const struct axp20x_pctrl_desc axp813_data = {
  91         .pins   = axp813_pins,
  92         .npins  = ARRAY_SIZE(axp813_pins),
  93         .ldo_mask = BIT(0) | BIT(1),
  94         .adc_mask = BIT(0),
  95         .gpio_status_offset = 0,
  96         .adc_mux = AXP813_MUX_ADC,
  97 };
  98 
  99 static int axp20x_gpio_get_reg(unsigned int offset)
 100 {
 101         switch (offset) {
 102         case 0:
 103                 return AXP20X_GPIO0_CTRL;
 104         case 1:
 105                 return AXP20X_GPIO1_CTRL;
 106         case 2:
 107                 return AXP20X_GPIO2_CTRL;
 108         }
 109 
 110         return -EINVAL;
 111 }
 112 
 113 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset)
 114 {
 115         return pinctrl_gpio_direction_input(chip->base + offset);
 116 }
 117 
 118 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
 119 {
 120         struct axp20x_pctl *pctl = gpiochip_get_data(chip);
 121         unsigned int val;
 122         int ret;
 123 
 124         ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val);
 125         if (ret)
 126                 return ret;
 127 
 128         return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
 129 }
 130 
 131 static int axp20x_gpio_get_direction(struct gpio_chip *chip,
 132                                      unsigned int offset)
 133 {
 134         struct axp20x_pctl *pctl = gpiochip_get_data(chip);
 135         unsigned int val;
 136         int reg, ret;
 137 
 138         reg = axp20x_gpio_get_reg(offset);
 139         if (reg < 0)
 140                 return reg;
 141 
 142         ret = regmap_read(pctl->regmap, reg, &val);
 143         if (ret)
 144                 return ret;
 145 
 146         /*
 147          * This shouldn't really happen if the pin is in use already,
 148          * or if it's not in use yet, it doesn't matter since we're
 149          * going to change the value soon anyway. Default to output.
 150          */
 151         if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
 152                 return 0;
 153 
 154         /*
 155          * The GPIO directions are the three lowest values.
 156          * 2 is input, 0 and 1 are output
 157          */
 158         return val & 2;
 159 }
 160 
 161 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
 162                               int value)
 163 {
 164         chip->set(chip, offset, value);
 165 
 166         return 0;
 167 }
 168 
 169 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset,
 170                             int value)
 171 {
 172         struct axp20x_pctl *pctl = gpiochip_get_data(chip);
 173         int reg;
 174 
 175         reg = axp20x_gpio_get_reg(offset);
 176         if (reg < 0)
 177                 return;
 178 
 179         regmap_update_bits(pctl->regmap, reg,
 180                            AXP20X_GPIO_FUNCTIONS,
 181                            value ? AXP20X_GPIO_FUNCTION_OUT_HIGH :
 182                            AXP20X_GPIO_FUNCTION_OUT_LOW);
 183 }
 184 
 185 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,
 186                           u8 config)
 187 {
 188         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 189         int reg;
 190 
 191         reg = axp20x_gpio_get_reg(offset);
 192         if (reg < 0)
 193                 return reg;
 194 
 195         return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
 196                                   config);
 197 }
 198 
 199 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev)
 200 {
 201         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 202 
 203         return ARRAY_SIZE(pctl->funcs);
 204 }
 205 
 206 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev,
 207                                         unsigned int selector)
 208 {
 209         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 210 
 211         return pctl->funcs[selector].name;
 212 }
 213 
 214 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev,
 215                                   unsigned int selector,
 216                                   const char * const **groups,
 217                                   unsigned int *num_groups)
 218 {
 219         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 220 
 221         *groups = pctl->funcs[selector].groups;
 222         *num_groups = pctl->funcs[selector].ngroups;
 223 
 224         return 0;
 225 }
 226 
 227 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev,
 228                               unsigned int function, unsigned int group)
 229 {
 230         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 231         unsigned int mask;
 232 
 233         /* Every pin supports GPIO_OUT and GPIO_IN functions */
 234         if (function <= AXP20X_FUNC_GPIO_IN)
 235                 return axp20x_pmx_set(pctldev, group,
 236                                       pctl->funcs[function].muxval);
 237 
 238         if (function == AXP20X_FUNC_LDO)
 239                 mask = pctl->desc->ldo_mask;
 240         else
 241                 mask = pctl->desc->adc_mask;
 242 
 243         if (!(BIT(group) & mask))
 244                 return -EINVAL;
 245 
 246         /*
 247          * We let the regulator framework handle the LDO muxing as muxing bits
 248          * are basically also regulators on/off bits. It's better not to enforce
 249          * any state of the regulator when selecting LDO mux so that we don't
 250          * interfere with the regulator driver.
 251          */
 252         if (function == AXP20X_FUNC_LDO)
 253                 return 0;
 254 
 255         return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);
 256 }
 257 
 258 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
 259                                          struct pinctrl_gpio_range *range,
 260                                          unsigned int offset, bool input)
 261 {
 262         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 263 
 264         if (input)
 265                 return axp20x_pmx_set(pctldev, offset,
 266                                       pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);
 267 
 268         return axp20x_pmx_set(pctldev, offset,
 269                               pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);
 270 }
 271 
 272 static const struct pinmux_ops axp20x_pmx_ops = {
 273         .get_functions_count    = axp20x_pmx_func_cnt,
 274         .get_function_name      = axp20x_pmx_func_name,
 275         .get_function_groups    = axp20x_pmx_func_groups,
 276         .set_mux                = axp20x_pmx_set_mux,
 277         .gpio_set_direction     = axp20x_pmx_gpio_set_direction,
 278         .strict                 = true,
 279 };
 280 
 281 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev)
 282 {
 283         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 284 
 285         return pctl->desc->npins;
 286 }
 287 
 288 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
 289                              const unsigned int **pins, unsigned int *num_pins)
 290 {
 291         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 292 
 293         *pins = (unsigned int *)&pctl->desc->pins[selector];
 294         *num_pins = 1;
 295 
 296         return 0;
 297 }
 298 
 299 static const char *axp20x_group_name(struct pinctrl_dev *pctldev,
 300                                      unsigned int selector)
 301 {
 302         struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
 303 
 304         return pctl->desc->pins[selector].name;
 305 }
 306 
 307 static const struct pinctrl_ops axp20x_pctrl_ops = {
 308         .dt_node_to_map         = pinconf_generic_dt_node_to_map_group,
 309         .dt_free_map            = pinconf_generic_dt_free_map,
 310         .get_groups_count       = axp20x_groups_cnt,
 311         .get_group_name         = axp20x_group_name,
 312         .get_group_pins         = axp20x_group_pins,
 313 };
 314 
 315 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask,
 316                                           unsigned int mask_len,
 317                                           struct axp20x_pinctrl_function *func,
 318                                           const struct pinctrl_pin_desc *pins)
 319 {
 320         unsigned long int mask_cpy = mask;
 321         const char **group;
 322         unsigned int ngroups = hweight8(mask);
 323         int bit;
 324 
 325         func->ngroups = ngroups;
 326         if (func->ngroups > 0) {
 327                 func->groups = devm_kcalloc(dev,
 328                                             ngroups, sizeof(const char *),
 329                                             GFP_KERNEL);
 330                 if (!func->groups)
 331                         return -ENOMEM;
 332                 group = func->groups;
 333                 for_each_set_bit(bit, &mask_cpy, mask_len) {
 334                         *group = pins[bit].name;
 335                         group++;
 336                 }
 337         }
 338 
 339         return 0;
 340 }
 341 
 342 static int axp20x_build_funcs_groups(struct platform_device *pdev)
 343 {
 344         struct axp20x_pctl *pctl = platform_get_drvdata(pdev);
 345         int i, ret, pin, npins = pctl->desc->npins;
 346 
 347         pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";
 348         pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;
 349         pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";
 350         pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;
 351         pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";
 352         /*
 353          * Muxval for LDO is useless as we won't use it.
 354          * See comment in axp20x_pmx_set_mux.
 355          */
 356         pctl->funcs[AXP20X_FUNC_ADC].name = "adc";
 357         pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux;
 358 
 359         /* Every pin supports GPIO_OUT and GPIO_IN functions */
 360         for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) {
 361                 pctl->funcs[i].ngroups = npins;
 362                 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev,
 363                                                      npins, sizeof(char *),
 364                                                      GFP_KERNEL);
 365                 if (!pctl->funcs[i].groups)
 366                         return -ENOMEM;
 367                 for (pin = 0; pin < npins; pin++)
 368                         pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;
 369         }
 370 
 371         ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask,
 372                                       npins, &pctl->funcs[AXP20X_FUNC_LDO],
 373                                       pctl->desc->pins);
 374         if (ret)
 375                 return ret;
 376 
 377         ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask,
 378                                       npins, &pctl->funcs[AXP20X_FUNC_ADC],
 379                                       pctl->desc->pins);
 380         if (ret)
 381                 return ret;
 382 
 383         return 0;
 384 }
 385 
 386 static const struct of_device_id axp20x_pctl_match[] = {
 387         { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, },
 388         { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, },
 389         { }
 390 };
 391 MODULE_DEVICE_TABLE(of, axp20x_pctl_match);
 392 
 393 static int axp20x_pctl_probe(struct platform_device *pdev)
 394 {
 395         struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
 396         struct axp20x_pctl *pctl;
 397         struct device *dev = &pdev->dev;
 398         struct pinctrl_desc *pctrl_desc;
 399         int ret;
 400 
 401         if (!of_device_is_available(pdev->dev.of_node))
 402                 return -ENODEV;
 403 
 404         if (!axp20x) {
 405                 dev_err(&pdev->dev, "Parent drvdata not set\n");
 406                 return -EINVAL;
 407         }
 408 
 409         pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 410         if (!pctl)
 411                 return -ENOMEM;
 412 
 413         pctl->chip.base                 = -1;
 414         pctl->chip.can_sleep            = true;
 415         pctl->chip.request              = gpiochip_generic_request;
 416         pctl->chip.free                 = gpiochip_generic_free;
 417         pctl->chip.parent               = &pdev->dev;
 418         pctl->chip.label                = dev_name(&pdev->dev);
 419         pctl->chip.owner                = THIS_MODULE;
 420         pctl->chip.get                  = axp20x_gpio_get;
 421         pctl->chip.get_direction        = axp20x_gpio_get_direction;
 422         pctl->chip.set                  = axp20x_gpio_set;
 423         pctl->chip.direction_input      = axp20x_gpio_input;
 424         pctl->chip.direction_output     = axp20x_gpio_output;
 425 
 426         pctl->desc = of_device_get_match_data(dev);
 427 
 428         pctl->chip.ngpio                = pctl->desc->npins;
 429 
 430         pctl->regmap = axp20x->regmap;
 431         pctl->dev = &pdev->dev;
 432 
 433         platform_set_drvdata(pdev, pctl);
 434 
 435         ret = axp20x_build_funcs_groups(pdev);
 436         if (ret) {
 437                 dev_err(&pdev->dev, "failed to build groups\n");
 438                 return ret;
 439         }
 440 
 441         pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);
 442         if (!pctrl_desc)
 443                 return -ENOMEM;
 444 
 445         pctrl_desc->name = dev_name(&pdev->dev);
 446         pctrl_desc->owner = THIS_MODULE;
 447         pctrl_desc->pins = pctl->desc->pins;
 448         pctrl_desc->npins = pctl->desc->npins;
 449         pctrl_desc->pctlops = &axp20x_pctrl_ops;
 450         pctrl_desc->pmxops = &axp20x_pmx_ops;
 451 
 452         pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
 453         if (IS_ERR(pctl->pctl_dev)) {
 454                 dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
 455                 return PTR_ERR(pctl->pctl_dev);
 456         }
 457 
 458         ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl);
 459         if (ret) {
 460                 dev_err(&pdev->dev, "Failed to register GPIO chip\n");
 461                 return ret;
 462         }
 463 
 464         ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev),
 465                                      pctl->desc->pins->number,
 466                                      pctl->desc->pins->number,
 467                                      pctl->desc->npins);
 468         if (ret) {
 469                 dev_err(&pdev->dev, "failed to add pin range\n");
 470                 return ret;
 471         }
 472 
 473         dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n");
 474 
 475         return 0;
 476 }
 477 
 478 static struct platform_driver axp20x_pctl_driver = {
 479         .probe          = axp20x_pctl_probe,
 480         .driver = {
 481                 .name           = "axp20x-gpio",
 482                 .of_match_table = axp20x_pctl_match,
 483         },
 484 };
 485 
 486 module_platform_driver(axp20x_pctl_driver);
 487 
 488 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
 489 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
 490 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver");
 491 MODULE_LICENSE("GPL");

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