This source file includes following definitions.
- mdm9615_pinctrl_probe
- mdm9615_pinctrl_init
- mdm9615_pinctrl_exit
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8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/platform_device.h>
11 #include <linux/pinctrl/pinctrl.h>
12 #include <linux/pinctrl/pinmux.h>
13
14 #include "pinctrl-msm.h"
15
16 static const struct pinctrl_pin_desc mdm9615_pins[] = {
17 PINCTRL_PIN(0, "GPIO_0"),
18 PINCTRL_PIN(1, "GPIO_1"),
19 PINCTRL_PIN(2, "GPIO_2"),
20 PINCTRL_PIN(3, "GPIO_3"),
21 PINCTRL_PIN(4, "GPIO_4"),
22 PINCTRL_PIN(5, "GPIO_5"),
23 PINCTRL_PIN(6, "GPIO_6"),
24 PINCTRL_PIN(7, "GPIO_7"),
25 PINCTRL_PIN(8, "GPIO_8"),
26 PINCTRL_PIN(9, "GPIO_9"),
27 PINCTRL_PIN(10, "GPIO_10"),
28 PINCTRL_PIN(11, "GPIO_11"),
29 PINCTRL_PIN(12, "GPIO_12"),
30 PINCTRL_PIN(13, "GPIO_13"),
31 PINCTRL_PIN(14, "GPIO_14"),
32 PINCTRL_PIN(15, "GPIO_15"),
33 PINCTRL_PIN(16, "GPIO_16"),
34 PINCTRL_PIN(17, "GPIO_17"),
35 PINCTRL_PIN(18, "GPIO_18"),
36 PINCTRL_PIN(19, "GPIO_19"),
37 PINCTRL_PIN(20, "GPIO_20"),
38 PINCTRL_PIN(21, "GPIO_21"),
39 PINCTRL_PIN(22, "GPIO_22"),
40 PINCTRL_PIN(23, "GPIO_23"),
41 PINCTRL_PIN(24, "GPIO_24"),
42 PINCTRL_PIN(25, "GPIO_25"),
43 PINCTRL_PIN(26, "GPIO_26"),
44 PINCTRL_PIN(27, "GPIO_27"),
45 PINCTRL_PIN(28, "GPIO_28"),
46 PINCTRL_PIN(29, "GPIO_29"),
47 PINCTRL_PIN(30, "GPIO_30"),
48 PINCTRL_PIN(31, "GPIO_31"),
49 PINCTRL_PIN(32, "GPIO_32"),
50 PINCTRL_PIN(33, "GPIO_33"),
51 PINCTRL_PIN(34, "GPIO_34"),
52 PINCTRL_PIN(35, "GPIO_35"),
53 PINCTRL_PIN(36, "GPIO_36"),
54 PINCTRL_PIN(37, "GPIO_37"),
55 PINCTRL_PIN(38, "GPIO_38"),
56 PINCTRL_PIN(39, "GPIO_39"),
57 PINCTRL_PIN(40, "GPIO_40"),
58 PINCTRL_PIN(41, "GPIO_41"),
59 PINCTRL_PIN(42, "GPIO_42"),
60 PINCTRL_PIN(43, "GPIO_43"),
61 PINCTRL_PIN(44, "GPIO_44"),
62 PINCTRL_PIN(45, "GPIO_45"),
63 PINCTRL_PIN(46, "GPIO_46"),
64 PINCTRL_PIN(47, "GPIO_47"),
65 PINCTRL_PIN(48, "GPIO_48"),
66 PINCTRL_PIN(49, "GPIO_49"),
67 PINCTRL_PIN(50, "GPIO_50"),
68 PINCTRL_PIN(51, "GPIO_51"),
69 PINCTRL_PIN(52, "GPIO_52"),
70 PINCTRL_PIN(53, "GPIO_53"),
71 PINCTRL_PIN(54, "GPIO_54"),
72 PINCTRL_PIN(55, "GPIO_55"),
73 PINCTRL_PIN(56, "GPIO_56"),
74 PINCTRL_PIN(57, "GPIO_57"),
75 PINCTRL_PIN(58, "GPIO_58"),
76 PINCTRL_PIN(59, "GPIO_59"),
77 PINCTRL_PIN(60, "GPIO_60"),
78 PINCTRL_PIN(61, "GPIO_61"),
79 PINCTRL_PIN(62, "GPIO_62"),
80 PINCTRL_PIN(63, "GPIO_63"),
81 PINCTRL_PIN(64, "GPIO_64"),
82 PINCTRL_PIN(65, "GPIO_65"),
83 PINCTRL_PIN(66, "GPIO_66"),
84 PINCTRL_PIN(67, "GPIO_67"),
85 PINCTRL_PIN(68, "GPIO_68"),
86 PINCTRL_PIN(69, "GPIO_69"),
87 PINCTRL_PIN(70, "GPIO_70"),
88 PINCTRL_PIN(71, "GPIO_71"),
89 PINCTRL_PIN(72, "GPIO_72"),
90 PINCTRL_PIN(73, "GPIO_73"),
91 PINCTRL_PIN(74, "GPIO_74"),
92 PINCTRL_PIN(75, "GPIO_75"),
93 PINCTRL_PIN(76, "GPIO_76"),
94 PINCTRL_PIN(77, "GPIO_77"),
95 PINCTRL_PIN(78, "GPIO_78"),
96 PINCTRL_PIN(79, "GPIO_79"),
97 PINCTRL_PIN(80, "GPIO_80"),
98 PINCTRL_PIN(81, "GPIO_81"),
99 PINCTRL_PIN(82, "GPIO_82"),
100 PINCTRL_PIN(83, "GPIO_83"),
101 PINCTRL_PIN(84, "GPIO_84"),
102 PINCTRL_PIN(85, "GPIO_85"),
103 PINCTRL_PIN(86, "GPIO_86"),
104 PINCTRL_PIN(87, "GPIO_87"),
105 };
106
107 #define DECLARE_MSM_GPIO_PINS(pin) \
108 static const unsigned int gpio##pin##_pins[] = { pin }
109 DECLARE_MSM_GPIO_PINS(0);
110 DECLARE_MSM_GPIO_PINS(1);
111 DECLARE_MSM_GPIO_PINS(2);
112 DECLARE_MSM_GPIO_PINS(3);
113 DECLARE_MSM_GPIO_PINS(4);
114 DECLARE_MSM_GPIO_PINS(5);
115 DECLARE_MSM_GPIO_PINS(6);
116 DECLARE_MSM_GPIO_PINS(7);
117 DECLARE_MSM_GPIO_PINS(8);
118 DECLARE_MSM_GPIO_PINS(9);
119 DECLARE_MSM_GPIO_PINS(10);
120 DECLARE_MSM_GPIO_PINS(11);
121 DECLARE_MSM_GPIO_PINS(12);
122 DECLARE_MSM_GPIO_PINS(13);
123 DECLARE_MSM_GPIO_PINS(14);
124 DECLARE_MSM_GPIO_PINS(15);
125 DECLARE_MSM_GPIO_PINS(16);
126 DECLARE_MSM_GPIO_PINS(17);
127 DECLARE_MSM_GPIO_PINS(18);
128 DECLARE_MSM_GPIO_PINS(19);
129 DECLARE_MSM_GPIO_PINS(20);
130 DECLARE_MSM_GPIO_PINS(21);
131 DECLARE_MSM_GPIO_PINS(22);
132 DECLARE_MSM_GPIO_PINS(23);
133 DECLARE_MSM_GPIO_PINS(24);
134 DECLARE_MSM_GPIO_PINS(25);
135 DECLARE_MSM_GPIO_PINS(26);
136 DECLARE_MSM_GPIO_PINS(27);
137 DECLARE_MSM_GPIO_PINS(28);
138 DECLARE_MSM_GPIO_PINS(29);
139 DECLARE_MSM_GPIO_PINS(30);
140 DECLARE_MSM_GPIO_PINS(31);
141 DECLARE_MSM_GPIO_PINS(32);
142 DECLARE_MSM_GPIO_PINS(33);
143 DECLARE_MSM_GPIO_PINS(34);
144 DECLARE_MSM_GPIO_PINS(35);
145 DECLARE_MSM_GPIO_PINS(36);
146 DECLARE_MSM_GPIO_PINS(37);
147 DECLARE_MSM_GPIO_PINS(38);
148 DECLARE_MSM_GPIO_PINS(39);
149 DECLARE_MSM_GPIO_PINS(40);
150 DECLARE_MSM_GPIO_PINS(41);
151 DECLARE_MSM_GPIO_PINS(42);
152 DECLARE_MSM_GPIO_PINS(43);
153 DECLARE_MSM_GPIO_PINS(44);
154 DECLARE_MSM_GPIO_PINS(45);
155 DECLARE_MSM_GPIO_PINS(46);
156 DECLARE_MSM_GPIO_PINS(47);
157 DECLARE_MSM_GPIO_PINS(48);
158 DECLARE_MSM_GPIO_PINS(49);
159 DECLARE_MSM_GPIO_PINS(50);
160 DECLARE_MSM_GPIO_PINS(51);
161 DECLARE_MSM_GPIO_PINS(52);
162 DECLARE_MSM_GPIO_PINS(53);
163 DECLARE_MSM_GPIO_PINS(54);
164 DECLARE_MSM_GPIO_PINS(55);
165 DECLARE_MSM_GPIO_PINS(56);
166 DECLARE_MSM_GPIO_PINS(57);
167 DECLARE_MSM_GPIO_PINS(58);
168 DECLARE_MSM_GPIO_PINS(59);
169 DECLARE_MSM_GPIO_PINS(60);
170 DECLARE_MSM_GPIO_PINS(61);
171 DECLARE_MSM_GPIO_PINS(62);
172 DECLARE_MSM_GPIO_PINS(63);
173 DECLARE_MSM_GPIO_PINS(64);
174 DECLARE_MSM_GPIO_PINS(65);
175 DECLARE_MSM_GPIO_PINS(66);
176 DECLARE_MSM_GPIO_PINS(67);
177 DECLARE_MSM_GPIO_PINS(68);
178 DECLARE_MSM_GPIO_PINS(69);
179 DECLARE_MSM_GPIO_PINS(70);
180 DECLARE_MSM_GPIO_PINS(71);
181 DECLARE_MSM_GPIO_PINS(72);
182 DECLARE_MSM_GPIO_PINS(73);
183 DECLARE_MSM_GPIO_PINS(74);
184 DECLARE_MSM_GPIO_PINS(75);
185 DECLARE_MSM_GPIO_PINS(76);
186 DECLARE_MSM_GPIO_PINS(77);
187 DECLARE_MSM_GPIO_PINS(78);
188 DECLARE_MSM_GPIO_PINS(79);
189 DECLARE_MSM_GPIO_PINS(80);
190 DECLARE_MSM_GPIO_PINS(81);
191 DECLARE_MSM_GPIO_PINS(82);
192 DECLARE_MSM_GPIO_PINS(83);
193 DECLARE_MSM_GPIO_PINS(84);
194 DECLARE_MSM_GPIO_PINS(85);
195 DECLARE_MSM_GPIO_PINS(86);
196 DECLARE_MSM_GPIO_PINS(87);
197
198 #define FUNCTION(fname) \
199 [MSM_MUX_##fname] = { \
200 .name = #fname, \
201 .groups = fname##_groups, \
202 .ngroups = ARRAY_SIZE(fname##_groups), \
203 }
204
205 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
206 { \
207 .name = "gpio" #id, \
208 .pins = gpio##id##_pins, \
209 .npins = ARRAY_SIZE(gpio##id##_pins), \
210 .funcs = (int[]){ \
211 MSM_MUX_gpio, \
212 MSM_MUX_##f1, \
213 MSM_MUX_##f2, \
214 MSM_MUX_##f3, \
215 MSM_MUX_##f4, \
216 MSM_MUX_##f5, \
217 MSM_MUX_##f6, \
218 MSM_MUX_##f7, \
219 MSM_MUX_##f8, \
220 MSM_MUX_##f9, \
221 MSM_MUX_##f10, \
222 MSM_MUX_##f11 \
223 }, \
224 .nfuncs = 12, \
225 .ctl_reg = 0x1000 + 0x10 * id, \
226 .io_reg = 0x1004 + 0x10 * id, \
227 .intr_cfg_reg = 0x1008 + 0x10 * id, \
228 .intr_status_reg = 0x100c + 0x10 * id, \
229 .intr_target_reg = 0x400 + 0x4 * id, \
230 .mux_bit = 2, \
231 .pull_bit = 0, \
232 .drv_bit = 6, \
233 .oe_bit = 9, \
234 .in_bit = 0, \
235 .out_bit = 1, \
236 .intr_enable_bit = 0, \
237 .intr_status_bit = 0, \
238 .intr_ack_high = 1, \
239 .intr_target_bit = 0, \
240 .intr_target_kpss_val = 4, \
241 .intr_raw_status_bit = 3, \
242 .intr_polarity_bit = 1, \
243 .intr_detection_bit = 2, \
244 .intr_detection_width = 1, \
245 }
246
247 enum mdm9615_functions {
248 MSM_MUX_gpio,
249 MSM_MUX_gsbi2_i2c,
250 MSM_MUX_gsbi3,
251 MSM_MUX_gsbi4,
252 MSM_MUX_gsbi5_i2c,
253 MSM_MUX_gsbi5_uart,
254 MSM_MUX_sdc2,
255 MSM_MUX_ebi2_lcdc,
256 MSM_MUX_ps_hold,
257 MSM_MUX_prim_audio,
258 MSM_MUX_sec_audio,
259 MSM_MUX_cdc_mclk,
260 MSM_MUX_NA,
261 };
262
263 static const char * const gpio_groups[] = {
264 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
265 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
266 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
267 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
268 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
269 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
270 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
271 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
272 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
273 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
274 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
275 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
276 "gpio85", "gpio86", "gpio87"
277 };
278
279 static const char * const gsbi2_i2c_groups[] = {
280 "gpio4", "gpio5"
281 };
282
283 static const char * const gsbi3_groups[] = {
284 "gpio8", "gpio9", "gpio10", "gpio11"
285 };
286
287 static const char * const gsbi4_groups[] = {
288 "gpio12", "gpio13", "gpio14", "gpio15"
289 };
290
291 static const char * const gsbi5_i2c_groups[] = {
292 "gpio16", "gpio17"
293 };
294
295 static const char * const gsbi5_uart_groups[] = {
296 "gpio18", "gpio19"
297 };
298
299 static const char * const sdc2_groups[] = {
300 "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
301 };
302
303 static const char * const ebi2_lcdc_groups[] = {
304 "gpio21", "gpio22", "gpio24",
305 };
306
307 static const char * const ps_hold_groups[] = {
308 "gpio83",
309 };
310
311 static const char * const prim_audio_groups[] = {
312 "gpio20", "gpio21", "gpio22", "gpio23",
313 };
314
315 static const char * const sec_audio_groups[] = {
316 "gpio25", "gpio26", "gpio27", "gpio28",
317 };
318
319 static const char * const cdc_mclk_groups[] = {
320 "gpio24",
321 };
322
323 static const struct msm_function mdm9615_functions[] = {
324 FUNCTION(gpio),
325 FUNCTION(gsbi2_i2c),
326 FUNCTION(gsbi3),
327 FUNCTION(gsbi4),
328 FUNCTION(gsbi5_i2c),
329 FUNCTION(gsbi5_uart),
330 FUNCTION(sdc2),
331 FUNCTION(ebi2_lcdc),
332 FUNCTION(ps_hold),
333 FUNCTION(prim_audio),
334 FUNCTION(sec_audio),
335 FUNCTION(cdc_mclk),
336 };
337
338 static const struct msm_pingroup mdm9615_groups[] = {
339 PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
340 PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
341 PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
342 PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
343 PINGROUP(4, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
344 PINGROUP(5, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
345 PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
346 PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
347 PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
348 PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
349 PINGROUP(10, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
350 PINGROUP(11, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
351 PINGROUP(12, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
352 PINGROUP(13, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
353 PINGROUP(14, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
354 PINGROUP(15, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
355 PINGROUP(16, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
356 PINGROUP(17, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
357 PINGROUP(18, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
358 PINGROUP(19, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
359 PINGROUP(20, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
360 PINGROUP(21, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
361 PINGROUP(22, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
362 PINGROUP(23, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
363 PINGROUP(24, cdc_mclk, NA, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA),
364 PINGROUP(25, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
365 PINGROUP(26, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
366 PINGROUP(27, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
367 PINGROUP(28, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
368 PINGROUP(29, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
369 PINGROUP(30, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
370 PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
371 PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
372 PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
373 PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
374 PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
375 PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
376 PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
377 PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
378 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
379 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
380 PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
381 PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
382 PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
383 PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
384 PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
385 PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
386 PINGROUP(47, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
387 PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
388 PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
389 PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
390 PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
391 PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
392 PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
393 PINGROUP(54, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
394 PINGROUP(55, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
395 PINGROUP(56, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
396 PINGROUP(57, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
397 PINGROUP(58, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
398 PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
399 PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
400 PINGROUP(61, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
401 PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
402 PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
403 PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
404 PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
405 PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
406 PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
407 PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
408 PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
409 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
410 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
411 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
412 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
413 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
414 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
415 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
416 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
417 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
418 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
419 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
420 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
421 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
422 PINGROUP(83, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
423 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
424 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
425 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
426 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
427 };
428
429 #define NUM_GPIO_PINGROUPS 88
430
431 static const struct msm_pinctrl_soc_data mdm9615_pinctrl = {
432 .pins = mdm9615_pins,
433 .npins = ARRAY_SIZE(mdm9615_pins),
434 .functions = mdm9615_functions,
435 .nfunctions = ARRAY_SIZE(mdm9615_functions),
436 .groups = mdm9615_groups,
437 .ngroups = ARRAY_SIZE(mdm9615_groups),
438 .ngpios = NUM_GPIO_PINGROUPS,
439 };
440
441 static int mdm9615_pinctrl_probe(struct platform_device *pdev)
442 {
443 return msm_pinctrl_probe(pdev, &mdm9615_pinctrl);
444 }
445
446 static const struct of_device_id mdm9615_pinctrl_of_match[] = {
447 { .compatible = "qcom,mdm9615-pinctrl", },
448 { },
449 };
450
451 static struct platform_driver mdm9615_pinctrl_driver = {
452 .driver = {
453 .name = "mdm9615-pinctrl",
454 .of_match_table = mdm9615_pinctrl_of_match,
455 },
456 .probe = mdm9615_pinctrl_probe,
457 .remove = msm_pinctrl_remove,
458 };
459
460 static int __init mdm9615_pinctrl_init(void)
461 {
462 return platform_driver_register(&mdm9615_pinctrl_driver);
463 }
464 arch_initcall(mdm9615_pinctrl_init);
465
466 static void __exit mdm9615_pinctrl_exit(void)
467 {
468 platform_driver_unregister(&mdm9615_pinctrl_driver);
469 }
470 module_exit(mdm9615_pinctrl_exit);
471
472 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
473 MODULE_DESCRIPTION("Qualcomm MDM9615 pinctrl driver");
474 MODULE_LICENSE("GPL v2");
475 MODULE_DEVICE_TABLE(of, mdm9615_pinctrl_of_match);