root/arch/ia64/include/asm/sal.h

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INCLUDED FROM

DEFINITIONS

This source file includes following definitions.
  1. ia64_sal_cache_init
  2. ia64_sal_clear_state_info
  3. ia64_sal_get_state_info
  4. ia64_sal_get_state_info_size
  5. ia64_sal_mc_rendez
  6. ia64_sal_mc_set_params
  7. ia64_sal_pci_config_read
  8. ia64_sal_pci_config_write
  9. ia64_sal_register_physical_addr
  10. ia64_sal_set_vectors
  11. ia64_sal_update_pal
  12. ia64_sal_physical_id_info
   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_IA64_SAL_H
   3 #define _ASM_IA64_SAL_H
   4 
   5 /*
   6  * System Abstraction Layer definitions.
   7  *
   8  * This is based on version 2.5 of the manual "IA-64 System
   9  * Abstraction Layer".
  10  *
  11  * Copyright (C) 2001 Intel
  12  * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
  13  * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
  14  * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
  15  *      David Mosberger-Tang <davidm@hpl.hp.com>
  16  * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
  17  *
  18  * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
  19  *                  revision of the SAL spec.
  20  * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
  21  *                  revision of the SAL spec.
  22  * 99/09/29 davidm      Updated for SAL 2.6.
  23  * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
  24  *                      (plus examples of platform error info structures from smariset @ Intel)
  25  */
  26 
  27 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT          0
  28 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT    1
  29 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT    2
  30 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT         3
  31 
  32 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK        (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
  33 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
  34 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
  35 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT       (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
  36 
  37 #ifndef __ASSEMBLY__
  38 
  39 #include <linux/bcd.h>
  40 #include <linux/spinlock.h>
  41 #include <linux/efi.h>
  42 
  43 #include <asm/pal.h>
  44 #include <asm/fpu.h>
  45 
  46 extern unsigned long sal_systab_phys;
  47 extern spinlock_t sal_lock;
  48 
  49 /* SAL spec _requires_ eight args for each call. */
  50 #define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7)    \
  51         result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7)
  52 
  53 # define IA64_FW_CALL(entry,result,args...) do {                \
  54         unsigned long __ia64_sc_flags;                          \
  55         struct ia64_fpreg __ia64_sc_fr[6];                      \
  56         ia64_save_scratch_fpregs(__ia64_sc_fr);                 \
  57         spin_lock_irqsave(&sal_lock, __ia64_sc_flags);          \
  58         __IA64_FW_CALL(entry, result, args);                    \
  59         spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);     \
  60         ia64_load_scratch_fpregs(__ia64_sc_fr);                 \
  61 } while (0)
  62 
  63 # define SAL_CALL(result,args...)                       \
  64         IA64_FW_CALL(ia64_sal, result, args);
  65 
  66 # define SAL_CALL_NOLOCK(result,args...) do {           \
  67         unsigned long __ia64_scn_flags;                 \
  68         struct ia64_fpreg __ia64_scn_fr[6];             \
  69         ia64_save_scratch_fpregs(__ia64_scn_fr);        \
  70         local_irq_save(__ia64_scn_flags);               \
  71         __IA64_FW_CALL(ia64_sal, result, args);         \
  72         local_irq_restore(__ia64_scn_flags);            \
  73         ia64_load_scratch_fpregs(__ia64_scn_fr);        \
  74 } while (0)
  75 
  76 # define SAL_CALL_REENTRANT(result,args...) do {        \
  77         struct ia64_fpreg __ia64_scs_fr[6];             \
  78         ia64_save_scratch_fpregs(__ia64_scs_fr);        \
  79         preempt_disable();                              \
  80         __IA64_FW_CALL(ia64_sal, result, args);         \
  81         preempt_enable();                               \
  82         ia64_load_scratch_fpregs(__ia64_scs_fr);        \
  83 } while (0)
  84 
  85 #define SAL_SET_VECTORS                 0x01000000
  86 #define SAL_GET_STATE_INFO              0x01000001
  87 #define SAL_GET_STATE_INFO_SIZE         0x01000002
  88 #define SAL_CLEAR_STATE_INFO            0x01000003
  89 #define SAL_MC_RENDEZ                   0x01000004
  90 #define SAL_MC_SET_PARAMS               0x01000005
  91 #define SAL_REGISTER_PHYSICAL_ADDR      0x01000006
  92 
  93 #define SAL_CACHE_FLUSH                 0x01000008
  94 #define SAL_CACHE_INIT                  0x01000009
  95 #define SAL_PCI_CONFIG_READ             0x01000010
  96 #define SAL_PCI_CONFIG_WRITE            0x01000011
  97 #define SAL_FREQ_BASE                   0x01000012
  98 #define SAL_PHYSICAL_ID_INFO            0x01000013
  99 
 100 #define SAL_UPDATE_PAL                  0x01000020
 101 
 102 struct ia64_sal_retval {
 103         /*
 104          * A zero status value indicates call completed without error.
 105          * A negative status value indicates reason of call failure.
 106          * A positive status value indicates success but an
 107          * informational value should be printed (e.g., "reboot for
 108          * change to take effect").
 109          */
 110         long status;
 111         unsigned long v0;
 112         unsigned long v1;
 113         unsigned long v2;
 114 };
 115 
 116 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
 117 
 118 enum {
 119         SAL_FREQ_BASE_PLATFORM = 0,
 120         SAL_FREQ_BASE_INTERVAL_TIMER = 1,
 121         SAL_FREQ_BASE_REALTIME_CLOCK = 2
 122 };
 123 
 124 /*
 125  * The SAL system table is followed by a variable number of variable
 126  * length descriptors.  The structure of these descriptors follows
 127  * below.
 128  * The defininition follows SAL specs from July 2000
 129  */
 130 struct ia64_sal_systab {
 131         u8 signature[4];        /* should be "SST_" */
 132         u32 size;               /* size of this table in bytes */
 133         u8 sal_rev_minor;
 134         u8 sal_rev_major;
 135         u16 entry_count;        /* # of entries in variable portion */
 136         u8 checksum;
 137         u8 reserved1[7];
 138         u8 sal_a_rev_minor;
 139         u8 sal_a_rev_major;
 140         u8 sal_b_rev_minor;
 141         u8 sal_b_rev_major;
 142         /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
 143         u8 oem_id[32];
 144         u8 product_id[32];      /* ASCII product id  */
 145         u8 reserved2[8];
 146 };
 147 
 148 enum sal_systab_entry_type {
 149         SAL_DESC_ENTRY_POINT = 0,
 150         SAL_DESC_MEMORY = 1,
 151         SAL_DESC_PLATFORM_FEATURE = 2,
 152         SAL_DESC_TR = 3,
 153         SAL_DESC_PTC = 4,
 154         SAL_DESC_AP_WAKEUP = 5
 155 };
 156 
 157 /*
 158  * Entry type:  Size:
 159  *      0       48
 160  *      1       32
 161  *      2       16
 162  *      3       32
 163  *      4       16
 164  *      5       16
 165  */
 166 #define SAL_DESC_SIZE(type)     "\060\040\020\040\020\020"[(unsigned) type]
 167 
 168 typedef struct ia64_sal_desc_entry_point {
 169         u8 type;
 170         u8 reserved1[7];
 171         u64 pal_proc;
 172         u64 sal_proc;
 173         u64 gp;
 174         u8 reserved2[16];
 175 }ia64_sal_desc_entry_point_t;
 176 
 177 typedef struct ia64_sal_desc_memory {
 178         u8 type;
 179         u8 used_by_sal; /* needs to be mapped for SAL? */
 180         u8 mem_attr;            /* current memory attribute setting */
 181         u8 access_rights;       /* access rights set up by SAL */
 182         u8 mem_attr_mask;       /* mask of supported memory attributes */
 183         u8 reserved1;
 184         u8 mem_type;            /* memory type */
 185         u8 mem_usage;           /* memory usage */
 186         u64 addr;               /* physical address of memory */
 187         u32 length;     /* length (multiple of 4KB pages) */
 188         u32 reserved2;
 189         u8 oem_reserved[8];
 190 } ia64_sal_desc_memory_t;
 191 
 192 typedef struct ia64_sal_desc_platform_feature {
 193         u8 type;
 194         u8 feature_mask;
 195         u8 reserved1[14];
 196 } ia64_sal_desc_platform_feature_t;
 197 
 198 typedef struct ia64_sal_desc_tr {
 199         u8 type;
 200         u8 tr_type;             /* 0 == instruction, 1 == data */
 201         u8 regnum;              /* translation register number */
 202         u8 reserved1[5];
 203         u64 addr;               /* virtual address of area covered */
 204         u64 page_size;          /* encoded page size */
 205         u8 reserved2[8];
 206 } ia64_sal_desc_tr_t;
 207 
 208 typedef struct ia64_sal_desc_ptc {
 209         u8 type;
 210         u8 reserved1[3];
 211         u32 num_domains;        /* # of coherence domains */
 212         u64 domain_info;        /* physical address of domain info table */
 213 } ia64_sal_desc_ptc_t;
 214 
 215 typedef struct ia64_sal_ptc_domain_info {
 216         u64 proc_count;         /* number of processors in domain */
 217         u64 proc_list;          /* physical address of LID array */
 218 } ia64_sal_ptc_domain_info_t;
 219 
 220 typedef struct ia64_sal_ptc_domain_proc_entry {
 221         u64 id  : 8;            /* id of processor */
 222         u64 eid : 8;            /* eid of processor */
 223 } ia64_sal_ptc_domain_proc_entry_t;
 224 
 225 
 226 #define IA64_SAL_AP_EXTERNAL_INT 0
 227 
 228 typedef struct ia64_sal_desc_ap_wakeup {
 229         u8 type;
 230         u8 mechanism;           /* 0 == external interrupt */
 231         u8 reserved1[6];
 232         u64 vector;             /* interrupt vector in range 0x10-0xff */
 233 } ia64_sal_desc_ap_wakeup_t ;
 234 
 235 extern ia64_sal_handler ia64_sal;
 236 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
 237 
 238 extern unsigned short sal_revision;     /* supported SAL spec revision */
 239 extern unsigned short sal_version;      /* SAL version; OEM dependent */
 240 #define SAL_VERSION_CODE(major, minor) ((bin2bcd(major) << 8) | bin2bcd(minor))
 241 
 242 extern const char *ia64_sal_strerror (long status);
 243 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
 244 
 245 /* SAL information type encodings */
 246 enum {
 247         SAL_INFO_TYPE_MCA  = 0,         /* Machine check abort information */
 248         SAL_INFO_TYPE_INIT = 1,         /* Init information */
 249         SAL_INFO_TYPE_CMC  = 2,         /* Corrected machine check information */
 250         SAL_INFO_TYPE_CPE  = 3          /* Corrected platform error information */
 251 };
 252 
 253 /* Encodings for machine check parameter types */
 254 enum {
 255         SAL_MC_PARAM_RENDEZ_INT    = 1, /* Rendezvous interrupt */
 256         SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
 257         SAL_MC_PARAM_CPE_INT       = 3  /* Corrected Platform Error Int */
 258 };
 259 
 260 /* Encodings for rendezvous mechanisms */
 261 enum {
 262         SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
 263         SAL_MC_PARAM_MECHANISM_MEM = 2  /* Use memory synchronization variable*/
 264 };
 265 
 266 /* Encodings for vectors which can be registered by the OS with SAL */
 267 enum {
 268         SAL_VECTOR_OS_MCA         = 0,
 269         SAL_VECTOR_OS_INIT        = 1,
 270         SAL_VECTOR_OS_BOOT_RENDEZ = 2
 271 };
 272 
 273 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
 274 #define SAL_MC_PARAM_RZ_ALWAYS          0x1
 275 #define SAL_MC_PARAM_BINIT_ESCALATE     0x10
 276 
 277 /*
 278  * Definition of the SAL Error Log from the SAL spec
 279  */
 280 
 281 /* SAL Error Record Section GUID Definitions */
 282 #define SAL_PROC_DEV_ERR_SECT_GUID  \
 283     EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 284 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
 285     EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 286 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
 287     EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 288 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
 289     EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 290 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
 291     EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 292 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
 293     EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 294 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
 295     EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 296 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
 297     EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 298 #define SAL_PLAT_BUS_ERR_SECT_GUID  \
 299     EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 300 #define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \
 301     EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \
 302                 0xca, 0x4d)
 303 
 304 #define MAX_CACHE_ERRORS        6
 305 #define MAX_TLB_ERRORS          6
 306 #define MAX_BUS_ERRORS          1
 307 
 308 /* Definition of version  according to SAL spec for logging purposes */
 309 typedef struct sal_log_revision {
 310         u8 minor;               /* BCD (0..99) */
 311         u8 major;               /* BCD (0..99) */
 312 } sal_log_revision_t;
 313 
 314 /* Definition of timestamp according to SAL spec for logging purposes */
 315 typedef struct sal_log_timestamp {
 316         u8 slh_second;          /* Second (0..59) */
 317         u8 slh_minute;          /* Minute (0..59) */
 318         u8 slh_hour;            /* Hour (0..23) */
 319         u8 slh_reserved;
 320         u8 slh_day;             /* Day (1..31) */
 321         u8 slh_month;           /* Month (1..12) */
 322         u8 slh_year;            /* Year (00..99) */
 323         u8 slh_century;         /* Century (19, 20, 21, ...) */
 324 } sal_log_timestamp_t;
 325 
 326 /* Definition of log record  header structures */
 327 typedef struct sal_log_record_header {
 328         u64 id;                         /* Unique monotonically increasing ID */
 329         sal_log_revision_t revision;    /* Major and Minor revision of header */
 330         u8 severity;                    /* Error Severity */
 331         u8 validation_bits;             /* 0: platform_guid, 1: !timestamp */
 332         u32 len;                        /* Length of this error log in bytes */
 333         sal_log_timestamp_t timestamp;  /* Timestamp */
 334         efi_guid_t platform_guid;       /* Unique OEM Platform ID */
 335 } sal_log_record_header_t;
 336 
 337 #define sal_log_severity_recoverable    0
 338 #define sal_log_severity_fatal          1
 339 #define sal_log_severity_corrected      2
 340 
 341 /*
 342  * Error Recovery Info (ERI) bit decode.  From SAL Spec section B.2.2 Table B-3
 343  * Error Section Error_Recovery_Info Field Definition.
 344  */
 345 #define ERI_NOT_VALID           0x0     /* Error Recovery Field is not valid */
 346 #define ERI_NOT_ACCESSIBLE      0x30    /* Resource not accessible */
 347 #define ERI_CONTAINMENT_WARN    0x22    /* Corrupt data propagated */
 348 #define ERI_UNCORRECTED_ERROR   0x20    /* Uncorrected error */
 349 #define ERI_COMPONENT_RESET     0x24    /* Component must be reset */
 350 #define ERI_CORR_ERROR_LOG      0x21    /* Corrected error, needs logging */
 351 #define ERI_CORR_ERROR_THRESH   0x29    /* Corrected error threshold exceeded */
 352 
 353 /* Definition of log section header structures */
 354 typedef struct sal_log_sec_header {
 355     efi_guid_t guid;                    /* Unique Section ID */
 356     sal_log_revision_t revision;        /* Major and Minor revision of Section */
 357     u8 error_recovery_info;             /* Platform error recovery status */
 358     u8 reserved;
 359     u32 len;                            /* Section length */
 360 } sal_log_section_hdr_t;
 361 
 362 typedef struct sal_log_mod_error_info {
 363         struct {
 364                 u64 check_info              : 1,
 365                     requestor_identifier    : 1,
 366                     responder_identifier    : 1,
 367                     target_identifier       : 1,
 368                     precise_ip              : 1,
 369                     reserved                : 59;
 370         } valid;
 371         u64 check_info;
 372         u64 requestor_identifier;
 373         u64 responder_identifier;
 374         u64 target_identifier;
 375         u64 precise_ip;
 376 } sal_log_mod_error_info_t;
 377 
 378 typedef struct sal_processor_static_info {
 379         struct {
 380                 u64 minstate        : 1,
 381                     br              : 1,
 382                     cr              : 1,
 383                     ar              : 1,
 384                     rr              : 1,
 385                     fr              : 1,
 386                     reserved        : 58;
 387         } valid;
 388         pal_min_state_area_t min_state_area;
 389         u64 br[8];
 390         u64 cr[128];
 391         u64 ar[128];
 392         u64 rr[8];
 393         struct ia64_fpreg __attribute__ ((packed)) fr[128];
 394 } sal_processor_static_info_t;
 395 
 396 struct sal_cpuid_info {
 397         u64 regs[5];
 398         u64 reserved;
 399 };
 400 
 401 typedef struct sal_log_processor_info {
 402         sal_log_section_hdr_t header;
 403         struct {
 404                 u64 proc_error_map      : 1,
 405                     proc_state_param    : 1,
 406                     proc_cr_lid         : 1,
 407                     psi_static_struct   : 1,
 408                     num_cache_check     : 4,
 409                     num_tlb_check       : 4,
 410                     num_bus_check       : 4,
 411                     num_reg_file_check  : 4,
 412                     num_ms_check        : 4,
 413                     cpuid_info          : 1,
 414                     reserved1           : 39;
 415         } valid;
 416         u64 proc_error_map;
 417         u64 proc_state_parameter;
 418         u64 proc_cr_lid;
 419         /*
 420          * The rest of this structure consists of variable-length arrays, which can't be
 421          * expressed in C.
 422          */
 423         sal_log_mod_error_info_t info[0];
 424         /*
 425          * This is what the rest looked like if C supported variable-length arrays:
 426          *
 427          * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
 428          * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
 429          * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
 430          * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
 431          * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
 432          * struct sal_cpuid_info cpuid_info;
 433          * sal_processor_static_info_t processor_static_info;
 434          */
 435 } sal_log_processor_info_t;
 436 
 437 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
 438 #define SAL_LPI_PSI_INFO(l)                                                                     \
 439 ({      sal_log_processor_info_t *_l = (l);                                                     \
 440         ((sal_processor_static_info_t *)                                                        \
 441          ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check             \
 442                                 + _l->valid.num_bus_check + _l->valid.num_reg_file_check        \
 443                                 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)    \
 444                                + sizeof(struct sal_cpuid_info))));                              \
 445 })
 446 
 447 /* platform error log structures */
 448 
 449 typedef struct sal_log_mem_dev_err_info {
 450         sal_log_section_hdr_t header;
 451         struct {
 452                 u64 error_status    : 1,
 453                     physical_addr   : 1,
 454                     addr_mask       : 1,
 455                     node            : 1,
 456                     card            : 1,
 457                     module          : 1,
 458                     bank            : 1,
 459                     device          : 1,
 460                     row             : 1,
 461                     column          : 1,
 462                     bit_position    : 1,
 463                     requestor_id    : 1,
 464                     responder_id    : 1,
 465                     target_id       : 1,
 466                     bus_spec_data   : 1,
 467                     oem_id          : 1,
 468                     oem_data        : 1,
 469                     reserved        : 47;
 470         } valid;
 471         u64 error_status;
 472         u64 physical_addr;
 473         u64 addr_mask;
 474         u16 node;
 475         u16 card;
 476         u16 module;
 477         u16 bank;
 478         u16 device;
 479         u16 row;
 480         u16 column;
 481         u16 bit_position;
 482         u64 requestor_id;
 483         u64 responder_id;
 484         u64 target_id;
 485         u64 bus_spec_data;
 486         u8 oem_id[16];
 487         u8 oem_data[1];                 /* Variable length data */
 488 } sal_log_mem_dev_err_info_t;
 489 
 490 typedef struct sal_log_sel_dev_err_info {
 491         sal_log_section_hdr_t header;
 492         struct {
 493                 u64 record_id       : 1,
 494                     record_type     : 1,
 495                     generator_id    : 1,
 496                     evm_rev         : 1,
 497                     sensor_type     : 1,
 498                     sensor_num      : 1,
 499                     event_dir       : 1,
 500                     event_data1     : 1,
 501                     event_data2     : 1,
 502                     event_data3     : 1,
 503                     reserved        : 54;
 504         } valid;
 505         u16 record_id;
 506         u8 record_type;
 507         u8 timestamp[4];
 508         u16 generator_id;
 509         u8 evm_rev;
 510         u8 sensor_type;
 511         u8 sensor_num;
 512         u8 event_dir;
 513         u8 event_data1;
 514         u8 event_data2;
 515         u8 event_data3;
 516 } sal_log_sel_dev_err_info_t;
 517 
 518 typedef struct sal_log_pci_bus_err_info {
 519         sal_log_section_hdr_t header;
 520         struct {
 521                 u64 err_status      : 1,
 522                     err_type        : 1,
 523                     bus_id          : 1,
 524                     bus_address     : 1,
 525                     bus_data        : 1,
 526                     bus_cmd         : 1,
 527                     requestor_id    : 1,
 528                     responder_id    : 1,
 529                     target_id       : 1,
 530                     oem_data        : 1,
 531                     reserved        : 54;
 532         } valid;
 533         u64 err_status;
 534         u16 err_type;
 535         u16 bus_id;
 536         u32 reserved;
 537         u64 bus_address;
 538         u64 bus_data;
 539         u64 bus_cmd;
 540         u64 requestor_id;
 541         u64 responder_id;
 542         u64 target_id;
 543         u8 oem_data[1];                 /* Variable length data */
 544 } sal_log_pci_bus_err_info_t;
 545 
 546 typedef struct sal_log_smbios_dev_err_info {
 547         sal_log_section_hdr_t header;
 548         struct {
 549                 u64 event_type      : 1,
 550                     length          : 1,
 551                     time_stamp      : 1,
 552                     data            : 1,
 553                     reserved1       : 60;
 554         } valid;
 555         u8 event_type;
 556         u8 length;
 557         u8 time_stamp[6];
 558         u8 data[1];                     /* data of variable length, length == slsmb_length */
 559 } sal_log_smbios_dev_err_info_t;
 560 
 561 typedef struct sal_log_pci_comp_err_info {
 562         sal_log_section_hdr_t header;
 563         struct {
 564                 u64 err_status      : 1,
 565                     comp_info       : 1,
 566                     num_mem_regs    : 1,
 567                     num_io_regs     : 1,
 568                     reg_data_pairs  : 1,
 569                     oem_data        : 1,
 570                     reserved        : 58;
 571         } valid;
 572         u64 err_status;
 573         struct {
 574                 u16 vendor_id;
 575                 u16 device_id;
 576                 u8 class_code[3];
 577                 u8 func_num;
 578                 u8 dev_num;
 579                 u8 bus_num;
 580                 u8 seg_num;
 581                 u8 reserved[5];
 582         } comp_info;
 583         u32 num_mem_regs;
 584         u32 num_io_regs;
 585         u64 reg_data_pairs[1];
 586         /*
 587          * array of address/data register pairs is num_mem_regs + num_io_regs elements
 588          * long.  Each array element consists of a u64 address followed by a u64 data
 589          * value.  The oem_data array immediately follows the reg_data_pairs array
 590          */
 591         u8 oem_data[1];                 /* Variable length data */
 592 } sal_log_pci_comp_err_info_t;
 593 
 594 typedef struct sal_log_plat_specific_err_info {
 595         sal_log_section_hdr_t header;
 596         struct {
 597                 u64 err_status      : 1,
 598                     guid            : 1,
 599                     oem_data        : 1,
 600                     reserved        : 61;
 601         } valid;
 602         u64 err_status;
 603         efi_guid_t guid;
 604         u8 oem_data[1];                 /* platform specific variable length data */
 605 } sal_log_plat_specific_err_info_t;
 606 
 607 typedef struct sal_log_host_ctlr_err_info {
 608         sal_log_section_hdr_t header;
 609         struct {
 610                 u64 err_status      : 1,
 611                     requestor_id    : 1,
 612                     responder_id    : 1,
 613                     target_id       : 1,
 614                     bus_spec_data   : 1,
 615                     oem_data        : 1,
 616                     reserved        : 58;
 617         } valid;
 618         u64 err_status;
 619         u64 requestor_id;
 620         u64 responder_id;
 621         u64 target_id;
 622         u64 bus_spec_data;
 623         u8 oem_data[1];                 /* Variable length OEM data */
 624 } sal_log_host_ctlr_err_info_t;
 625 
 626 typedef struct sal_log_plat_bus_err_info {
 627         sal_log_section_hdr_t header;
 628         struct {
 629                 u64 err_status      : 1,
 630                     requestor_id    : 1,
 631                     responder_id    : 1,
 632                     target_id       : 1,
 633                     bus_spec_data   : 1,
 634                     oem_data        : 1,
 635                     reserved        : 58;
 636         } valid;
 637         u64 err_status;
 638         u64 requestor_id;
 639         u64 responder_id;
 640         u64 target_id;
 641         u64 bus_spec_data;
 642         u8 oem_data[1];                 /* Variable length OEM data */
 643 } sal_log_plat_bus_err_info_t;
 644 
 645 /* Overall platform error section structure */
 646 typedef union sal_log_platform_err_info {
 647         sal_log_mem_dev_err_info_t mem_dev_err;
 648         sal_log_sel_dev_err_info_t sel_dev_err;
 649         sal_log_pci_bus_err_info_t pci_bus_err;
 650         sal_log_smbios_dev_err_info_t smbios_dev_err;
 651         sal_log_pci_comp_err_info_t pci_comp_err;
 652         sal_log_plat_specific_err_info_t plat_specific_err;
 653         sal_log_host_ctlr_err_info_t host_ctlr_err;
 654         sal_log_plat_bus_err_info_t plat_bus_err;
 655 } sal_log_platform_err_info_t;
 656 
 657 /* SAL log over-all, multi-section error record structure (processor+platform) */
 658 typedef struct err_rec {
 659         sal_log_record_header_t sal_elog_header;
 660         sal_log_processor_info_t proc_err;
 661         sal_log_platform_err_info_t plat_err;
 662         u8 oem_data_pad[1024];
 663 } ia64_err_rec_t;
 664 
 665 /*
 666  * Now define a couple of inline functions for improved type checking
 667  * and convenience.
 668  */
 669 
 670 extern s64 ia64_sal_cache_flush (u64 cache_type);
 671 extern void __init check_sal_cache_flush (void);
 672 
 673 /* Initialize all the processor and platform level instruction and data caches */
 674 static inline s64
 675 ia64_sal_cache_init (void)
 676 {
 677         struct ia64_sal_retval isrv;
 678         SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
 679         return isrv.status;
 680 }
 681 
 682 /*
 683  * Clear the processor and platform information logged by SAL with respect to the machine
 684  * state at the time of MCA's, INITs, CMCs, or CPEs.
 685  */
 686 static inline s64
 687 ia64_sal_clear_state_info (u64 sal_info_type)
 688 {
 689         struct ia64_sal_retval isrv;
 690         SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
 691                       0, 0, 0, 0, 0);
 692         return isrv.status;
 693 }
 694 
 695 
 696 /* Get the processor and platform information logged by SAL with respect to the machine
 697  * state at the time of the MCAs, INITs, CMCs, or CPEs.
 698  */
 699 static inline u64
 700 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
 701 {
 702         struct ia64_sal_retval isrv;
 703         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
 704                       sal_info, 0, 0, 0, 0);
 705         if (isrv.status)
 706                 return 0;
 707 
 708         return isrv.v0;
 709 }
 710 
 711 /*
 712  * Get the maximum size of the information logged by SAL with respect to the machine state
 713  * at the time of MCAs, INITs, CMCs, or CPEs.
 714  */
 715 static inline u64
 716 ia64_sal_get_state_info_size (u64 sal_info_type)
 717 {
 718         struct ia64_sal_retval isrv;
 719         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
 720                       0, 0, 0, 0, 0);
 721         if (isrv.status)
 722                 return 0;
 723         return isrv.v0;
 724 }
 725 
 726 /*
 727  * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
 728  * the monarch processor.  Must not lock, because it will not return on any cpu until the
 729  * monarch processor sends a wake up.
 730  */
 731 static inline s64
 732 ia64_sal_mc_rendez (void)
 733 {
 734         struct ia64_sal_retval isrv;
 735         SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
 736         return isrv.status;
 737 }
 738 
 739 /*
 740  * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
 741  * the machine check rendezvous sequence as well as the mechanism to wake up the
 742  * non-monarch processor at the end of machine check processing.
 743  * Returns the complete ia64_sal_retval because some calls return more than just a status
 744  * value.
 745  */
 746 static inline struct ia64_sal_retval
 747 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
 748 {
 749         struct ia64_sal_retval isrv;
 750         SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
 751                  timeout, rz_always, 0, 0);
 752         return isrv;
 753 }
 754 
 755 /* Read from PCI configuration space */
 756 static inline s64
 757 ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
 758 {
 759         struct ia64_sal_retval isrv;
 760         SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
 761         if (value)
 762                 *value = isrv.v0;
 763         return isrv.status;
 764 }
 765 
 766 /* Write to PCI configuration space */
 767 static inline s64
 768 ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
 769 {
 770         struct ia64_sal_retval isrv;
 771         SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
 772                  type, 0, 0, 0);
 773         return isrv.status;
 774 }
 775 
 776 /*
 777  * Register physical addresses of locations needed by SAL when SAL procedures are invoked
 778  * in virtual mode.
 779  */
 780 static inline s64
 781 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
 782 {
 783         struct ia64_sal_retval isrv;
 784         SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
 785                  0, 0, 0, 0, 0);
 786         return isrv.status;
 787 }
 788 
 789 /*
 790  * Register software dependent code locations within SAL. These locations are handlers or
 791  * entry points where SAL will pass control for the specified event. These event handlers
 792  * are for the bott rendezvous, MCAs and INIT scenarios.
 793  */
 794 static inline s64
 795 ia64_sal_set_vectors (u64 vector_type,
 796                       u64 handler_addr1, u64 gp1, u64 handler_len1,
 797                       u64 handler_addr2, u64 gp2, u64 handler_len2)
 798 {
 799         struct ia64_sal_retval isrv;
 800         SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
 801                         handler_addr1, gp1, handler_len1,
 802                         handler_addr2, gp2, handler_len2);
 803 
 804         return isrv.status;
 805 }
 806 
 807 /* Update the contents of PAL block in the non-volatile storage device */
 808 static inline s64
 809 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
 810                      u64 *error_code, u64 *scratch_buf_size_needed)
 811 {
 812         struct ia64_sal_retval isrv;
 813         SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
 814                  0, 0, 0, 0);
 815         if (error_code)
 816                 *error_code = isrv.v0;
 817         if (scratch_buf_size_needed)
 818                 *scratch_buf_size_needed = isrv.v1;
 819         return isrv.status;
 820 }
 821 
 822 /* Get physical processor die mapping in the platform. */
 823 static inline s64
 824 ia64_sal_physical_id_info(u16 *splid)
 825 {
 826         struct ia64_sal_retval isrv;
 827 
 828         if (sal_revision < SAL_VERSION_CODE(3,2))
 829                 return -1;
 830 
 831         SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
 832         if (splid)
 833                 *splid = isrv.v0;
 834         return isrv.status;
 835 }
 836 
 837 extern unsigned long sal_platform_features;
 838 
 839 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
 840 
 841 struct sal_ret_values {
 842         long r8; long r9; long r10; long r11;
 843 };
 844 
 845 #define IA64_SAL_OEMFUNC_MIN            0x02000000
 846 #define IA64_SAL_OEMFUNC_MAX            0x03ffffff
 847 
 848 extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
 849                             u64, u64, u64);
 850 extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
 851                                    u64, u64, u64, u64, u64);
 852 extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
 853                                       u64, u64, u64, u64, u64);
 854 extern long
 855 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 856                     unsigned long *drift_info);
 857 #ifdef CONFIG_HOTPLUG_CPU
 858 /*
 859  * System Abstraction Layer Specification
 860  * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
 861  * Note: region regs are stored first in head.S _start. Hence they must
 862  * stay up front.
 863  */
 864 struct sal_to_os_boot {
 865         u64 rr[8];              /* Region Registers */
 866         u64 br[6];              /* br0:
 867                                  * return addr into SAL boot rendez routine */
 868         u64 gr1;                /* SAL:GP */
 869         u64 gr12;               /* SAL:SP */
 870         u64 gr13;               /* SAL: Task Pointer */
 871         u64 fpsr;
 872         u64 pfs;
 873         u64 rnat;
 874         u64 unat;
 875         u64 bspstore;
 876         u64 dcr;                /* Default Control Register */
 877         u64 iva;
 878         u64 pta;
 879         u64 itv;
 880         u64 pmv;
 881         u64 cmcv;
 882         u64 lrr[2];
 883         u64 gr[4];
 884         u64 pr;                 /* Predicate registers */
 885         u64 lc;                 /* Loop Count */
 886         struct ia64_fpreg fp[20];
 887 };
 888 
 889 /*
 890  * Global array allocated for NR_CPUS at boot time
 891  */
 892 extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
 893 
 894 extern void ia64_jump_to_sal(struct sal_to_os_boot *);
 895 #endif
 896 
 897 extern void ia64_sal_handler_init(void *entry_point, void *gpval);
 898 
 899 #define PALO_MAX_TLB_PURGES     0xFFFF
 900 #define PALO_SIG        "PALO"
 901 
 902 struct palo_table {
 903         u8  signature[4];       /* Should be "PALO" */
 904         u32 length;
 905         u8  minor_revision;
 906         u8  major_revision;
 907         u8  checksum;
 908         u8  reserved1[5];
 909         u16 max_tlb_purges;
 910         u8  reserved2[6];
 911 };
 912 
 913 #define NPTCG_FROM_PAL                  0
 914 #define NPTCG_FROM_PALO                 1
 915 #define NPTCG_FROM_KERNEL_PARAMETER     2
 916 
 917 #endif /* __ASSEMBLY__ */
 918 
 919 #endif /* _ASM_IA64_SAL_H */
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