root/drivers/i2c/algos/i2c-algo-pca.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. pca_reset
  2. pca_start
  3. pca_repeated_start
  4. pca_stop
  5. pca_address
  6. pca_tx_byte
  7. pca_rx_byte
  8. pca_rx_ack
  9. pca_xfer
  10. pca_func
  11. pca_probe_chip
  12. pca_init
  13. i2c_pca_add_bus
  14. i2c_pca_add_numbered_bus

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
   4  *    Copyright (C) 2004 Arcom Control Systems
   5  *    Copyright (C) 2008 Pengutronix
   6  */
   7 
   8 #include <linux/kernel.h>
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/delay.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/errno.h>
  14 #include <linux/i2c.h>
  15 #include <linux/i2c-algo-pca.h>
  16 
  17 #define DEB1(fmt, args...) do { if (i2c_debug >= 1)                     \
  18                                  printk(KERN_DEBUG fmt, ## args); } while (0)
  19 #define DEB2(fmt, args...) do { if (i2c_debug >= 2)                     \
  20                                  printk(KERN_DEBUG fmt, ## args); } while (0)
  21 #define DEB3(fmt, args...) do { if (i2c_debug >= 3)                     \
  22                                  printk(KERN_DEBUG fmt, ## args); } while (0)
  23 
  24 static int i2c_debug;
  25 
  26 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  27 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  28 
  29 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  30 #define pca_clock(adap) adap->i2c_clock
  31 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  32 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  33 #define pca_wait(adap) adap->wait_for_completion(adap->data)
  34 
  35 static void pca_reset(struct i2c_algo_pca_data *adap)
  36 {
  37         if (adap->chip == I2C_PCA_CHIP_9665) {
  38                 /* Ignore the reset function from the module,
  39                  * we can use the parallel bus reset.
  40                  */
  41                 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  42                 pca_outw(adap, I2C_PCA_IND, 0xA5);
  43                 pca_outw(adap, I2C_PCA_IND, 0x5A);
  44         } else {
  45                 adap->reset_chip(adap->data);
  46         }
  47 }
  48 
  49 /*
  50  * Generate a start condition on the i2c bus.
  51  *
  52  * returns after the start condition has occurred
  53  */
  54 static int pca_start(struct i2c_algo_pca_data *adap)
  55 {
  56         int sta = pca_get_con(adap);
  57         DEB2("=== START\n");
  58         sta |= I2C_PCA_CON_STA;
  59         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  60         pca_set_con(adap, sta);
  61         return pca_wait(adap);
  62 }
  63 
  64 /*
  65  * Generate a repeated start condition on the i2c bus
  66  *
  67  * return after the repeated start condition has occurred
  68  */
  69 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
  70 {
  71         int sta = pca_get_con(adap);
  72         DEB2("=== REPEATED START\n");
  73         sta |= I2C_PCA_CON_STA;
  74         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  75         pca_set_con(adap, sta);
  76         return pca_wait(adap);
  77 }
  78 
  79 /*
  80  * Generate a stop condition on the i2c bus
  81  *
  82  * returns after the stop condition has been generated
  83  *
  84  * STOPs do not generate an interrupt or set the SI flag, since the
  85  * part returns the idle state (0xf8). Hence we don't need to
  86  * pca_wait here.
  87  */
  88 static void pca_stop(struct i2c_algo_pca_data *adap)
  89 {
  90         int sta = pca_get_con(adap);
  91         DEB2("=== STOP\n");
  92         sta |= I2C_PCA_CON_STO;
  93         sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  94         pca_set_con(adap, sta);
  95 }
  96 
  97 /*
  98  * Send the slave address and R/W bit
  99  *
 100  * returns after the address has been sent
 101  */
 102 static int pca_address(struct i2c_algo_pca_data *adap,
 103                        struct i2c_msg *msg)
 104 {
 105         int sta = pca_get_con(adap);
 106         int addr = i2c_8bit_addr_from_msg(msg);
 107 
 108         DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
 109              msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
 110 
 111         pca_outw(adap, I2C_PCA_DAT, addr);
 112 
 113         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
 114         pca_set_con(adap, sta);
 115 
 116         return pca_wait(adap);
 117 }
 118 
 119 /*
 120  * Transmit a byte.
 121  *
 122  * Returns after the byte has been transmitted
 123  */
 124 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
 125                        __u8 b)
 126 {
 127         int sta = pca_get_con(adap);
 128         DEB2("=== WRITE %#04x\n", b);
 129         pca_outw(adap, I2C_PCA_DAT, b);
 130 
 131         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
 132         pca_set_con(adap, sta);
 133 
 134         return pca_wait(adap);
 135 }
 136 
 137 /*
 138  * Receive a byte
 139  *
 140  * returns immediately.
 141  */
 142 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
 143                         __u8 *b, int ack)
 144 {
 145         *b = pca_inw(adap, I2C_PCA_DAT);
 146         DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
 147 }
 148 
 149 /*
 150  * Setup ACK or NACK for next received byte and wait for it to arrive.
 151  *
 152  * Returns after next byte has arrived.
 153  */
 154 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
 155                       int ack)
 156 {
 157         int sta = pca_get_con(adap);
 158 
 159         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
 160 
 161         if (ack)
 162                 sta |= I2C_PCA_CON_AA;
 163 
 164         pca_set_con(adap, sta);
 165         return pca_wait(adap);
 166 }
 167 
 168 static int pca_xfer(struct i2c_adapter *i2c_adap,
 169                     struct i2c_msg *msgs,
 170                     int num)
 171 {
 172         struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
 173         struct i2c_msg *msg = NULL;
 174         int curmsg;
 175         int numbytes = 0;
 176         int state;
 177         int ret;
 178         int completed = 1;
 179         unsigned long timeout = jiffies + i2c_adap->timeout;
 180 
 181         while ((state = pca_status(adap)) != 0xf8) {
 182                 if (time_before(jiffies, timeout)) {
 183                         msleep(10);
 184                 } else {
 185                         dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
 186                                 "%#04x\n", state);
 187                         return -EBUSY;
 188                 }
 189         }
 190 
 191         DEB1("{{{ XFER %d messages\n", num);
 192 
 193         if (i2c_debug >= 2) {
 194                 for (curmsg = 0; curmsg < num; curmsg++) {
 195                         int addr, i;
 196                         msg = &msgs[curmsg];
 197 
 198                         addr = (0x7f & msg->addr) ;
 199 
 200                         if (msg->flags & I2C_M_RD)
 201                                 printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
 202                                        curmsg, msg->len, addr, (addr << 1) | 1);
 203                         else {
 204                                 printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
 205                                        curmsg, msg->len, addr, addr << 1,
 206                                        msg->len == 0 ? "" : ", ");
 207                                 for (i = 0; i < msg->len; i++)
 208                                         printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
 209                                 printk("]\n");
 210                         }
 211                 }
 212         }
 213 
 214         curmsg = 0;
 215         ret = -EIO;
 216         while (curmsg < num) {
 217                 state = pca_status(adap);
 218 
 219                 DEB3("STATE is 0x%02x\n", state);
 220                 msg = &msgs[curmsg];
 221 
 222                 switch (state) {
 223                 case 0xf8: /* On reset or stop the bus is idle */
 224                         completed = pca_start(adap);
 225                         break;
 226 
 227                 case 0x08: /* A START condition has been transmitted */
 228                 case 0x10: /* A repeated start condition has been transmitted */
 229                         completed = pca_address(adap, msg);
 230                         break;
 231 
 232                 case 0x18: /* SLA+W has been transmitted; ACK has been received */
 233                 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
 234                         if (numbytes < msg->len) {
 235                                 completed = pca_tx_byte(adap,
 236                                                         msg->buf[numbytes]);
 237                                 numbytes++;
 238                                 break;
 239                         }
 240                         curmsg++; numbytes = 0;
 241                         if (curmsg == num)
 242                                 pca_stop(adap);
 243                         else
 244                                 completed = pca_repeated_start(adap);
 245                         break;
 246 
 247                 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
 248                         DEB2("NOT ACK received after SLA+W\n");
 249                         pca_stop(adap);
 250                         ret = -ENXIO;
 251                         goto out;
 252 
 253                 case 0x40: /* SLA+R has been transmitted; ACK has been received */
 254                         completed = pca_rx_ack(adap, msg->len > 1);
 255                         break;
 256 
 257                 case 0x50: /* Data bytes has been received; ACK has been returned */
 258                         if (numbytes < msg->len) {
 259                                 pca_rx_byte(adap, &msg->buf[numbytes], 1);
 260                                 numbytes++;
 261                                 completed = pca_rx_ack(adap,
 262                                                        numbytes < msg->len - 1);
 263                                 break;
 264                         }
 265                         curmsg++; numbytes = 0;
 266                         if (curmsg == num)
 267                                 pca_stop(adap);
 268                         else
 269                                 completed = pca_repeated_start(adap);
 270                         break;
 271 
 272                 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
 273                         DEB2("NOT ACK received after SLA+R\n");
 274                         pca_stop(adap);
 275                         ret = -ENXIO;
 276                         goto out;
 277 
 278                 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
 279                         DEB2("NOT ACK received after data byte\n");
 280                         pca_stop(adap);
 281                         goto out;
 282 
 283                 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
 284                         DEB2("Arbitration lost\n");
 285                         /*
 286                          * The PCA9564 data sheet (2006-09-01) says "A
 287                          * START condition will be transmitted when the
 288                          * bus becomes free (STOP or SCL and SDA high)"
 289                          * when the STA bit is set (p. 11).
 290                          *
 291                          * In case this won't work, try pca_reset()
 292                          * instead.
 293                          */
 294                         pca_start(adap);
 295                         goto out;
 296 
 297                 case 0x58: /* Data byte has been received; NOT ACK has been returned */
 298                         if (numbytes == msg->len - 1) {
 299                                 pca_rx_byte(adap, &msg->buf[numbytes], 0);
 300                                 curmsg++; numbytes = 0;
 301                                 if (curmsg == num)
 302                                         pca_stop(adap);
 303                                 else
 304                                         completed = pca_repeated_start(adap);
 305                         } else {
 306                                 DEB2("NOT ACK sent after data byte received. "
 307                                      "Not final byte. numbytes %d. len %d\n",
 308                                      numbytes, msg->len);
 309                                 pca_stop(adap);
 310                                 goto out;
 311                         }
 312                         break;
 313                 case 0x70: /* Bus error - SDA stuck low */
 314                         DEB2("BUS ERROR - SDA Stuck low\n");
 315                         pca_reset(adap);
 316                         goto out;
 317                 case 0x90: /* Bus error - SCL stuck low */
 318                         DEB2("BUS ERROR - SCL Stuck low\n");
 319                         pca_reset(adap);
 320                         goto out;
 321                 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
 322                         DEB2("BUS ERROR - Illegal START or STOP\n");
 323                         pca_reset(adap);
 324                         goto out;
 325                 default:
 326                         dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
 327                         break;
 328                 }
 329 
 330                 if (!completed)
 331                         goto out;
 332         }
 333 
 334         ret = curmsg;
 335  out:
 336         DEB1("}}} transferred %d/%d messages. "
 337              "status is %#04x. control is %#04x\n",
 338              curmsg, num, pca_status(adap),
 339              pca_get_con(adap));
 340         return ret;
 341 }
 342 
 343 static u32 pca_func(struct i2c_adapter *adap)
 344 {
 345         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 346 }
 347 
 348 static const struct i2c_algorithm pca_algo = {
 349         .master_xfer    = pca_xfer,
 350         .functionality  = pca_func,
 351 };
 352 
 353 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
 354 {
 355         struct i2c_algo_pca_data *pca_data = adap->algo_data;
 356         /* The trick here is to check if there is an indirect register
 357          * available. If there is one, we will read the value we first
 358          * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
 359          * we wrote on I2C_PCA_ADR
 360          */
 361         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
 362         pca_outw(pca_data, I2C_PCA_IND, 0xAA);
 363         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
 364         pca_outw(pca_data, I2C_PCA_IND, 0x00);
 365         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
 366         if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
 367                 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
 368                 pca_data->chip = I2C_PCA_CHIP_9665;
 369         } else {
 370                 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
 371                 pca_data->chip = I2C_PCA_CHIP_9564;
 372         }
 373         return pca_data->chip;
 374 }
 375 
 376 static int pca_init(struct i2c_adapter *adap)
 377 {
 378         struct i2c_algo_pca_data *pca_data = adap->algo_data;
 379 
 380         adap->algo = &pca_algo;
 381 
 382         if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
 383                 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
 384                 int clock;
 385 
 386                 if (pca_data->i2c_clock > 7) {
 387                         switch (pca_data->i2c_clock) {
 388                         case 330000:
 389                                 pca_data->i2c_clock = I2C_PCA_CON_330kHz;
 390                                 break;
 391                         case 288000:
 392                                 pca_data->i2c_clock = I2C_PCA_CON_288kHz;
 393                                 break;
 394                         case 217000:
 395                                 pca_data->i2c_clock = I2C_PCA_CON_217kHz;
 396                                 break;
 397                         case 146000:
 398                                 pca_data->i2c_clock = I2C_PCA_CON_146kHz;
 399                                 break;
 400                         case 88000:
 401                                 pca_data->i2c_clock = I2C_PCA_CON_88kHz;
 402                                 break;
 403                         case 59000:
 404                                 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
 405                                 break;
 406                         case 44000:
 407                                 pca_data->i2c_clock = I2C_PCA_CON_44kHz;
 408                                 break;
 409                         case 36000:
 410                                 pca_data->i2c_clock = I2C_PCA_CON_36kHz;
 411                                 break;
 412                         default:
 413                                 printk(KERN_WARNING
 414                                         "%s: Invalid I2C clock speed selected."
 415                                         " Using default 59kHz.\n", adap->name);
 416                         pca_data->i2c_clock = I2C_PCA_CON_59kHz;
 417                         }
 418                 } else {
 419                         printk(KERN_WARNING "%s: "
 420                                 "Choosing the clock frequency based on "
 421                                 "index is deprecated."
 422                                 " Use the nominal frequency.\n", adap->name);
 423                 }
 424 
 425                 pca_reset(pca_data);
 426 
 427                 clock = pca_clock(pca_data);
 428                 printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
 429                      adap->name, freqs[clock]);
 430 
 431                 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
 432         } else {
 433                 int clock;
 434                 int mode;
 435                 int tlow, thi;
 436                 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
 437                 int min_tlow, min_thi;
 438                 /* These values are the maximum raise and fall values allowed
 439                  * by the I2C operation mode (Standard, Fast or Fast+)
 440                  * They are used (added) below to calculate the clock dividers
 441                  * of PCA9665. Note that they are slightly different of the
 442                  * real maximum, to allow the change on mode exactly on the
 443                  * maximum clock rate for each mode
 444                  */
 445                 int raise_fall_time;
 446 
 447                 if (pca_data->i2c_clock > 1265800) {
 448                         printk(KERN_WARNING "%s: I2C clock speed too high."
 449                                 " Using 1265.8kHz.\n", adap->name);
 450                         pca_data->i2c_clock = 1265800;
 451                 }
 452 
 453                 if (pca_data->i2c_clock < 60300) {
 454                         printk(KERN_WARNING "%s: I2C clock speed too low."
 455                                 " Using 60.3kHz.\n", adap->name);
 456                         pca_data->i2c_clock = 60300;
 457                 }
 458 
 459                 /* To avoid integer overflow, use clock/100 for calculations */
 460                 clock = pca_clock(pca_data) / 100;
 461 
 462                 if (pca_data->i2c_clock > 1000000) {
 463                         mode = I2C_PCA_MODE_TURBO;
 464                         min_tlow = 14;
 465                         min_thi  = 5;
 466                         raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
 467                 } else if (pca_data->i2c_clock > 400000) {
 468                         mode = I2C_PCA_MODE_FASTP;
 469                         min_tlow = 17;
 470                         min_thi  = 9;
 471                         raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
 472                 } else if (pca_data->i2c_clock > 100000) {
 473                         mode = I2C_PCA_MODE_FAST;
 474                         min_tlow = 44;
 475                         min_thi  = 20;
 476                         raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
 477                 } else {
 478                         mode = I2C_PCA_MODE_STD;
 479                         min_tlow = 157;
 480                         min_thi  = 134;
 481                         raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
 482                 }
 483 
 484                 /* The minimum clock that respects the thi/tlow = 134/157 is
 485                  * 64800 Hz. Below that, we have to fix the tlow to 255 and
 486                  * calculate the thi factor.
 487                  */
 488                 if (clock < 648) {
 489                         tlow = 255;
 490                         thi = 1000000 - clock * raise_fall_time;
 491                         thi /= (I2C_PCA_OSC_PER * clock) - tlow;
 492                 } else {
 493                         tlow = (1000000 - clock * raise_fall_time) * min_tlow;
 494                         tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
 495                         thi = tlow * min_thi / min_tlow;
 496                 }
 497 
 498                 pca_reset(pca_data);
 499 
 500                 printk(KERN_INFO
 501                      "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
 502 
 503                 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
 504                 pca_outw(pca_data, I2C_PCA_IND, mode);
 505                 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
 506                 pca_outw(pca_data, I2C_PCA_IND, tlow);
 507                 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
 508                 pca_outw(pca_data, I2C_PCA_IND, thi);
 509 
 510                 pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
 511         }
 512         udelay(500); /* 500 us for oscillator to stabilise */
 513 
 514         return 0;
 515 }
 516 
 517 /*
 518  * registering functions to load algorithms at runtime
 519  */
 520 int i2c_pca_add_bus(struct i2c_adapter *adap)
 521 {
 522         int rval;
 523 
 524         rval = pca_init(adap);
 525         if (rval)
 526                 return rval;
 527 
 528         return i2c_add_adapter(adap);
 529 }
 530 EXPORT_SYMBOL(i2c_pca_add_bus);
 531 
 532 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
 533 {
 534         int rval;
 535 
 536         rval = pca_init(adap);
 537         if (rval)
 538                 return rval;
 539 
 540         return i2c_add_numbered_adapter(adap);
 541 }
 542 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
 543 
 544 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
 545         "Wolfram Sang <w.sang@pengutronix.de>");
 546 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
 547 MODULE_LICENSE("GPL");
 548 
 549 module_param(i2c_debug, int, 0);

/* [<][>][^][v][top][bottom][index][help] */