drivers/i2c/busses/i2c-bcm2835.c

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
bcm2835_i2c_writel
bcm2835_i2c_readl
clk_bcm2835_i2c_calc_divider
clk_bcm2835_i2c_set_rate
clk_bcm2835_i2c_round_rate
clk_bcm2835_i2c_recalc_rate
bcm2835_i2c_register_div
bcm2835_fill_txfifo
bcm2835_drain_rxfifo
bcm2835_i2c_start_transfer
bcm2835_i2c_finish_transfer
bcm2835_i2c_isr
bcm2835_i2c_xfer
bcm2835_i2c_func
bcm2835_i2c_probe
bcm2835_i2c_remove
   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * BCM2835 master mode driver
   4  */
   5 
   6 #include <linux/clk.h>
   7 #include <linux/clkdev.h>
   8 #include <linux/clk-provider.h>
   9 #include <linux/completion.h>
  10 #include <linux/err.h>
  11 #include <linux/i2c.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/io.h>
  14 #include <linux/module.h>
  15 #include <linux/of_device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/slab.h>
  18 
  19 #define BCM2835_I2C_C           0x0
  20 #define BCM2835_I2C_S           0x4
  21 #define BCM2835_I2C_DLEN        0x8
  22 #define BCM2835_I2C_A           0xc
  23 #define BCM2835_I2C_FIFO        0x10
  24 #define BCM2835_I2C_DIV         0x14
  25 #define BCM2835_I2C_DEL         0x18
  26 #define BCM2835_I2C_CLKT        0x1c
  27 
  28 #define BCM2835_I2C_C_READ      BIT(0)
  29 #define BCM2835_I2C_C_CLEAR     BIT(4) /* bits 4 and 5 both clear */
  30 #define BCM2835_I2C_C_ST        BIT(7)
  31 #define BCM2835_I2C_C_INTD      BIT(8)
  32 #define BCM2835_I2C_C_INTT      BIT(9)
  33 #define BCM2835_I2C_C_INTR      BIT(10)
  34 #define BCM2835_I2C_C_I2CEN     BIT(15)
  35 
  36 #define BCM2835_I2C_S_TA        BIT(0)
  37 #define BCM2835_I2C_S_DONE      BIT(1)
  38 #define BCM2835_I2C_S_TXW       BIT(2)
  39 #define BCM2835_I2C_S_RXR       BIT(3)
  40 #define BCM2835_I2C_S_TXD       BIT(4)
  41 #define BCM2835_I2C_S_RXD       BIT(5)
  42 #define BCM2835_I2C_S_TXE       BIT(6)
  43 #define BCM2835_I2C_S_RXF       BIT(7)
  44 #define BCM2835_I2C_S_ERR       BIT(8)
  45 #define BCM2835_I2C_S_CLKT      BIT(9)
  46 #define BCM2835_I2C_S_LEN       BIT(10) /* Fake bit for SW error reporting */
  47 
  48 #define BCM2835_I2C_FEDL_SHIFT  16
  49 #define BCM2835_I2C_REDL_SHIFT  0
  50 
  51 #define BCM2835_I2C_CDIV_MIN    0x0002
  52 #define BCM2835_I2C_CDIV_MAX    0xFFFE
  53 
  54 struct bcm2835_i2c_dev {
  55         struct device *dev;
  56         void __iomem *regs;
  57         int irq;
  58         struct i2c_adapter adapter;
  59         struct completion completion;
  60         struct i2c_msg *curr_msg;
  61         struct clk *bus_clk;
  62         int num_msgs;
  63         u32 msg_err;
  64         u8 *msg_buf;
  65         size_t msg_buf_remaining;
  66 };
  67 
  68 static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
  69                                       u32 reg, u32 val)
  70 {
  71         writel(val, i2c_dev->regs + reg);
  72 }
  73 
  74 static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
  75 {
  76         return readl(i2c_dev->regs + reg);
  77 }
  78 
  79 #define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw)
  80 struct clk_bcm2835_i2c {
  81         struct clk_hw hw;
  82         struct bcm2835_i2c_dev *i2c_dev;
  83 };
  84 
  85 static int clk_bcm2835_i2c_calc_divider(unsigned long rate,
  86                                 unsigned long parent_rate)
  87 {
  88         u32 divider = DIV_ROUND_UP(parent_rate, rate);
  89 
  90         /*
  91          * Per the datasheet, the register is always interpreted as an even
  92          * number, by rounding down. In other words, the LSB is ignored. So,
  93          * if the LSB is set, increment the divider to avoid any issue.
  94          */
  95         if (divider & 1)
  96                 divider++;
  97         if ((divider < BCM2835_I2C_CDIV_MIN) ||
  98             (divider > BCM2835_I2C_CDIV_MAX))
  99                 return -EINVAL;
 100 
 101         return divider;
 102 }
 103 
 104 static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate,
 105                                 unsigned long parent_rate)
 106 {
 107         struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
 108         u32 redl, fedl;
 109         u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate);
 110 
 111         if (divider == -EINVAL)
 112                 return -EINVAL;
 113 
 114         bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider);
 115 
 116         /*
 117          * Number of core clocks to wait after falling edge before
 118          * outputting the next data bit.  Note that both FEDL and REDL
 119          * can't be greater than CDIV/2.
 120          */
 121         fedl = max(divider / 16, 1u);
 122 
 123         /*
 124          * Number of core clocks to wait after rising edge before
 125          * sampling the next incoming data bit.
 126          */
 127         redl = max(divider / 4, 1u);
 128 
 129         bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL,
 130                            (fedl << BCM2835_I2C_FEDL_SHIFT) |
 131                            (redl << BCM2835_I2C_REDL_SHIFT));
 132         return 0;
 133 }
 134 
 135 static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate,
 136                                 unsigned long *parent_rate)
 137 {
 138         u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate);
 139 
 140         return DIV_ROUND_UP(*parent_rate, divider);
 141 }
 142 
 143 static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw,
 144                                                 unsigned long parent_rate)
 145 {
 146         struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
 147         u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV);
 148 
 149         return DIV_ROUND_UP(parent_rate, divider);
 150 }
 151 
 152 static const struct clk_ops clk_bcm2835_i2c_ops = {
 153         .set_rate = clk_bcm2835_i2c_set_rate,
 154         .round_rate = clk_bcm2835_i2c_round_rate,
 155         .recalc_rate = clk_bcm2835_i2c_recalc_rate,
 156 };
 157 
 158 static struct clk *bcm2835_i2c_register_div(struct device *dev,
 159                                         struct clk *mclk,
 160                                         struct bcm2835_i2c_dev *i2c_dev)
 161 {
 162         struct clk_init_data init;
 163         struct clk_bcm2835_i2c *priv;
 164         char name[32];
 165         const char *mclk_name;
 166 
 167         snprintf(name, sizeof(name), "%s_div", dev_name(dev));
 168 
 169         mclk_name = __clk_get_name(mclk);
 170 
 171         init.ops = &clk_bcm2835_i2c_ops;
 172         init.name = name;
 173         init.parent_names = (const char* []) { mclk_name };
 174         init.num_parents = 1;
 175         init.flags = 0;
 176 
 177         priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL);
 178         if (priv == NULL)
 179                 return ERR_PTR(-ENOMEM);
 180 
 181         priv->hw.init = &init;
 182         priv->i2c_dev = i2c_dev;
 183 
 184         clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev));
 185         return devm_clk_register(dev, &priv->hw);
 186 }
 187 
 188 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
 189 {
 190         u32 val;
 191 
 192         while (i2c_dev->msg_buf_remaining) {
 193                 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 194                 if (!(val & BCM2835_I2C_S_TXD))
 195                         break;
 196                 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
 197                                    *i2c_dev->msg_buf);
 198                 i2c_dev->msg_buf++;
 199                 i2c_dev->msg_buf_remaining--;
 200         }
 201 }
 202 
 203 static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
 204 {
 205         u32 val;
 206 
 207         while (i2c_dev->msg_buf_remaining) {
 208                 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 209                 if (!(val & BCM2835_I2C_S_RXD))
 210                         break;
 211                 *i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
 212                                                       BCM2835_I2C_FIFO);
 213                 i2c_dev->msg_buf++;
 214                 i2c_dev->msg_buf_remaining--;
 215         }
 216 }
 217 
 218 /*
 219  * Repeated Start Condition (Sr)
 220  * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
 221  * talks about reading from a slave with 10 bit address. This is achieved by
 222  * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
 223  * issue a read.
 224  * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
 225  * firmware actually does it using polling and says that it's a workaround for
 226  * a problem in the state machine.
 227  * It turns out that it is possible to use the TXW interrupt to know when the
 228  * transfer is active, provided the FIFO has not been prefilled.
 229  */
 230 
 231 static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
 232 {
 233         u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
 234         struct i2c_msg *msg = i2c_dev->curr_msg;
 235         bool last_msg = (i2c_dev->num_msgs == 1);
 236 
 237         if (!i2c_dev->num_msgs)
 238                 return;
 239 
 240         i2c_dev->num_msgs--;
 241         i2c_dev->msg_buf = msg->buf;
 242         i2c_dev->msg_buf_remaining = msg->len;
 243 
 244         if (msg->flags & I2C_M_RD)
 245                 c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
 246         else
 247                 c |= BCM2835_I2C_C_INTT;
 248 
 249         if (last_msg)
 250                 c |= BCM2835_I2C_C_INTD;
 251 
 252         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
 253         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
 254         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
 255 }
 256 
 257 static void bcm2835_i2c_finish_transfer(struct bcm2835_i2c_dev *i2c_dev)
 258 {
 259         i2c_dev->curr_msg = NULL;
 260         i2c_dev->num_msgs = 0;
 261 
 262         i2c_dev->msg_buf = NULL;
 263         i2c_dev->msg_buf_remaining = 0;
 264 }
 265 
 266 /*
 267  * Note about I2C_C_CLEAR on error:
 268  * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
 269  * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
 270  * the state machine to send a NACK and a STOP. Since we're setting CLEAR
 271  * without I2CEN, that NACK will be hanging around queued up for next time
 272  * we start the engine.
 273  */
 274 
 275 static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
 276 {
 277         struct bcm2835_i2c_dev *i2c_dev = data;
 278         u32 val, err;
 279 
 280         val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 281 
 282         err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
 283         if (err) {
 284                 i2c_dev->msg_err = err;
 285                 goto complete;
 286         }
 287 
 288         if (val & BCM2835_I2C_S_DONE) {
 289                 if (!i2c_dev->curr_msg) {
 290                         dev_err(i2c_dev->dev, "Got unexpected interrupt (from firmware?)\n");
 291                 } else if (i2c_dev->curr_msg->flags & I2C_M_RD) {
 292                         bcm2835_drain_rxfifo(i2c_dev);
 293                         val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 294                 }
 295 
 296                 if ((val & BCM2835_I2C_S_RXD) || i2c_dev->msg_buf_remaining)
 297                         i2c_dev->msg_err = BCM2835_I2C_S_LEN;
 298                 else
 299                         i2c_dev->msg_err = 0;
 300                 goto complete;
 301         }
 302 
 303         if (val & BCM2835_I2C_S_TXW) {
 304                 if (!i2c_dev->msg_buf_remaining) {
 305                         i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
 306                         goto complete;
 307                 }
 308 
 309                 bcm2835_fill_txfifo(i2c_dev);
 310 
 311                 if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
 312                         i2c_dev->curr_msg++;
 313                         bcm2835_i2c_start_transfer(i2c_dev);
 314                 }
 315 
 316                 return IRQ_HANDLED;
 317         }
 318 
 319         if (val & BCM2835_I2C_S_RXR) {
 320                 if (!i2c_dev->msg_buf_remaining) {
 321                         i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
 322                         goto complete;
 323                 }
 324 
 325                 bcm2835_drain_rxfifo(i2c_dev);
 326                 return IRQ_HANDLED;
 327         }
 328 
 329         return IRQ_NONE;
 330 
 331 complete:
 332         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
 333         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT |
 334                            BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE);
 335         complete(&i2c_dev->completion);
 336 
 337         return IRQ_HANDLED;
 338 }
 339 
 340 static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
 341                             int num)
 342 {
 343         struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
 344         unsigned long time_left;
 345         int i;
 346 
 347         for (i = 0; i < (num - 1); i++)
 348                 if (msgs[i].flags & I2C_M_RD) {
 349                         dev_warn_once(i2c_dev->dev,
 350                                       "only one read message supported, has to be last\n");
 351                         return -EOPNOTSUPP;
 352                 }
 353 
 354         i2c_dev->curr_msg = msgs;
 355         i2c_dev->num_msgs = num;
 356         reinit_completion(&i2c_dev->completion);
 357 
 358         bcm2835_i2c_start_transfer(i2c_dev);
 359 
 360         time_left = wait_for_completion_timeout(&i2c_dev->completion,
 361                                                 adap->timeout);
 362 
 363         bcm2835_i2c_finish_transfer(i2c_dev);
 364 
 365         if (!time_left) {
 366                 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
 367                                    BCM2835_I2C_C_CLEAR);
 368                 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
 369                 return -ETIMEDOUT;
 370         }
 371 
 372         if (!i2c_dev->msg_err)
 373                 return num;
 374 
 375         dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
 376 
 377         if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
 378                 return -EREMOTEIO;
 379 
 380         return -EIO;
 381 }
 382 
 383 static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
 384 {
 385         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 386 }
 387 
 388 static const struct i2c_algorithm bcm2835_i2c_algo = {
 389         .master_xfer    = bcm2835_i2c_xfer,
 390         .functionality  = bcm2835_i2c_func,
 391 };
 392 
 393 /*
 394  * The BCM2835 was reported to have problems with clock stretching:
 395  * http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html
 396  * https://www.raspberrypi.org/forums/viewtopic.php?p=146272
 397  */
 398 static const struct i2c_adapter_quirks bcm2835_i2c_quirks = {
 399         .flags = I2C_AQ_NO_CLK_STRETCH,
 400 };
 401 
 402 static int bcm2835_i2c_probe(struct platform_device *pdev)
 403 {
 404         struct bcm2835_i2c_dev *i2c_dev;
 405         struct resource *mem, *irq;
 406         int ret;
 407         struct i2c_adapter *adap;
 408         struct clk *mclk;
 409         u32 bus_clk_rate;
 410 
 411         i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
 412         if (!i2c_dev)
 413                 return -ENOMEM;
 414         platform_set_drvdata(pdev, i2c_dev);
 415         i2c_dev->dev = &pdev->dev;
 416         init_completion(&i2c_dev->completion);
 417 
 418         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 419         i2c_dev->regs = devm_ioremap_resource(&pdev->dev, mem);
 420         if (IS_ERR(i2c_dev->regs))
 421                 return PTR_ERR(i2c_dev->regs);
 422 
 423         mclk = devm_clk_get(&pdev->dev, NULL);
 424         if (IS_ERR(mclk)) {
 425                 if (PTR_ERR(mclk) != -EPROBE_DEFER)
 426                         dev_err(&pdev->dev, "Could not get clock\n");
 427                 return PTR_ERR(mclk);
 428         }
 429 
 430         i2c_dev->bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk, i2c_dev);
 431 
 432         if (IS_ERR(i2c_dev->bus_clk)) {
 433                 dev_err(&pdev->dev, "Could not register clock\n");
 434                 return PTR_ERR(i2c_dev->bus_clk);
 435         }
 436 
 437         ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 438                                    &bus_clk_rate);
 439         if (ret < 0) {
 440                 dev_warn(&pdev->dev,
 441                          "Could not read clock-frequency property\n");
 442                 bus_clk_rate = 100000;
 443         }
 444 
 445         ret = clk_set_rate_exclusive(i2c_dev->bus_clk, bus_clk_rate);
 446         if (ret < 0) {
 447                 dev_err(&pdev->dev, "Could not set clock frequency\n");
 448                 return ret;
 449         }
 450 
 451         ret = clk_prepare_enable(i2c_dev->bus_clk);
 452         if (ret) {
 453                 dev_err(&pdev->dev, "Couldn't prepare clock");
 454                 return ret;
 455         }
 456 
 457         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 458         if (!irq) {
 459                 dev_err(&pdev->dev, "No IRQ resource\n");
 460                 return -ENODEV;
 461         }
 462         i2c_dev->irq = irq->start;
 463 
 464         ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
 465                           dev_name(&pdev->dev), i2c_dev);
 466         if (ret) {
 467                 dev_err(&pdev->dev, "Could not request IRQ\n");
 468                 return -ENODEV;
 469         }
 470 
 471         adap = &i2c_dev->adapter;
 472         i2c_set_adapdata(adap, i2c_dev);
 473         adap->owner = THIS_MODULE;
 474         adap->class = I2C_CLASS_DEPRECATED;
 475         snprintf(adap->name, sizeof(adap->name), "bcm2835 (%s)",
 476                  of_node_full_name(pdev->dev.of_node));
 477         adap->algo = &bcm2835_i2c_algo;
 478         adap->dev.parent = &pdev->dev;
 479         adap->dev.of_node = pdev->dev.of_node;
 480         adap->quirks = of_device_get_match_data(&pdev->dev);
 481 
 482         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
 483 
 484         ret = i2c_add_adapter(adap);
 485         if (ret)
 486                 free_irq(i2c_dev->irq, i2c_dev);
 487 
 488         return ret;
 489 }
 490 
 491 static int bcm2835_i2c_remove(struct platform_device *pdev)
 492 {
 493         struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
 494 
 495         clk_rate_exclusive_put(i2c_dev->bus_clk);
 496         clk_disable_unprepare(i2c_dev->bus_clk);
 497 
 498         free_irq(i2c_dev->irq, i2c_dev);
 499         i2c_del_adapter(&i2c_dev->adapter);
 500 
 501         return 0;
 502 }
 503 
 504 static const struct of_device_id bcm2835_i2c_of_match[] = {
 505         { .compatible = "brcm,bcm2711-i2c" },
 506         { .compatible = "brcm,bcm2835-i2c", .data = &bcm2835_i2c_quirks },
 507         {},
 508 };
 509 MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
 510 
 511 static struct platform_driver bcm2835_i2c_driver = {
 512         .probe          = bcm2835_i2c_probe,
 513         .remove         = bcm2835_i2c_remove,
 514         .driver         = {
 515                 .name   = "i2c-bcm2835",
 516                 .of_match_table = bcm2835_i2c_of_match,
 517         },
 518 };
 519 module_platform_driver(bcm2835_i2c_driver);
 520 
 521 MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
 522 MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
 523 MODULE_LICENSE("GPL v2");
 524 MODULE_ALIAS("platform:i2c-bcm2835");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/i2c/busses/i2c-bcm2835.c

DEFINITIONS
