drivers/input/serio/i8042.c

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This source file includes following definitions.
i8042_set_reset
i8042_lock_chip
i8042_unlock_chip
i8042_install_filter
i8042_remove_filter
i8042_wait_read
i8042_wait_write
i8042_flush
__i8042_command
i8042_command
i8042_kbd_write
i8042_aux_write
i8042_port_close
i8042_start
i8042_stop
i8042_filter
i8042_interrupt
i8042_enable_kbd_port
i8042_enable_aux_port
i8042_enable_mux_ports
i8042_set_mux_mode
i8042_check_mux
i8042_aux_test_irq
i8042_toggle_aux
i8042_check_aux
i8042_controller_check
i8042_controller_selftest
i8042_controller_init
i8042_controller_reset
i8042_panic_blink
i8042_dritek_enable
i8042_controller_resume
i8042_pm_suspend
i8042_pm_resume_noirq
i8042_pm_resume
i8042_pm_thaw
i8042_pm_reset
i8042_pm_restore
i8042_shutdown
i8042_create_kbd_port
i8042_create_aux_port
i8042_free_kbd_port
i8042_free_aux_ports
i8042_register_ports
i8042_unregister_ports
i8042_free_irqs
i8042_setup_aux
i8042_setup_kbd
i8042_kbd_bind_notifier
i8042_probe
i8042_remove
i8042_init
i8042_exit
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  i8042 keyboard and mouse controller driver for Linux
   4  *
   5  *  Copyright (c) 1999-2004 Vojtech Pavlik
   6  */
   7 
   8 
   9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10 
  11 #include <linux/types.h>
  12 #include <linux/delay.h>
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/init.h>
  17 #include <linux/serio.h>
  18 #include <linux/err.h>
  19 #include <linux/rcupdate.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/i8042.h>
  22 #include <linux/slab.h>
  23 #include <linux/suspend.h>
  24 
  25 #include <asm/io.h>
  26 
  27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
  28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
  29 MODULE_LICENSE("GPL");
  30 
  31 static bool i8042_nokbd;
  32 module_param_named(nokbd, i8042_nokbd, bool, 0);
  33 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
  34 
  35 static bool i8042_noaux;
  36 module_param_named(noaux, i8042_noaux, bool, 0);
  37 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
  38 
  39 static bool i8042_nomux;
  40 module_param_named(nomux, i8042_nomux, bool, 0);
  41 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
  42 
  43 static bool i8042_unlock;
  44 module_param_named(unlock, i8042_unlock, bool, 0);
  45 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
  46 
  47 enum i8042_controller_reset_mode {
  48         I8042_RESET_NEVER,
  49         I8042_RESET_ALWAYS,
  50         I8042_RESET_ON_S2RAM,
  51 #define I8042_RESET_DEFAULT     I8042_RESET_ON_S2RAM
  52 };
  53 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
  54 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
  55 {
  56         enum i8042_controller_reset_mode *arg = kp->arg;
  57         int error;
  58         bool reset;
  59 
  60         if (val) {
  61                 error = kstrtobool(val, &reset);
  62                 if (error)
  63                         return error;
  64         } else {
  65                 reset = true;
  66         }
  67 
  68         *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
  69         return 0;
  70 }
  71 
  72 static const struct kernel_param_ops param_ops_reset_param = {
  73         .flags = KERNEL_PARAM_OPS_FL_NOARG,
  74         .set = i8042_set_reset,
  75 };
  76 #define param_check_reset_param(name, p)        \
  77         __param_check(name, p, enum i8042_controller_reset_mode)
  78 module_param_named(reset, i8042_reset, reset_param, 0);
  79 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
  80 
  81 static bool i8042_direct;
  82 module_param_named(direct, i8042_direct, bool, 0);
  83 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
  84 
  85 static bool i8042_dumbkbd;
  86 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
  87 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
  88 
  89 static bool i8042_noloop;
  90 module_param_named(noloop, i8042_noloop, bool, 0);
  91 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
  92 
  93 static bool i8042_notimeout;
  94 module_param_named(notimeout, i8042_notimeout, bool, 0);
  95 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
  96 
  97 static bool i8042_kbdreset;
  98 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
  99 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
 100 
 101 #ifdef CONFIG_X86
 102 static bool i8042_dritek;
 103 module_param_named(dritek, i8042_dritek, bool, 0);
 104 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
 105 #endif
 106 
 107 #ifdef CONFIG_PNP
 108 static bool i8042_nopnp;
 109 module_param_named(nopnp, i8042_nopnp, bool, 0);
 110 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
 111 #endif
 112 
 113 #define DEBUG
 114 #ifdef DEBUG
 115 static bool i8042_debug;
 116 module_param_named(debug, i8042_debug, bool, 0600);
 117 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
 118 
 119 static bool i8042_unmask_kbd_data;
 120 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
 121 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
 122 #endif
 123 
 124 static bool i8042_bypass_aux_irq_test;
 125 static char i8042_kbd_firmware_id[128];
 126 static char i8042_aux_firmware_id[128];
 127 
 128 #include "i8042.h"
 129 
 130 /*
 131  * i8042_lock protects serialization between i8042_command and
 132  * the interrupt handler.
 133  */
 134 static DEFINE_SPINLOCK(i8042_lock);
 135 
 136 /*
 137  * Writers to AUX and KBD ports as well as users issuing i8042_command
 138  * directly should acquire i8042_mutex (by means of calling
 139  * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
 140  * they do not disturb each other (unfortunately in many i8042
 141  * implementations write to one of the ports will immediately abort
 142  * command that is being processed by another port).
 143  */
 144 static DEFINE_MUTEX(i8042_mutex);
 145 
 146 struct i8042_port {
 147         struct serio *serio;
 148         int irq;
 149         bool exists;
 150         bool driver_bound;
 151         signed char mux;
 152 };
 153 
 154 #define I8042_KBD_PORT_NO       0
 155 #define I8042_AUX_PORT_NO       1
 156 #define I8042_MUX_PORT_NO       2
 157 #define I8042_NUM_PORTS         (I8042_NUM_MUX_PORTS + 2)
 158 
 159 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
 160 
 161 static unsigned char i8042_initial_ctr;
 162 static unsigned char i8042_ctr;
 163 static bool i8042_mux_present;
 164 static bool i8042_kbd_irq_registered;
 165 static bool i8042_aux_irq_registered;
 166 static unsigned char i8042_suppress_kbd_ack;
 167 static struct platform_device *i8042_platform_device;
 168 static struct notifier_block i8042_kbd_bind_notifier_block;
 169 
 170 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
 171 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
 172                                      struct serio *serio);
 173 
 174 void i8042_lock_chip(void)
 175 {
 176         mutex_lock(&i8042_mutex);
 177 }
 178 EXPORT_SYMBOL(i8042_lock_chip);
 179 
 180 void i8042_unlock_chip(void)
 181 {
 182         mutex_unlock(&i8042_mutex);
 183 }
 184 EXPORT_SYMBOL(i8042_unlock_chip);
 185 
 186 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
 187                                         struct serio *serio))
 188 {
 189         unsigned long flags;
 190         int ret = 0;
 191 
 192         spin_lock_irqsave(&i8042_lock, flags);
 193 
 194         if (i8042_platform_filter) {
 195                 ret = -EBUSY;
 196                 goto out;
 197         }
 198 
 199         i8042_platform_filter = filter;
 200 
 201 out:
 202         spin_unlock_irqrestore(&i8042_lock, flags);
 203         return ret;
 204 }
 205 EXPORT_SYMBOL(i8042_install_filter);
 206 
 207 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
 208                                        struct serio *port))
 209 {
 210         unsigned long flags;
 211         int ret = 0;
 212 
 213         spin_lock_irqsave(&i8042_lock, flags);
 214 
 215         if (i8042_platform_filter != filter) {
 216                 ret = -EINVAL;
 217                 goto out;
 218         }
 219 
 220         i8042_platform_filter = NULL;
 221 
 222 out:
 223         spin_unlock_irqrestore(&i8042_lock, flags);
 224         return ret;
 225 }
 226 EXPORT_SYMBOL(i8042_remove_filter);
 227 
 228 /*
 229  * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
 230  * be ready for reading values from it / writing values to it.
 231  * Called always with i8042_lock held.
 232  */
 233 
 234 static int i8042_wait_read(void)
 235 {
 236         int i = 0;
 237 
 238         while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
 239                 udelay(50);
 240                 i++;
 241         }
 242         return -(i == I8042_CTL_TIMEOUT);
 243 }
 244 
 245 static int i8042_wait_write(void)
 246 {
 247         int i = 0;
 248 
 249         while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
 250                 udelay(50);
 251                 i++;
 252         }
 253         return -(i == I8042_CTL_TIMEOUT);
 254 }
 255 
 256 /*
 257  * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
 258  * of the i8042 down the toilet.
 259  */
 260 
 261 static int i8042_flush(void)
 262 {
 263         unsigned long flags;
 264         unsigned char data, str;
 265         int count = 0;
 266         int retval = 0;
 267 
 268         spin_lock_irqsave(&i8042_lock, flags);
 269 
 270         while ((str = i8042_read_status()) & I8042_STR_OBF) {
 271                 if (count++ < I8042_BUFFER_SIZE) {
 272                         udelay(50);
 273                         data = i8042_read_data();
 274                         dbg("%02x <- i8042 (flush, %s)\n",
 275                             data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
 276                 } else {
 277                         retval = -EIO;
 278                         break;
 279                 }
 280         }
 281 
 282         spin_unlock_irqrestore(&i8042_lock, flags);
 283 
 284         return retval;
 285 }
 286 
 287 /*
 288  * i8042_command() executes a command on the i8042. It also sends the input
 289  * parameter(s) of the commands to it, and receives the output value(s). The
 290  * parameters are to be stored in the param array, and the output is placed
 291  * into the same array. The number of the parameters and output values is
 292  * encoded in bits 8-11 of the command number.
 293  */
 294 
 295 static int __i8042_command(unsigned char *param, int command)
 296 {
 297         int i, error;
 298 
 299         if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
 300                 return -1;
 301 
 302         error = i8042_wait_write();
 303         if (error)
 304                 return error;
 305 
 306         dbg("%02x -> i8042 (command)\n", command & 0xff);
 307         i8042_write_command(command & 0xff);
 308 
 309         for (i = 0; i < ((command >> 12) & 0xf); i++) {
 310                 error = i8042_wait_write();
 311                 if (error) {
 312                         dbg("     -- i8042 (wait write timeout)\n");
 313                         return error;
 314                 }
 315                 dbg("%02x -> i8042 (parameter)\n", param[i]);
 316                 i8042_write_data(param[i]);
 317         }
 318 
 319         for (i = 0; i < ((command >> 8) & 0xf); i++) {
 320                 error = i8042_wait_read();
 321                 if (error) {
 322                         dbg("     -- i8042 (wait read timeout)\n");
 323                         return error;
 324                 }
 325 
 326                 if (command == I8042_CMD_AUX_LOOP &&
 327                     !(i8042_read_status() & I8042_STR_AUXDATA)) {
 328                         dbg("     -- i8042 (auxerr)\n");
 329                         return -1;
 330                 }
 331 
 332                 param[i] = i8042_read_data();
 333                 dbg("%02x <- i8042 (return)\n", param[i]);
 334         }
 335 
 336         return 0;
 337 }
 338 
 339 int i8042_command(unsigned char *param, int command)
 340 {
 341         unsigned long flags;
 342         int retval;
 343 
 344         spin_lock_irqsave(&i8042_lock, flags);
 345         retval = __i8042_command(param, command);
 346         spin_unlock_irqrestore(&i8042_lock, flags);
 347 
 348         return retval;
 349 }
 350 EXPORT_SYMBOL(i8042_command);
 351 
 352 /*
 353  * i8042_kbd_write() sends a byte out through the keyboard interface.
 354  */
 355 
 356 static int i8042_kbd_write(struct serio *port, unsigned char c)
 357 {
 358         unsigned long flags;
 359         int retval = 0;
 360 
 361         spin_lock_irqsave(&i8042_lock, flags);
 362 
 363         if (!(retval = i8042_wait_write())) {
 364                 dbg("%02x -> i8042 (kbd-data)\n", c);
 365                 i8042_write_data(c);
 366         }
 367 
 368         spin_unlock_irqrestore(&i8042_lock, flags);
 369 
 370         return retval;
 371 }
 372 
 373 /*
 374  * i8042_aux_write() sends a byte out through the aux interface.
 375  */
 376 
 377 static int i8042_aux_write(struct serio *serio, unsigned char c)
 378 {
 379         struct i8042_port *port = serio->port_data;
 380 
 381         return i8042_command(&c, port->mux == -1 ?
 382                                         I8042_CMD_AUX_SEND :
 383                                         I8042_CMD_MUX_SEND + port->mux);
 384 }
 385 
 386 
 387 /*
 388  * i8042_port_close attempts to clear AUX or KBD port state by disabling
 389  * and then re-enabling it.
 390  */
 391 
 392 static void i8042_port_close(struct serio *serio)
 393 {
 394         int irq_bit;
 395         int disable_bit;
 396         const char *port_name;
 397 
 398         if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
 399                 irq_bit = I8042_CTR_AUXINT;
 400                 disable_bit = I8042_CTR_AUXDIS;
 401                 port_name = "AUX";
 402         } else {
 403                 irq_bit = I8042_CTR_KBDINT;
 404                 disable_bit = I8042_CTR_KBDDIS;
 405                 port_name = "KBD";
 406         }
 407 
 408         i8042_ctr &= ~irq_bit;
 409         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
 410                 pr_warn("Can't write CTR while closing %s port\n", port_name);
 411 
 412         udelay(50);
 413 
 414         i8042_ctr &= ~disable_bit;
 415         i8042_ctr |= irq_bit;
 416         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
 417                 pr_err("Can't reactivate %s port\n", port_name);
 418 
 419         /*
 420          * See if there is any data appeared while we were messing with
 421          * port state.
 422          */
 423         i8042_interrupt(0, NULL);
 424 }
 425 
 426 /*
 427  * i8042_start() is called by serio core when port is about to finish
 428  * registering. It will mark port as existing so i8042_interrupt can
 429  * start sending data through it.
 430  */
 431 static int i8042_start(struct serio *serio)
 432 {
 433         struct i8042_port *port = serio->port_data;
 434 
 435         device_set_wakeup_capable(&serio->dev, true);
 436 
 437         /*
 438          * On platforms using suspend-to-idle, allow the keyboard to
 439          * wake up the system from sleep by enabling keyboard wakeups
 440          * by default.  This is consistent with keyboard wakeup
 441          * behavior on many platforms using suspend-to-RAM (ACPI S3)
 442          * by default.
 443          */
 444         if (pm_suspend_default_s2idle() &&
 445             serio == i8042_ports[I8042_KBD_PORT_NO].serio) {
 446                 device_set_wakeup_enable(&serio->dev, true);
 447         }
 448 
 449         spin_lock_irq(&i8042_lock);
 450         port->exists = true;
 451         spin_unlock_irq(&i8042_lock);
 452 
 453         return 0;
 454 }
 455 
 456 /*
 457  * i8042_stop() marks serio port as non-existing so i8042_interrupt
 458  * will not try to send data to the port that is about to go away.
 459  * The function is called by serio core as part of unregister procedure.
 460  */
 461 static void i8042_stop(struct serio *serio)
 462 {
 463         struct i8042_port *port = serio->port_data;
 464 
 465         spin_lock_irq(&i8042_lock);
 466         port->exists = false;
 467         port->serio = NULL;
 468         spin_unlock_irq(&i8042_lock);
 469 
 470         /*
 471          * We need to make sure that interrupt handler finishes using
 472          * our serio port before we return from this function.
 473          * We synchronize with both AUX and KBD IRQs because there is
 474          * a (very unlikely) chance that AUX IRQ is raised for KBD port
 475          * and vice versa.
 476          */
 477         synchronize_irq(I8042_AUX_IRQ);
 478         synchronize_irq(I8042_KBD_IRQ);
 479 }
 480 
 481 /*
 482  * i8042_filter() filters out unwanted bytes from the input data stream.
 483  * It is called from i8042_interrupt and thus is running with interrupts
 484  * off and i8042_lock held.
 485  */
 486 static bool i8042_filter(unsigned char data, unsigned char str,
 487                          struct serio *serio)
 488 {
 489         if (unlikely(i8042_suppress_kbd_ack)) {
 490                 if ((~str & I8042_STR_AUXDATA) &&
 491                     (data == 0xfa || data == 0xfe)) {
 492                         i8042_suppress_kbd_ack--;
 493                         dbg("Extra keyboard ACK - filtered out\n");
 494                         return true;
 495                 }
 496         }
 497 
 498         if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
 499                 dbg("Filtered out by platform filter\n");
 500                 return true;
 501         }
 502 
 503         return false;
 504 }
 505 
 506 /*
 507  * i8042_interrupt() is the most important function in this driver -
 508  * it handles the interrupts from the i8042, and sends incoming bytes
 509  * to the upper layers.
 510  */
 511 
 512 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
 513 {
 514         struct i8042_port *port;
 515         struct serio *serio;
 516         unsigned long flags;
 517         unsigned char str, data;
 518         unsigned int dfl;
 519         unsigned int port_no;
 520         bool filtered;
 521         int ret = 1;
 522 
 523         spin_lock_irqsave(&i8042_lock, flags);
 524 
 525         str = i8042_read_status();
 526         if (unlikely(~str & I8042_STR_OBF)) {
 527                 spin_unlock_irqrestore(&i8042_lock, flags);
 528                 if (irq)
 529                         dbg("Interrupt %d, without any data\n", irq);
 530                 ret = 0;
 531                 goto out;
 532         }
 533 
 534         data = i8042_read_data();
 535 
 536         if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
 537                 static unsigned long last_transmit;
 538                 static unsigned char last_str;
 539 
 540                 dfl = 0;
 541                 if (str & I8042_STR_MUXERR) {
 542                         dbg("MUX error, status is %02x, data is %02x\n",
 543                             str, data);
 544 /*
 545  * When MUXERR condition is signalled the data register can only contain
 546  * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
 547  * it is not always the case. Some KBCs also report 0xfc when there is
 548  * nothing connected to the port while others sometimes get confused which
 549  * port the data came from and signal error leaving the data intact. They
 550  * _do not_ revert to legacy mode (actually I've never seen KBC reverting
 551  * to legacy mode yet, when we see one we'll add proper handling).
 552  * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
 553  * rest assume that the data came from the same serio last byte
 554  * was transmitted (if transmission happened not too long ago).
 555  */
 556 
 557                         switch (data) {
 558                                 default:
 559                                         if (time_before(jiffies, last_transmit + HZ/10)) {
 560                                                 str = last_str;
 561                                                 break;
 562                                         }
 563                                         /* fall through - report timeout */
 564                                 case 0xfc:
 565                                 case 0xfd:
 566                                 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
 567                                 case 0xff: dfl = SERIO_PARITY;  data = 0xfe; break;
 568                         }
 569                 }
 570 
 571                 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
 572                 last_str = str;
 573                 last_transmit = jiffies;
 574         } else {
 575 
 576                 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
 577                       ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
 578 
 579                 port_no = (str & I8042_STR_AUXDATA) ?
 580                                 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
 581         }
 582 
 583         port = &i8042_ports[port_no];
 584         serio = port->exists ? port->serio : NULL;
 585 
 586         filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
 587                    port_no, irq,
 588                    dfl & SERIO_PARITY ? ", bad parity" : "",
 589                    dfl & SERIO_TIMEOUT ? ", timeout" : "");
 590 
 591         filtered = i8042_filter(data, str, serio);
 592 
 593         spin_unlock_irqrestore(&i8042_lock, flags);
 594 
 595         if (likely(serio && !filtered))
 596                 serio_interrupt(serio, data, dfl);
 597 
 598  out:
 599         return IRQ_RETVAL(ret);
 600 }
 601 
 602 /*
 603  * i8042_enable_kbd_port enables keyboard port on chip
 604  */
 605 
 606 static int i8042_enable_kbd_port(void)
 607 {
 608         i8042_ctr &= ~I8042_CTR_KBDDIS;
 609         i8042_ctr |= I8042_CTR_KBDINT;
 610 
 611         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
 612                 i8042_ctr &= ~I8042_CTR_KBDINT;
 613                 i8042_ctr |= I8042_CTR_KBDDIS;
 614                 pr_err("Failed to enable KBD port\n");
 615                 return -EIO;
 616         }
 617 
 618         return 0;
 619 }
 620 
 621 /*
 622  * i8042_enable_aux_port enables AUX (mouse) port on chip
 623  */
 624 
 625 static int i8042_enable_aux_port(void)
 626 {
 627         i8042_ctr &= ~I8042_CTR_AUXDIS;
 628         i8042_ctr |= I8042_CTR_AUXINT;
 629 
 630         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
 631                 i8042_ctr &= ~I8042_CTR_AUXINT;
 632                 i8042_ctr |= I8042_CTR_AUXDIS;
 633                 pr_err("Failed to enable AUX port\n");
 634                 return -EIO;
 635         }
 636 
 637         return 0;
 638 }
 639 
 640 /*
 641  * i8042_enable_mux_ports enables 4 individual AUX ports after
 642  * the controller has been switched into Multiplexed mode
 643  */
 644 
 645 static int i8042_enable_mux_ports(void)
 646 {
 647         unsigned char param;
 648         int i;
 649 
 650         for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
 651                 i8042_command(&param, I8042_CMD_MUX_PFX + i);
 652                 i8042_command(&param, I8042_CMD_AUX_ENABLE);
 653         }
 654 
 655         return i8042_enable_aux_port();
 656 }
 657 
 658 /*
 659  * i8042_set_mux_mode checks whether the controller has an
 660  * active multiplexor and puts the chip into Multiplexed (true)
 661  * or Legacy (false) mode.
 662  */
 663 
 664 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
 665 {
 666 
 667         unsigned char param, val;
 668 /*
 669  * Get rid of bytes in the queue.
 670  */
 671 
 672         i8042_flush();
 673 
 674 /*
 675  * Internal loopback test - send three bytes, they should come back from the
 676  * mouse interface, the last should be version.
 677  */
 678 
 679         param = val = 0xf0;
 680         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
 681                 return -1;
 682         param = val = multiplex ? 0x56 : 0xf6;
 683         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
 684                 return -1;
 685         param = val = multiplex ? 0xa4 : 0xa5;
 686         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == val)
 687                 return -1;
 688 
 689 /*
 690  * Workaround for interference with USB Legacy emulation
 691  * that causes a v10.12 MUX to be found.
 692  */
 693         if (param == 0xac)
 694                 return -1;
 695 
 696         if (mux_version)
 697                 *mux_version = param;
 698 
 699         return 0;
 700 }
 701 
 702 /*
 703  * i8042_check_mux() checks whether the controller supports the PS/2 Active
 704  * Multiplexing specification by Synaptics, Phoenix, Insyde and
 705  * LCS/Telegraphics.
 706  */
 707 
 708 static int __init i8042_check_mux(void)
 709 {
 710         unsigned char mux_version;
 711 
 712         if (i8042_set_mux_mode(true, &mux_version))
 713                 return -1;
 714 
 715         pr_info("Detected active multiplexing controller, rev %d.%d\n",
 716                 (mux_version >> 4) & 0xf, mux_version & 0xf);
 717 
 718 /*
 719  * Disable all muxed ports by disabling AUX.
 720  */
 721         i8042_ctr |= I8042_CTR_AUXDIS;
 722         i8042_ctr &= ~I8042_CTR_AUXINT;
 723 
 724         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
 725                 pr_err("Failed to disable AUX port, can't use MUX\n");
 726                 return -EIO;
 727         }
 728 
 729         i8042_mux_present = true;
 730 
 731         return 0;
 732 }
 733 
 734 /*
 735  * The following is used to test AUX IRQ delivery.
 736  */
 737 static struct completion i8042_aux_irq_delivered __initdata;
 738 static bool i8042_irq_being_tested __initdata;
 739 
 740 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
 741 {
 742         unsigned long flags;
 743         unsigned char str, data;
 744         int ret = 0;
 745 
 746         spin_lock_irqsave(&i8042_lock, flags);
 747         str = i8042_read_status();
 748         if (str & I8042_STR_OBF) {
 749                 data = i8042_read_data();
 750                 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
 751                     data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
 752                 if (i8042_irq_being_tested &&
 753                     data == 0xa5 && (str & I8042_STR_AUXDATA))
 754                         complete(&i8042_aux_irq_delivered);
 755                 ret = 1;
 756         }
 757         spin_unlock_irqrestore(&i8042_lock, flags);
 758 
 759         return IRQ_RETVAL(ret);
 760 }
 761 
 762 /*
 763  * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
 764  * verifies success by readinng CTR. Used when testing for presence of AUX
 765  * port.
 766  */
 767 static int __init i8042_toggle_aux(bool on)
 768 {
 769         unsigned char param;
 770         int i;
 771 
 772         if (i8042_command(&param,
 773                         on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
 774                 return -1;
 775 
 776         /* some chips need some time to set the I8042_CTR_AUXDIS bit */
 777         for (i = 0; i < 100; i++) {
 778                 udelay(50);
 779 
 780                 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
 781                         return -1;
 782 
 783                 if (!(param & I8042_CTR_AUXDIS) == on)
 784                         return 0;
 785         }
 786 
 787         return -1;
 788 }
 789 
 790 /*
 791  * i8042_check_aux() applies as much paranoia as it can at detecting
 792  * the presence of an AUX interface.
 793  */
 794 
 795 static int __init i8042_check_aux(void)
 796 {
 797         int retval = -1;
 798         bool irq_registered = false;
 799         bool aux_loop_broken = false;
 800         unsigned long flags;
 801         unsigned char param;
 802 
 803 /*
 804  * Get rid of bytes in the queue.
 805  */
 806 
 807         i8042_flush();
 808 
 809 /*
 810  * Internal loopback test - filters out AT-type i8042's. Unfortunately
 811  * SiS screwed up and their 5597 doesn't support the LOOP command even
 812  * though it has an AUX port.
 813  */
 814 
 815         param = 0x5a;
 816         retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
 817         if (retval || param != 0x5a) {
 818 
 819 /*
 820  * External connection test - filters out AT-soldered PS/2 i8042's
 821  * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
 822  * 0xfa - no error on some notebooks which ignore the spec
 823  * Because it's common for chipsets to return error on perfectly functioning
 824  * AUX ports, we test for this only when the LOOP command failed.
 825  */
 826 
 827                 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
 828                     (param && param != 0xfa && param != 0xff))
 829                         return -1;
 830 
 831 /*
 832  * If AUX_LOOP completed without error but returned unexpected data
 833  * mark it as broken
 834  */
 835                 if (!retval)
 836                         aux_loop_broken = true;
 837         }
 838 
 839 /*
 840  * Bit assignment test - filters out PS/2 i8042's in AT mode
 841  */
 842 
 843         if (i8042_toggle_aux(false)) {
 844                 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
 845                 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
 846         }
 847 
 848         if (i8042_toggle_aux(true))
 849                 return -1;
 850 
 851 /*
 852  * Reset keyboard (needed on some laptops to successfully detect
 853  * touchpad, e.g., some Gigabyte laptop models with Elantech
 854  * touchpads).
 855  */
 856         if (i8042_kbdreset) {
 857                 pr_warn("Attempting to reset device connected to KBD port\n");
 858                 i8042_kbd_write(NULL, (unsigned char) 0xff);
 859         }
 860 
 861 /*
 862  * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
 863  * used it for a PCI card or somethig else.
 864  */
 865 
 866         if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
 867 /*
 868  * Without LOOP command we can't test AUX IRQ delivery. Assume the port
 869  * is working and hope we are right.
 870  */
 871                 retval = 0;
 872                 goto out;
 873         }
 874 
 875         if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
 876                         "i8042", i8042_platform_device))
 877                 goto out;
 878 
 879         irq_registered = true;
 880 
 881         if (i8042_enable_aux_port())
 882                 goto out;
 883 
 884         spin_lock_irqsave(&i8042_lock, flags);
 885 
 886         init_completion(&i8042_aux_irq_delivered);
 887         i8042_irq_being_tested = true;
 888 
 889         param = 0xa5;
 890         retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
 891 
 892         spin_unlock_irqrestore(&i8042_lock, flags);
 893 
 894         if (retval)
 895                 goto out;
 896 
 897         if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
 898                                         msecs_to_jiffies(250)) == 0) {
 899 /*
 900  * AUX IRQ was never delivered so we need to flush the controller to
 901  * get rid of the byte we put there; otherwise keyboard may not work.
 902  */
 903                 dbg("     -- i8042 (aux irq test timeout)\n");
 904                 i8042_flush();
 905                 retval = -1;
 906         }
 907 
 908  out:
 909 
 910 /*
 911  * Disable the interface.
 912  */
 913 
 914         i8042_ctr |= I8042_CTR_AUXDIS;
 915         i8042_ctr &= ~I8042_CTR_AUXINT;
 916 
 917         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
 918                 retval = -1;
 919 
 920         if (irq_registered)
 921                 free_irq(I8042_AUX_IRQ, i8042_platform_device);
 922 
 923         return retval;
 924 }
 925 
 926 static int i8042_controller_check(void)
 927 {
 928         if (i8042_flush()) {
 929                 pr_info("No controller found\n");
 930                 return -ENODEV;
 931         }
 932 
 933         return 0;
 934 }
 935 
 936 static int i8042_controller_selftest(void)
 937 {
 938         unsigned char param;
 939         int i = 0;
 940 
 941         /*
 942          * We try this 5 times; on some really fragile systems this does not
 943          * take the first time...
 944          */
 945         do {
 946 
 947                 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
 948                         pr_err("i8042 controller selftest timeout\n");
 949                         return -ENODEV;
 950                 }
 951 
 952                 if (param == I8042_RET_CTL_TEST)
 953                         return 0;
 954 
 955                 dbg("i8042 controller selftest: %#x != %#x\n",
 956                     param, I8042_RET_CTL_TEST);
 957                 msleep(50);
 958         } while (i++ < 5);
 959 
 960 #ifdef CONFIG_X86
 961         /*
 962          * On x86, we don't fail entire i8042 initialization if controller
 963          * reset fails in hopes that keyboard port will still be functional
 964          * and user will still get a working keyboard. This is especially
 965          * important on netbooks. On other arches we trust hardware more.
 966          */
 967         pr_info("giving up on controller selftest, continuing anyway...\n");
 968         return 0;
 969 #else
 970         pr_err("i8042 controller selftest failed\n");
 971         return -EIO;
 972 #endif
 973 }
 974 
 975 /*
 976  * i8042_controller init initializes the i8042 controller, and,
 977  * most importantly, sets it into non-xlated mode if that's
 978  * desired.
 979  */
 980 
 981 static int i8042_controller_init(void)
 982 {
 983         unsigned long flags;
 984         int n = 0;
 985         unsigned char ctr[2];
 986 
 987 /*
 988  * Save the CTR for restore on unload / reboot.
 989  */
 990 
 991         do {
 992                 if (n >= 10) {
 993                         pr_err("Unable to get stable CTR read\n");
 994                         return -EIO;
 995                 }
 996 
 997                 if (n != 0)
 998                         udelay(50);
 999 
1000                 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
1001                         pr_err("Can't read CTR while initializing i8042\n");
1002                         return -EIO;
1003                 }
1004 
1005         } while (n < 2 || ctr[0] != ctr[1]);
1006 
1007         i8042_initial_ctr = i8042_ctr = ctr[0];
1008 
1009 /*
1010  * Disable the keyboard interface and interrupt.
1011  */
1012 
1013         i8042_ctr |= I8042_CTR_KBDDIS;
1014         i8042_ctr &= ~I8042_CTR_KBDINT;
1015 
1016 /*
1017  * Handle keylock.
1018  */
1019 
1020         spin_lock_irqsave(&i8042_lock, flags);
1021         if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1022                 if (i8042_unlock)
1023                         i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1024                 else
1025                         pr_warn("Warning: Keylock active\n");
1026         }
1027         spin_unlock_irqrestore(&i8042_lock, flags);
1028 
1029 /*
1030  * If the chip is configured into nontranslated mode by the BIOS, don't
1031  * bother enabling translating and be happy.
1032  */
1033 
1034         if (~i8042_ctr & I8042_CTR_XLATE)
1035                 i8042_direct = true;
1036 
1037 /*
1038  * Set nontranslated mode for the kbd interface if requested by an option.
1039  * After this the kbd interface becomes a simple serial in/out, like the aux
1040  * interface is. We don't do this by default, since it can confuse notebook
1041  * BIOSes.
1042  */
1043 
1044         if (i8042_direct)
1045                 i8042_ctr &= ~I8042_CTR_XLATE;
1046 
1047 /*
1048  * Write CTR back.
1049  */
1050 
1051         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1052                 pr_err("Can't write CTR while initializing i8042\n");
1053                 return -EIO;
1054         }
1055 
1056 /*
1057  * Flush whatever accumulated while we were disabling keyboard port.
1058  */
1059 
1060         i8042_flush();
1061 
1062         return 0;
1063 }
1064 
1065 
1066 /*
1067  * Reset the controller and reset CRT to the original value set by BIOS.
1068  */
1069 
1070 static void i8042_controller_reset(bool s2r_wants_reset)
1071 {
1072         i8042_flush();
1073 
1074 /*
1075  * Disable both KBD and AUX interfaces so they don't get in the way
1076  */
1077 
1078         i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1079         i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1080 
1081         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1082                 pr_warn("Can't write CTR while resetting\n");
1083 
1084 /*
1085  * Disable MUX mode if present.
1086  */
1087 
1088         if (i8042_mux_present)
1089                 i8042_set_mux_mode(false, NULL);
1090 
1091 /*
1092  * Reset the controller if requested.
1093  */
1094 
1095         if (i8042_reset == I8042_RESET_ALWAYS ||
1096             (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1097                 i8042_controller_selftest();
1098         }
1099 
1100 /*
1101  * Restore the original control register setting.
1102  */
1103 
1104         if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1105                 pr_warn("Can't restore CTR\n");
1106 }
1107 
1108 
1109 /*
1110  * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1111  * when kernel panics. Flashing LEDs is useful for users running X who may
1112  * not see the console and will help distinguishing panics from "real"
1113  * lockups.
1114  *
1115  * Note that DELAY has a limit of 10ms so we will not get stuck here
1116  * waiting for KBC to free up even if KBD interrupt is off
1117  */
1118 
1119 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1120 
1121 static long i8042_panic_blink(int state)
1122 {
1123         long delay = 0;
1124         char led;
1125 
1126         led = (state) ? 0x01 | 0x04 : 0;
1127         while (i8042_read_status() & I8042_STR_IBF)
1128                 DELAY;
1129         dbg("%02x -> i8042 (panic blink)\n", 0xed);
1130         i8042_suppress_kbd_ack = 2;
1131         i8042_write_data(0xed); /* set leds */
1132         DELAY;
1133         while (i8042_read_status() & I8042_STR_IBF)
1134                 DELAY;
1135         DELAY;
1136         dbg("%02x -> i8042 (panic blink)\n", led);
1137         i8042_write_data(led);
1138         DELAY;
1139         return delay;
1140 }
1141 
1142 #undef DELAY
1143 
1144 #ifdef CONFIG_X86
1145 static void i8042_dritek_enable(void)
1146 {
1147         unsigned char param = 0x90;
1148         int error;
1149 
1150         error = i8042_command(&param, 0x1059);
1151         if (error)
1152                 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1153 }
1154 #endif
1155 
1156 #ifdef CONFIG_PM
1157 
1158 /*
1159  * Here we try to reset everything back to a state we had
1160  * before suspending.
1161  */
1162 
1163 static int i8042_controller_resume(bool s2r_wants_reset)
1164 {
1165         int error;
1166 
1167         error = i8042_controller_check();
1168         if (error)
1169                 return error;
1170 
1171         if (i8042_reset == I8042_RESET_ALWAYS ||
1172             (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1173                 error = i8042_controller_selftest();
1174                 if (error)
1175                         return error;
1176         }
1177 
1178 /*
1179  * Restore original CTR value and disable all ports
1180  */
1181 
1182         i8042_ctr = i8042_initial_ctr;
1183         if (i8042_direct)
1184                 i8042_ctr &= ~I8042_CTR_XLATE;
1185         i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1186         i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1187         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1188                 pr_warn("Can't write CTR to resume, retrying...\n");
1189                 msleep(50);
1190                 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1191                         pr_err("CTR write retry failed\n");
1192                         return -EIO;
1193                 }
1194         }
1195 
1196 
1197 #ifdef CONFIG_X86
1198         if (i8042_dritek)
1199                 i8042_dritek_enable();
1200 #endif
1201 
1202         if (i8042_mux_present) {
1203                 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1204                         pr_warn("failed to resume active multiplexor, mouse won't work\n");
1205         } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1206                 i8042_enable_aux_port();
1207 
1208         if (i8042_ports[I8042_KBD_PORT_NO].serio)
1209                 i8042_enable_kbd_port();
1210 
1211         i8042_interrupt(0, NULL);
1212 
1213         return 0;
1214 }
1215 
1216 /*
1217  * Here we try to restore the original BIOS settings to avoid
1218  * upsetting it.
1219  */
1220 
1221 static int i8042_pm_suspend(struct device *dev)
1222 {
1223         int i;
1224 
1225         if (pm_suspend_via_firmware())
1226                 i8042_controller_reset(true);
1227 
1228         /* Set up serio interrupts for system wakeup. */
1229         for (i = 0; i < I8042_NUM_PORTS; i++) {
1230                 struct serio *serio = i8042_ports[i].serio;
1231 
1232                 if (serio && device_may_wakeup(&serio->dev))
1233                         enable_irq_wake(i8042_ports[i].irq);
1234         }
1235 
1236         return 0;
1237 }
1238 
1239 static int i8042_pm_resume_noirq(struct device *dev)
1240 {
1241         if (!pm_resume_via_firmware())
1242                 i8042_interrupt(0, NULL);
1243 
1244         return 0;
1245 }
1246 
1247 static int i8042_pm_resume(struct device *dev)
1248 {
1249         bool want_reset;
1250         int i;
1251 
1252         for (i = 0; i < I8042_NUM_PORTS; i++) {
1253                 struct serio *serio = i8042_ports[i].serio;
1254 
1255                 if (serio && device_may_wakeup(&serio->dev))
1256                         disable_irq_wake(i8042_ports[i].irq);
1257         }
1258 
1259         /*
1260          * If platform firmware was not going to be involved in suspend, we did
1261          * not restore the controller state to whatever it had been at boot
1262          * time, so we do not need to do anything.
1263          */
1264         if (!pm_suspend_via_firmware())
1265                 return 0;
1266 
1267         /*
1268          * We only need to reset the controller if we are resuming after handing
1269          * off control to the platform firmware, otherwise we can simply restore
1270          * the mode.
1271          */
1272         want_reset = pm_resume_via_firmware();
1273 
1274         return i8042_controller_resume(want_reset);
1275 }
1276 
1277 static int i8042_pm_thaw(struct device *dev)
1278 {
1279         i8042_interrupt(0, NULL);
1280 
1281         return 0;
1282 }
1283 
1284 static int i8042_pm_reset(struct device *dev)
1285 {
1286         i8042_controller_reset(false);
1287 
1288         return 0;
1289 }
1290 
1291 static int i8042_pm_restore(struct device *dev)
1292 {
1293         return i8042_controller_resume(false);
1294 }
1295 
1296 static const struct dev_pm_ops i8042_pm_ops = {
1297         .suspend        = i8042_pm_suspend,
1298         .resume_noirq   = i8042_pm_resume_noirq,
1299         .resume         = i8042_pm_resume,
1300         .thaw           = i8042_pm_thaw,
1301         .poweroff       = i8042_pm_reset,
1302         .restore        = i8042_pm_restore,
1303 };
1304 
1305 #endif /* CONFIG_PM */
1306 
1307 /*
1308  * We need to reset the 8042 back to original mode on system shutdown,
1309  * because otherwise BIOSes will be confused.
1310  */
1311 
1312 static void i8042_shutdown(struct platform_device *dev)
1313 {
1314         i8042_controller_reset(false);
1315 }
1316 
1317 static int __init i8042_create_kbd_port(void)
1318 {
1319         struct serio *serio;
1320         struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1321 
1322         serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1323         if (!serio)
1324                 return -ENOMEM;
1325 
1326         serio->id.type          = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1327         serio->write            = i8042_dumbkbd ? NULL : i8042_kbd_write;
1328         serio->start            = i8042_start;
1329         serio->stop             = i8042_stop;
1330         serio->close            = i8042_port_close;
1331         serio->ps2_cmd_mutex    = &i8042_mutex;
1332         serio->port_data        = port;
1333         serio->dev.parent       = &i8042_platform_device->dev;
1334         strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1335         strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1336         strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1337                 sizeof(serio->firmware_id));
1338 
1339         port->serio = serio;
1340         port->irq = I8042_KBD_IRQ;
1341 
1342         return 0;
1343 }
1344 
1345 static int __init i8042_create_aux_port(int idx)
1346 {
1347         struct serio *serio;
1348         int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1349         struct i8042_port *port = &i8042_ports[port_no];
1350 
1351         serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1352         if (!serio)
1353                 return -ENOMEM;
1354 
1355         serio->id.type          = SERIO_8042;
1356         serio->write            = i8042_aux_write;
1357         serio->start            = i8042_start;
1358         serio->stop             = i8042_stop;
1359         serio->ps2_cmd_mutex    = &i8042_mutex;
1360         serio->port_data        = port;
1361         serio->dev.parent       = &i8042_platform_device->dev;
1362         if (idx < 0) {
1363                 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1364                 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1365                 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1366                         sizeof(serio->firmware_id));
1367                 serio->close = i8042_port_close;
1368         } else {
1369                 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1370                 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1371                 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1372                         sizeof(serio->firmware_id));
1373         }
1374 
1375         port->serio = serio;
1376         port->mux = idx;
1377         port->irq = I8042_AUX_IRQ;
1378 
1379         return 0;
1380 }
1381 
1382 static void __init i8042_free_kbd_port(void)
1383 {
1384         kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1385         i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1386 }
1387 
1388 static void __init i8042_free_aux_ports(void)
1389 {
1390         int i;
1391 
1392         for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1393                 kfree(i8042_ports[i].serio);
1394                 i8042_ports[i].serio = NULL;
1395         }
1396 }
1397 
1398 static void __init i8042_register_ports(void)
1399 {
1400         int i;
1401 
1402         for (i = 0; i < I8042_NUM_PORTS; i++) {
1403                 struct serio *serio = i8042_ports[i].serio;
1404 
1405                 if (!serio)
1406                         continue;
1407 
1408                 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1409                         serio->name,
1410                         (unsigned long) I8042_DATA_REG,
1411                         (unsigned long) I8042_COMMAND_REG,
1412                         i8042_ports[i].irq);
1413                 serio_register_port(serio);
1414         }
1415 }
1416 
1417 static void i8042_unregister_ports(void)
1418 {
1419         int i;
1420 
1421         for (i = 0; i < I8042_NUM_PORTS; i++) {
1422                 if (i8042_ports[i].serio) {
1423                         serio_unregister_port(i8042_ports[i].serio);
1424                         i8042_ports[i].serio = NULL;
1425                 }
1426         }
1427 }
1428 
1429 static void i8042_free_irqs(void)
1430 {
1431         if (i8042_aux_irq_registered)
1432                 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1433         if (i8042_kbd_irq_registered)
1434                 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1435 
1436         i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1437 }
1438 
1439 static int __init i8042_setup_aux(void)
1440 {
1441         int (*aux_enable)(void);
1442         int error;
1443         int i;
1444 
1445         if (i8042_check_aux())
1446                 return -ENODEV;
1447 
1448         if (i8042_nomux || i8042_check_mux()) {
1449                 error = i8042_create_aux_port(-1);
1450                 if (error)
1451                         goto err_free_ports;
1452                 aux_enable = i8042_enable_aux_port;
1453         } else {
1454                 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1455                         error = i8042_create_aux_port(i);
1456                         if (error)
1457                                 goto err_free_ports;
1458                 }
1459                 aux_enable = i8042_enable_mux_ports;
1460         }
1461 
1462         error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1463                             "i8042", i8042_platform_device);
1464         if (error)
1465                 goto err_free_ports;
1466 
1467         if (aux_enable())
1468                 goto err_free_irq;
1469 
1470         i8042_aux_irq_registered = true;
1471         return 0;
1472 
1473  err_free_irq:
1474         free_irq(I8042_AUX_IRQ, i8042_platform_device);
1475  err_free_ports:
1476         i8042_free_aux_ports();
1477         return error;
1478 }
1479 
1480 static int __init i8042_setup_kbd(void)
1481 {
1482         int error;
1483 
1484         error = i8042_create_kbd_port();
1485         if (error)
1486                 return error;
1487 
1488         error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1489                             "i8042", i8042_platform_device);
1490         if (error)
1491                 goto err_free_port;
1492 
1493         error = i8042_enable_kbd_port();
1494         if (error)
1495                 goto err_free_irq;
1496 
1497         i8042_kbd_irq_registered = true;
1498         return 0;
1499 
1500  err_free_irq:
1501         free_irq(I8042_KBD_IRQ, i8042_platform_device);
1502  err_free_port:
1503         i8042_free_kbd_port();
1504         return error;
1505 }
1506 
1507 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1508                                    unsigned long action, void *data)
1509 {
1510         struct device *dev = data;
1511         struct serio *serio = to_serio_port(dev);
1512         struct i8042_port *port = serio->port_data;
1513 
1514         if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1515                 return 0;
1516 
1517         switch (action) {
1518         case BUS_NOTIFY_BOUND_DRIVER:
1519                 port->driver_bound = true;
1520                 break;
1521 
1522         case BUS_NOTIFY_UNBIND_DRIVER:
1523                 port->driver_bound = false;
1524                 break;
1525         }
1526 
1527         return 0;
1528 }
1529 
1530 static int __init i8042_probe(struct platform_device *dev)
1531 {
1532         int error;
1533 
1534         i8042_platform_device = dev;
1535 
1536         if (i8042_reset == I8042_RESET_ALWAYS) {
1537                 error = i8042_controller_selftest();
1538                 if (error)
1539                         return error;
1540         }
1541 
1542         error = i8042_controller_init();
1543         if (error)
1544                 return error;
1545 
1546 #ifdef CONFIG_X86
1547         if (i8042_dritek)
1548                 i8042_dritek_enable();
1549 #endif
1550 
1551         if (!i8042_noaux) {
1552                 error = i8042_setup_aux();
1553                 if (error && error != -ENODEV && error != -EBUSY)
1554                         goto out_fail;
1555         }
1556 
1557         if (!i8042_nokbd) {
1558                 error = i8042_setup_kbd();
1559                 if (error)
1560                         goto out_fail;
1561         }
1562 /*
1563  * Ok, everything is ready, let's register all serio ports
1564  */
1565         i8042_register_ports();
1566 
1567         return 0;
1568 
1569  out_fail:
1570         i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1571         i8042_free_irqs();
1572         i8042_controller_reset(false);
1573         i8042_platform_device = NULL;
1574 
1575         return error;
1576 }
1577 
1578 static int i8042_remove(struct platform_device *dev)
1579 {
1580         i8042_unregister_ports();
1581         i8042_free_irqs();
1582         i8042_controller_reset(false);
1583         i8042_platform_device = NULL;
1584 
1585         return 0;
1586 }
1587 
1588 static struct platform_driver i8042_driver = {
1589         .driver         = {
1590                 .name   = "i8042",
1591 #ifdef CONFIG_PM
1592                 .pm     = &i8042_pm_ops,
1593 #endif
1594         },
1595         .remove         = i8042_remove,
1596         .shutdown       = i8042_shutdown,
1597 };
1598 
1599 static struct notifier_block i8042_kbd_bind_notifier_block = {
1600         .notifier_call = i8042_kbd_bind_notifier,
1601 };
1602 
1603 static int __init i8042_init(void)
1604 {
1605         struct platform_device *pdev;
1606         int err;
1607 
1608         dbg_init();
1609 
1610         err = i8042_platform_init();
1611         if (err)
1612                 return err;
1613 
1614         err = i8042_controller_check();
1615         if (err)
1616                 goto err_platform_exit;
1617 
1618         pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1619         if (IS_ERR(pdev)) {
1620                 err = PTR_ERR(pdev);
1621                 goto err_platform_exit;
1622         }
1623 
1624         bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1625         panic_blink = i8042_panic_blink;
1626 
1627         return 0;
1628 
1629  err_platform_exit:
1630         i8042_platform_exit();
1631         return err;
1632 }
1633 
1634 static void __exit i8042_exit(void)
1635 {
1636         platform_device_unregister(i8042_platform_device);
1637         platform_driver_unregister(&i8042_driver);
1638         i8042_platform_exit();
1639 
1640         bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1641         panic_blink = NULL;
1642 }
1643 
1644 module_init(i8042_init);
1645 module_exit(i8042_exit);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/input/serio/i8042.c

DEFINITIONS
