root/drivers/crypto/qce/common.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
   4  */
   5 
   6 #ifndef _COMMON_H_
   7 #define _COMMON_H_
   8 
   9 #include <linux/crypto.h>
  10 #include <linux/types.h>
  11 #include <crypto/aes.h>
  12 #include <crypto/hash.h>
  13 
  14 /* key size in bytes */
  15 #define QCE_SHA_HMAC_KEY_SIZE           64
  16 #define QCE_MAX_CIPHER_KEY_SIZE         AES_KEYSIZE_256
  17 
  18 /* IV length in bytes */
  19 #define QCE_AES_IV_LENGTH               AES_BLOCK_SIZE
  20 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  21 #define QCE_MAX_IV_SIZE                 AES_BLOCK_SIZE
  22 
  23 /* maximum nonce bytes  */
  24 #define QCE_MAX_NONCE                   16
  25 #define QCE_MAX_NONCE_WORDS             (QCE_MAX_NONCE / sizeof(u32))
  26 
  27 /* burst size alignment requirement */
  28 #define QCE_MAX_ALIGN_SIZE              64
  29 
  30 /* cipher algorithms */
  31 #define QCE_ALG_DES                     BIT(0)
  32 #define QCE_ALG_3DES                    BIT(1)
  33 #define QCE_ALG_AES                     BIT(2)
  34 
  35 /* hash and hmac algorithms */
  36 #define QCE_HASH_SHA1                   BIT(3)
  37 #define QCE_HASH_SHA256                 BIT(4)
  38 #define QCE_HASH_SHA1_HMAC              BIT(5)
  39 #define QCE_HASH_SHA256_HMAC            BIT(6)
  40 #define QCE_HASH_AES_CMAC               BIT(7)
  41 
  42 /* cipher modes */
  43 #define QCE_MODE_CBC                    BIT(8)
  44 #define QCE_MODE_ECB                    BIT(9)
  45 #define QCE_MODE_CTR                    BIT(10)
  46 #define QCE_MODE_XTS                    BIT(11)
  47 #define QCE_MODE_CCM                    BIT(12)
  48 #define QCE_MODE_MASK                   GENMASK(12, 8)
  49 
  50 /* cipher encryption/decryption operations */
  51 #define QCE_ENCRYPT                     BIT(13)
  52 #define QCE_DECRYPT                     BIT(14)
  53 
  54 #define IS_DES(flags)                   (flags & QCE_ALG_DES)
  55 #define IS_3DES(flags)                  (flags & QCE_ALG_3DES)
  56 #define IS_AES(flags)                   (flags & QCE_ALG_AES)
  57 
  58 #define IS_SHA1(flags)                  (flags & QCE_HASH_SHA1)
  59 #define IS_SHA256(flags)                (flags & QCE_HASH_SHA256)
  60 #define IS_SHA1_HMAC(flags)             (flags & QCE_HASH_SHA1_HMAC)
  61 #define IS_SHA256_HMAC(flags)           (flags & QCE_HASH_SHA256_HMAC)
  62 #define IS_CMAC(flags)                  (flags & QCE_HASH_AES_CMAC)
  63 #define IS_SHA(flags)                   (IS_SHA1(flags) || IS_SHA256(flags))
  64 #define IS_SHA_HMAC(flags)              \
  65                 (IS_SHA1_HMAC(flags) || IS_SHA256_HMAC(flags))
  66 
  67 #define IS_CBC(mode)                    (mode & QCE_MODE_CBC)
  68 #define IS_ECB(mode)                    (mode & QCE_MODE_ECB)
  69 #define IS_CTR(mode)                    (mode & QCE_MODE_CTR)
  70 #define IS_XTS(mode)                    (mode & QCE_MODE_XTS)
  71 #define IS_CCM(mode)                    (mode & QCE_MODE_CCM)
  72 
  73 #define IS_ENCRYPT(dir)                 (dir & QCE_ENCRYPT)
  74 #define IS_DECRYPT(dir)                 (dir & QCE_DECRYPT)
  75 
  76 struct qce_alg_template {
  77         struct list_head entry;
  78         u32 crypto_alg_type;
  79         unsigned long alg_flags;
  80         const u32 *std_iv;
  81         union {
  82                 struct crypto_alg crypto;
  83                 struct ahash_alg ahash;
  84         } alg;
  85         struct qce_device *qce;
  86 };
  87 
  88 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
  89 int qce_check_status(struct qce_device *qce, u32 *status);
  90 void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
  91 int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
  92               u32 offset);
  93 
  94 #endif /* _COMMON_H_ */