root/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_hal.h

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INCLUDED FROM


   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2010 Broadcom Corporation
   4  */
   5 
   6 /*
   7  * phy_hal.h:  functionality exported from the phy to higher layers
   8  */
   9 
  10 #ifndef _BRCM_PHY_HAL_H_
  11 #define _BRCM_PHY_HAL_H_
  12 
  13 #include <brcmu_utils.h>
  14 #include <brcmu_wifi.h>
  15 #include <phy_shim.h>
  16 
  17 #define IDCODE_VER_MASK         0x0000000f
  18 #define IDCODE_VER_SHIFT        0
  19 #define IDCODE_MFG_MASK         0x00000fff
  20 #define IDCODE_MFG_SHIFT        0
  21 #define IDCODE_ID_MASK          0x0ffff000
  22 #define IDCODE_ID_SHIFT         12
  23 #define IDCODE_REV_MASK         0xf0000000
  24 #define IDCODE_REV_SHIFT        28
  25 
  26 #define NORADIO_ID              0xe4f5
  27 #define NORADIO_IDCODE          0x4e4f5246
  28 
  29 #define BCM2055_ID              0x2055
  30 #define BCM2055_IDCODE          0x02055000
  31 #define BCM2055A0_IDCODE        0x1205517f
  32 
  33 #define BCM2056_ID              0x2056
  34 #define BCM2056_IDCODE          0x02056000
  35 #define BCM2056A0_IDCODE        0x1205617f
  36 
  37 #define BCM2057_ID              0x2057
  38 #define BCM2057_IDCODE          0x02057000
  39 #define BCM2057A0_IDCODE        0x1205717f
  40 
  41 #define BCM2064_ID              0x2064
  42 #define BCM2064_IDCODE          0x02064000
  43 #define BCM2064A0_IDCODE        0x0206417f
  44 
  45 #define PHY_TPC_HW_OFF          false
  46 #define PHY_TPC_HW_ON           true
  47 
  48 #define PHY_PERICAL_DRIVERUP    1
  49 #define PHY_PERICAL_WATCHDOG    2
  50 #define PHY_PERICAL_PHYINIT     3
  51 #define PHY_PERICAL_JOIN_BSS    4
  52 #define PHY_PERICAL_START_IBSS  5
  53 #define PHY_PERICAL_UP_BSS      6
  54 #define PHY_PERICAL_CHAN        7
  55 #define PHY_FULLCAL     8
  56 
  57 #define PHY_PERICAL_DISABLE     0
  58 #define PHY_PERICAL_SPHASE      1
  59 #define PHY_PERICAL_MPHASE      2
  60 #define PHY_PERICAL_MANUAL      3
  61 
  62 #define PHY_HOLD_FOR_ASSOC      1
  63 #define PHY_HOLD_FOR_SCAN       2
  64 #define PHY_HOLD_FOR_RM         4
  65 #define PHY_HOLD_FOR_PLT        8
  66 #define PHY_HOLD_FOR_MUTE       16
  67 #define PHY_HOLD_FOR_NOT_ASSOC 0x20
  68 
  69 #define PHY_MUTE_FOR_PREISM     1
  70 #define PHY_MUTE_ALL            0xffffffff
  71 
  72 #define PHY_NOISE_FIXED_VAL             (-95)
  73 #define PHY_NOISE_FIXED_VAL_NPHY        (-92)
  74 #define PHY_NOISE_FIXED_VAL_LCNPHY      (-92)
  75 
  76 #define PHY_MODE_CAL            0x0002
  77 #define PHY_MODE_NOISEM         0x0004
  78 
  79 #define BRCMS_TXPWR_DB_FACTOR   4
  80 
  81 /* a large TX Power as an init value to factor out of min() calculations,
  82  * keep low enough to fit in an s8, units are .25 dBm
  83  */
  84 #define BRCMS_TXPWR_MAX         (127)   /* ~32 dBm = 1,500 mW */
  85 
  86 #define BRCMS_NUM_RATES_CCK           4
  87 #define BRCMS_NUM_RATES_OFDM          8
  88 #define BRCMS_NUM_RATES_MCS_1_STREAM  8
  89 #define BRCMS_NUM_RATES_MCS_2_STREAM  8
  90 #define BRCMS_NUM_RATES_MCS_3_STREAM  8
  91 #define BRCMS_NUM_RATES_MCS_4_STREAM  8
  92 
  93 #define BRCMS_RSSI_INVALID       0      /* invalid RSSI value */
  94 
  95 struct d11regs;
  96 struct phy_shim_info;
  97 
  98 struct txpwr_limits {
  99         u8 cck[BRCMS_NUM_RATES_CCK];
 100         u8 ofdm[BRCMS_NUM_RATES_OFDM];
 101 
 102         u8 ofdm_cdd[BRCMS_NUM_RATES_OFDM];
 103 
 104         u8 ofdm_40_siso[BRCMS_NUM_RATES_OFDM];
 105         u8 ofdm_40_cdd[BRCMS_NUM_RATES_OFDM];
 106 
 107         u8 mcs_20_siso[BRCMS_NUM_RATES_MCS_1_STREAM];
 108         u8 mcs_20_cdd[BRCMS_NUM_RATES_MCS_1_STREAM];
 109         u8 mcs_20_stbc[BRCMS_NUM_RATES_MCS_1_STREAM];
 110         u8 mcs_20_mimo[BRCMS_NUM_RATES_MCS_2_STREAM];
 111 
 112         u8 mcs_40_siso[BRCMS_NUM_RATES_MCS_1_STREAM];
 113         u8 mcs_40_cdd[BRCMS_NUM_RATES_MCS_1_STREAM];
 114         u8 mcs_40_stbc[BRCMS_NUM_RATES_MCS_1_STREAM];
 115         u8 mcs_40_mimo[BRCMS_NUM_RATES_MCS_2_STREAM];
 116         u8 mcs32;
 117 };
 118 
 119 struct tx_power {
 120         u32 flags;
 121         u16 chanspec;   /* txpwr report for this channel */
 122         u16 local_chanspec;     /* channel on which we are associated */
 123         u8 local_max;   /* local max according to the AP */
 124         u8 local_constraint;    /* local constraint according to the AP */
 125         s8 antgain[2];  /* Ant gain for each band - from SROM */
 126         u8 rf_cores;            /* count of RF Cores being reported */
 127         u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */
 128         u8 est_Pout_act[4];     /* Latest tx power out estimate per RF chain
 129                                  * without adjustment */
 130         u8 est_Pout_cck;        /* Latest CCK tx power out estimate */
 131         u8 tx_power_max[4];     /* Maximum target power among all rates */
 132         /* Index of the rate with the max target power */
 133         u8 tx_power_max_rate_ind[4];
 134         /* User limit */
 135         u8 user_limit[WL_TX_POWER_RATES];
 136         /* Regulatory power limit */
 137         u8 reg_limit[WL_TX_POWER_RATES];
 138         /* Max power board can support (SROM) */
 139         u8 board_limit[WL_TX_POWER_RATES];
 140         /* Latest target power */
 141         u8 target[WL_TX_POWER_RATES];
 142 };
 143 
 144 struct tx_inst_power {
 145         u8 txpwr_est_Pout[2];   /* Latest estimate for 2.4 and 5 Ghz */
 146         u8 txpwr_est_Pout_gofdm;        /* Pwr estimate for 2.4 OFDM */
 147 };
 148 
 149 struct brcms_chanvec {
 150         u8 vec[MAXCHANNEL / NBBY];
 151 };
 152 
 153 struct shared_phy_params {
 154         struct si_pub *sih;
 155         struct phy_shim_info *physhim;
 156         uint unit;
 157         uint corerev;
 158         u16 vid;
 159         u16 did;
 160         uint chip;
 161         uint chiprev;
 162         uint chippkg;
 163         uint sromrev;
 164         uint boardtype;
 165         uint boardrev;
 166         u32 boardflags;
 167         u32 boardflags2;
 168 };
 169 
 170 
 171 struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp);
 172 struct brcms_phy_pub *wlc_phy_attach(struct shared_phy *sh,
 173                                      struct bcma_device *d11core, int bandtype,
 174                                      struct wiphy *wiphy);
 175 void wlc_phy_detach(struct brcms_phy_pub *ppi);
 176 
 177 bool wlc_phy_get_phyversion(struct brcms_phy_pub *pih, u16 *phytype,
 178                             u16 *phyrev, u16 *radioid, u16 *radiover);
 179 bool wlc_phy_get_encore(struct brcms_phy_pub *pih);
 180 u32 wlc_phy_get_coreflags(struct brcms_phy_pub *pih);
 181 
 182 void wlc_phy_hw_clk_state_upd(struct brcms_phy_pub *ppi, bool newstate);
 183 void wlc_phy_hw_state_upd(struct brcms_phy_pub *ppi, bool newstate);
 184 void wlc_phy_init(struct brcms_phy_pub *ppi, u16 chanspec);
 185 void wlc_phy_watchdog(struct brcms_phy_pub *ppi);
 186 int wlc_phy_down(struct brcms_phy_pub *ppi);
 187 u32 wlc_phy_clk_bwbits(struct brcms_phy_pub *pih);
 188 void wlc_phy_cal_init(struct brcms_phy_pub *ppi);
 189 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init);
 190 
 191 void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, u16 chanspec);
 192 u16 wlc_phy_chanspec_get(struct brcms_phy_pub *ppi);
 193 void wlc_phy_chanspec_radio_set(struct brcms_phy_pub *ppi, u16 newch);
 194 u16 wlc_phy_bw_state_get(struct brcms_phy_pub *ppi);
 195 void wlc_phy_bw_state_set(struct brcms_phy_pub *ppi, u16 bw);
 196 
 197 int wlc_phy_rssi_compute(struct brcms_phy_pub *pih, struct d11rxhdr *rxh);
 198 void wlc_phy_por_inform(struct brcms_phy_pub *ppi);
 199 void wlc_phy_noise_sample_intr(struct brcms_phy_pub *ppi);
 200 bool wlc_phy_bist_check_phy(struct brcms_phy_pub *ppi);
 201 
 202 void wlc_phy_set_deaf(struct brcms_phy_pub *ppi, bool user_flag);
 203 
 204 void wlc_phy_switch_radio(struct brcms_phy_pub *ppi, bool on);
 205 void wlc_phy_anacore(struct brcms_phy_pub *ppi, bool on);
 206 
 207 
 208 void wlc_phy_BSSinit(struct brcms_phy_pub *ppi, bool bonlyap, int rssi);
 209 
 210 void wlc_phy_chanspec_ch14_widefilter_set(struct brcms_phy_pub *ppi,
 211                                           bool wide_filter);
 212 void wlc_phy_chanspec_band_validch(struct brcms_phy_pub *ppi, uint band,
 213                                    struct brcms_chanvec *channels);
 214 u16 wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi, uint band);
 215 
 216 void wlc_phy_txpower_sromlimit(struct brcms_phy_pub *ppi, uint chan, u8 *_min_,
 217                                u8 *_max_, int rate);
 218 void wlc_phy_txpower_sromlimit_max_get(struct brcms_phy_pub *ppi, uint chan,
 219                                        u8 *_max_, u8 *_min_);
 220 void wlc_phy_txpower_boardlimit_band(struct brcms_phy_pub *ppi, uint band,
 221                                      s32 *, s32 *, u32 *);
 222 void wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, struct txpwr_limits *,
 223                                u16 chanspec);
 224 int wlc_phy_txpower_get(struct brcms_phy_pub *ppi, uint *qdbm, bool *override);
 225 int wlc_phy_txpower_set(struct brcms_phy_pub *ppi, uint qdbm, bool override);
 226 void wlc_phy_txpower_target_set(struct brcms_phy_pub *ppi,
 227                                 struct txpwr_limits *);
 228 bool wlc_phy_txpower_hw_ctrl_get(struct brcms_phy_pub *ppi);
 229 void wlc_phy_txpower_hw_ctrl_set(struct brcms_phy_pub *ppi, bool hwpwrctrl);
 230 u8 wlc_phy_txpower_get_target_min(struct brcms_phy_pub *ppi);
 231 u8 wlc_phy_txpower_get_target_max(struct brcms_phy_pub *ppi);
 232 bool wlc_phy_txpower_ipa_ison(struct brcms_phy_pub *pih);
 233 
 234 void wlc_phy_stf_chain_init(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain);
 235 void wlc_phy_stf_chain_set(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain);
 236 void wlc_phy_stf_chain_get(struct brcms_phy_pub *pih, u8 *txchain, u8 *rxchain);
 237 u8 wlc_phy_stf_chain_active_get(struct brcms_phy_pub *pih);
 238 s8 wlc_phy_stf_ssmode_get(struct brcms_phy_pub *pih, u16 chanspec);
 239 void wlc_phy_ldpc_override_set(struct brcms_phy_pub *ppi, bool val);
 240 
 241 void wlc_phy_cal_perical(struct brcms_phy_pub *ppi, u8 reason);
 242 void wlc_phy_noise_sample_request_external(struct brcms_phy_pub *ppi);
 243 void wlc_phy_edcrs_lock(struct brcms_phy_pub *pih, bool lock);
 244 void wlc_phy_cal_papd_recal(struct brcms_phy_pub *ppi);
 245 
 246 void wlc_phy_ant_rxdiv_set(struct brcms_phy_pub *ppi, u8 val);
 247 void wlc_phy_clear_tssi(struct brcms_phy_pub *ppi);
 248 void wlc_phy_hold_upd(struct brcms_phy_pub *ppi, u32 id, bool val);
 249 void wlc_phy_mute_upd(struct brcms_phy_pub *ppi, bool val, u32 flags);
 250 
 251 void wlc_phy_antsel_type_set(struct brcms_phy_pub *ppi, u8 antsel_type);
 252 
 253 void wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi,
 254                                  struct tx_power *power, uint channel);
 255 
 256 void wlc_phy_initcal_enable(struct brcms_phy_pub *pih, bool initcal);
 257 bool wlc_phy_test_ison(struct brcms_phy_pub *ppi);
 258 void wlc_phy_txpwr_percent_set(struct brcms_phy_pub *ppi, u8 txpwr_percent);
 259 void wlc_phy_ofdm_rateset_war(struct brcms_phy_pub *pih, bool war);
 260 void wlc_phy_bf_preempt_enable(struct brcms_phy_pub *pih, bool bf_preempt);
 261 void wlc_phy_machwcap_set(struct brcms_phy_pub *ppi, u32 machwcap);
 262 
 263 void wlc_phy_runbist_config(struct brcms_phy_pub *ppi, bool start_end);
 264 
 265 void wlc_phy_freqtrack_start(struct brcms_phy_pub *ppi);
 266 void wlc_phy_freqtrack_end(struct brcms_phy_pub *ppi);
 267 
 268 const u8 *wlc_phy_get_ofdm_rate_lookup(void);
 269 
 270 s8 wlc_phy_get_tx_power_offset_by_mcs(struct brcms_phy_pub *ppi,
 271                                       u8 mcs_offset);
 272 s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset);
 273 #endif                          /* _BRCM_PHY_HAL_H_ */

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