root/drivers/net/wireless/intel/iwlwifi/iwl-scd.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. iwl_scd_txq_set_chain
  2. iwl_scd_txq_enable_agg
  3. iwl_scd_txq_disable_agg
  4. iwl_scd_disable_agg
  5. iwl_scd_activate_fifos
  6. iwl_scd_deactivate_fifos
  7. iwl_scd_enable_set_active
  8. SCD_QUEUE_WRPTR
  9. SCD_QUEUE_RDPTR
  10. SCD_QUEUE_STATUS_BITS
  11. iwl_scd_txq_set_inactive

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2014 Intel Mobile Communications GmbH
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * The full GNU General Public License is included in this distribution
  20  * in the file called COPYING.
  21  *
  22  * Contact Information:
  23  *  Intel Linux Wireless <linuxwifi@intel.com>
  24  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25  *
  26  * BSD LICENSE
  27  *
  28  * Copyright(c) 2014 Intel Mobile Communications GmbH
  29  * All rights reserved.
  30  *
  31  * Redistribution and use in source and binary forms, with or without
  32  * modification, are permitted provided that the following conditions
  33  * are met:
  34  *
  35  *  * Redistributions of source code must retain the above copyright
  36  *    notice, this list of conditions and the following disclaimer.
  37  *  * Redistributions in binary form must reproduce the above copyright
  38  *    notice, this list of conditions and the following disclaimer in
  39  *    the documentation and/or other materials provided with the
  40  *    distribution.
  41  *  * Neither the name Intel Corporation nor the names of its
  42  *    contributors may be used to endorse or promote products derived
  43  *    from this software without specific prior written permission.
  44  *
  45  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  46  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  47  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  48  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  49  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  50  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  51  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  55  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56  *
  57  *****************************************************************************/
  58 
  59 #ifndef __iwl_scd_h__
  60 #define __iwl_scd_h__
  61 
  62 #include "iwl-trans.h"
  63 #include "iwl-io.h"
  64 #include "iwl-prph.h"
  65 
  66 
  67 static inline void iwl_scd_txq_set_chain(struct iwl_trans *trans,
  68                                          u16 txq_id)
  69 {
  70         iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, BIT(txq_id));
  71 }
  72 
  73 static inline void iwl_scd_txq_enable_agg(struct iwl_trans *trans,
  74                                           u16 txq_id)
  75 {
  76         iwl_set_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));
  77 }
  78 
  79 static inline void iwl_scd_txq_disable_agg(struct iwl_trans *trans,
  80                                            u16 txq_id)
  81 {
  82         iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));
  83 }
  84 
  85 static inline void iwl_scd_disable_agg(struct iwl_trans *trans)
  86 {
  87         iwl_set_bits_prph(trans, SCD_AGGR_SEL, 0);
  88 }
  89 
  90 static inline void iwl_scd_activate_fifos(struct iwl_trans *trans)
  91 {
  92         iwl_write_prph(trans, SCD_TXFACT, IWL_MASK(0, 7));
  93 }
  94 
  95 static inline void iwl_scd_deactivate_fifos(struct iwl_trans *trans)
  96 {
  97         iwl_write_prph(trans, SCD_TXFACT, 0);
  98 }
  99 
 100 static inline void iwl_scd_enable_set_active(struct iwl_trans *trans,
 101                                              u32 value)
 102 {
 103         iwl_write_prph(trans, SCD_EN_CTRL, value);
 104 }
 105 
 106 static inline unsigned int SCD_QUEUE_WRPTR(unsigned int chnl)
 107 {
 108         if (chnl < 20)
 109                 return SCD_BASE + 0x18 + chnl * 4;
 110         WARN_ON_ONCE(chnl >= 32);
 111         return SCD_BASE + 0x284 + (chnl - 20) * 4;
 112 }
 113 
 114 static inline unsigned int SCD_QUEUE_RDPTR(unsigned int chnl)
 115 {
 116         if (chnl < 20)
 117                 return SCD_BASE + 0x68 + chnl * 4;
 118         WARN_ON_ONCE(chnl >= 32);
 119         return SCD_BASE + 0x2B4 + chnl * 4;
 120 }
 121 
 122 static inline unsigned int SCD_QUEUE_STATUS_BITS(unsigned int chnl)
 123 {
 124         if (chnl < 20)
 125                 return SCD_BASE + 0x10c + chnl * 4;
 126         WARN_ON_ONCE(chnl >= 32);
 127         return SCD_BASE + 0x334 + chnl * 4;
 128 }
 129 
 130 static inline void iwl_scd_txq_set_inactive(struct iwl_trans *trans,
 131                                             u16 txq_id)
 132 {
 133         iwl_write_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id),
 134                        (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
 135                        (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
 136 }
 137 
 138 #endif

/* [<][>][^][v][top][bottom][index][help] */