This source file includes following definitions.
- hns3_irq_handle
- hns3_nic_uninit_irq
- hns3_nic_init_irq
- hns3_mask_vector_irq
- hns3_vector_enable
- hns3_vector_disable
- hns3_set_vector_coalesce_rl
- hns3_set_vector_coalesce_rx_gl
- hns3_set_vector_coalesce_tx_gl
- hns3_vector_gl_rl_init
- hns3_vector_gl_rl_init_hw
- hns3_nic_set_real_num_queue
- hns3_get_max_available_channels
- hns3_tqp_enable
- hns3_tqp_disable
- hns3_free_rx_cpu_rmap
- hns3_set_rx_cpu_rmap
- hns3_nic_net_up
- hns3_config_xps
- hns3_nic_net_open
- hns3_reset_tx_queue
- hns3_nic_net_down
- hns3_nic_net_stop
- hns3_nic_uc_sync
- hns3_nic_uc_unsync
- hns3_nic_mc_sync
- hns3_nic_mc_unsync
- hns3_get_netdev_flags
- hns3_nic_set_rx_mode
- hns3_update_promisc_mode
- hns3_enable_vlan_filter
- hns3_set_tso
- hns3_get_l4_protocol
- hns3_tunnel_csum_bug
- hns3_set_outer_l2l3l4
- hns3_set_l2l3l4
- hns3_set_txbd_baseinfo
- hns3_handle_vtags
- hns3_fill_skb_desc
- hns3_fill_desc
- hns3_nic_bd_num
- hns3_gso_hdr_len
- hns3_skb_need_linearized
- hns3_nic_maybe_stop_tx
- hns3_clear_desc
- hns3_nic_net_xmit
- hns3_nic_net_set_mac_address
- hns3_nic_do_ioctl
- hns3_nic_set_features
- hns3_nic_get_stats64
- hns3_setup_tc
- hns3_nic_setup_tc
- hns3_vlan_rx_add_vid
- hns3_vlan_rx_kill_vid
- hns3_ndo_set_vf_vlan
- hns3_nic_change_mtu
- hns3_get_tx_timeo_queue_info
- hns3_nic_net_timeout
- hns3_rx_flow_steer
- hns3_is_phys_func
- hns3_disable_sriov
- hns3_get_dev_capability
- hns3_probe
- hns3_remove
- hns3_pci_sriov_configure
- hns3_shutdown
- hns3_error_detected
- hns3_slot_reset
- hns3_reset_prepare
- hns3_reset_done
- hns3_set_default_feature
- hns3_alloc_buffer
- hns3_free_buffer
- hns3_map_buffer
- hns3_unmap_buffer
- hns3_buffer_detach
- hns3_free_buffer_detach
- hns3_free_buffers
- hns3_free_desc
- hns3_alloc_desc
- hns3_reserve_buffer_map
- hns3_alloc_buffer_attach
- hns3_alloc_ring_buffers
- hns3_replace_buffer
- hns3_reuse_buffer
- hns3_nic_reclaim_desc
- is_valid_clean_head
- hns3_clean_tx_ring
- hns3_desc_unused
- hns3_nic_alloc_rx_buffers
- hns3_nic_reuse_page
- hns3_gro_complete
- hns3_rx_checksum
- hns3_rx_skb
- hns3_parse_vlan_tag
- hns3_alloc_skb
- hns3_add_frag
- hns3_set_gro_and_checksum
- hns3_set_rx_skb_rss_type
- hns3_handle_bdinfo
- hns3_handle_rx_bd
- hns3_clean_rx_ring
- hns3_get_new_flow_lvl
- hns3_get_new_int_gl
- hns3_update_new_int_gl
- hns3_nic_common_poll
- hns3_get_vector_ring_chain
- hns3_free_vector_ring_chain
- hns3_add_ring_to_group
- hns3_nic_set_cpumask
- hns3_nic_init_vector_data
- hns3_nic_alloc_vector_data
- hns3_clear_ring_group
- hns3_nic_uninit_vector_data
- hns3_nic_dealloc_vector_data
- hns3_ring_get_cfg
- hns3_queue_to_ring
- hns3_get_ring_config
- hns3_put_ring_config
- hns3_alloc_ring_memory
- hns3_fini_ring
- hns3_buf_size2type
- hns3_init_ring_hw
- hns3_init_tx_ring_tc
- hns3_init_all_ring
- hns3_uninit_all_ring
- hns3_init_mac_addr
- hns3_init_phy
- hns3_uninit_phy
- hns3_restore_fd_rules
- hns3_del_all_fd_rules
- hns3_client_start
- hns3_client_stop
- hns3_info_show
- hns3_client_init
- hns3_client_uninit
- hns3_link_status_change
- hns3_client_setup_tc
- hns3_recover_hw_addr
- hns3_remove_hw_addr
- hns3_clear_tx_ring
- hns3_clear_rx_ring
- hns3_force_clear_rx_ring
- hns3_clear_all_ring
- hns3_nic_reset_all_ring
- hns3_store_coal
- hns3_restore_coal
- hns3_reset_notify_down_enet
- hns3_reset_notify_up_enet
- hns3_reset_notify_init_enet
- hns3_reset_notify_restore_enet
- hns3_reset_notify_uninit_enet
- hns3_reset_notify
- hns3_change_channels
- hns3_set_channels
- hns3_process_hw_error
- hns3_init_module
- hns3_exit_module
1
2
3
4 #include <linux/dma-mapping.h>
5 #include <linux/etherdevice.h>
6 #include <linux/interrupt.h>
7 #ifdef CONFIG_RFS_ACCEL
8 #include <linux/cpu_rmap.h>
9 #endif
10 #include <linux/if_vlan.h>
11 #include <linux/ip.h>
12 #include <linux/ipv6.h>
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/aer.h>
16 #include <linux/skbuff.h>
17 #include <linux/sctp.h>
18 #include <linux/vermagic.h>
19 #include <net/gre.h>
20 #include <net/ip6_checksum.h>
21 #include <net/pkt_cls.h>
22 #include <net/tcp.h>
23 #include <net/vxlan.h>
24
25 #include "hnae3.h"
26 #include "hns3_enet.h"
27
28 #define hns3_set_field(origin, shift, val) ((origin) |= ((val) << (shift)))
29 #define hns3_tx_bd_count(S) DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
30
31 #define hns3_rl_err(fmt, ...) \
32 do { \
33 if (net_ratelimit()) \
34 netdev_err(fmt, ##__VA_ARGS__); \
35 } while (0)
36
37 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
38 static void hns3_remove_hw_addr(struct net_device *netdev);
39
40 static const char hns3_driver_name[] = "hns3";
41 const char hns3_driver_version[] = VERMAGIC_STRING;
42 static const char hns3_driver_string[] =
43 "Hisilicon Ethernet Network Driver for Hip08 Family";
44 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
45 static struct hnae3_client client;
46
47 static int debug = -1;
48 module_param(debug, int, 0);
49 MODULE_PARM_DESC(debug, " Network interface message level setting");
50
51 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
52 NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
53
54 #define HNS3_INNER_VLAN_TAG 1
55 #define HNS3_OUTER_VLAN_TAG 2
56
57 #define HNS3_MIN_TX_LEN 33U
58
59
60
61
62
63
64
65
66 static const struct pci_device_id hns3_pci_tbl[] = {
67 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
68 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
69 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
70 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
71 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
72 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
73 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
74 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
75 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
76 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
77 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
78 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
79 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
80 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
81 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
82
83 {0, }
84 };
85 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
86
87 static irqreturn_t hns3_irq_handle(int irq, void *vector)
88 {
89 struct hns3_enet_tqp_vector *tqp_vector = vector;
90
91 napi_schedule_irqoff(&tqp_vector->napi);
92
93 return IRQ_HANDLED;
94 }
95
96 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
97 {
98 struct hns3_enet_tqp_vector *tqp_vectors;
99 unsigned int i;
100
101 for (i = 0; i < priv->vector_num; i++) {
102 tqp_vectors = &priv->tqp_vector[i];
103
104 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
105 continue;
106
107
108 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
109
110
111 free_irq(tqp_vectors->vector_irq, tqp_vectors);
112 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
113 }
114 }
115
116 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
117 {
118 struct hns3_enet_tqp_vector *tqp_vectors;
119 int txrx_int_idx = 0;
120 int rx_int_idx = 0;
121 int tx_int_idx = 0;
122 unsigned int i;
123 int ret;
124
125 for (i = 0; i < priv->vector_num; i++) {
126 tqp_vectors = &priv->tqp_vector[i];
127
128 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
129 continue;
130
131 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
132 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
133 "%s-%s-%d", priv->netdev->name, "TxRx",
134 txrx_int_idx++);
135 txrx_int_idx++;
136 } else if (tqp_vectors->rx_group.ring) {
137 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
138 "%s-%s-%d", priv->netdev->name, "Rx",
139 rx_int_idx++);
140 } else if (tqp_vectors->tx_group.ring) {
141 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
142 "%s-%s-%d", priv->netdev->name, "Tx",
143 tx_int_idx++);
144 } else {
145
146 continue;
147 }
148
149 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
150
151 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
152 tqp_vectors->name, tqp_vectors);
153 if (ret) {
154 netdev_err(priv->netdev, "request irq(%d) fail\n",
155 tqp_vectors->vector_irq);
156 hns3_nic_uninit_irq(priv);
157 return ret;
158 }
159
160 irq_set_affinity_hint(tqp_vectors->vector_irq,
161 &tqp_vectors->affinity_mask);
162
163 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
164 }
165
166 return 0;
167 }
168
169 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
170 u32 mask_en)
171 {
172 writel(mask_en, tqp_vector->mask_addr);
173 }
174
175 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
176 {
177 napi_enable(&tqp_vector->napi);
178
179
180 hns3_mask_vector_irq(tqp_vector, 1);
181 }
182
183 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
184 {
185
186 hns3_mask_vector_irq(tqp_vector, 0);
187
188 disable_irq(tqp_vector->vector_irq);
189 napi_disable(&tqp_vector->napi);
190 }
191
192 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
193 u32 rl_value)
194 {
195 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
196
197
198
199
200
201
202 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
203 !tqp_vector->rx_group.coal.gl_adapt_enable)
204
205
206
207 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
208
209 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
210 }
211
212 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
213 u32 gl_value)
214 {
215 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
216
217 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
218 }
219
220 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
221 u32 gl_value)
222 {
223 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
224
225 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
226 }
227
228 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
229 struct hns3_nic_priv *priv)
230 {
231
232
233
234
235
236
237 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
238 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
239
240 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
241 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
242
243 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
244 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
245 }
246
247 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
248 struct hns3_nic_priv *priv)
249 {
250 struct hnae3_handle *h = priv->ae_handle;
251
252 hns3_set_vector_coalesce_tx_gl(tqp_vector,
253 tqp_vector->tx_group.coal.int_gl);
254 hns3_set_vector_coalesce_rx_gl(tqp_vector,
255 tqp_vector->rx_group.coal.int_gl);
256 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
257 }
258
259 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
260 {
261 struct hnae3_handle *h = hns3_get_handle(netdev);
262 struct hnae3_knic_private_info *kinfo = &h->kinfo;
263 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
264 int i, ret;
265
266 if (kinfo->num_tc <= 1) {
267 netdev_reset_tc(netdev);
268 } else {
269 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
270 if (ret) {
271 netdev_err(netdev,
272 "netdev_set_num_tc fail, ret=%d!\n", ret);
273 return ret;
274 }
275
276 for (i = 0; i < HNAE3_MAX_TC; i++) {
277 if (!kinfo->tc_info[i].enable)
278 continue;
279
280 netdev_set_tc_queue(netdev,
281 kinfo->tc_info[i].tc,
282 kinfo->tc_info[i].tqp_count,
283 kinfo->tc_info[i].tqp_offset);
284 }
285 }
286
287 ret = netif_set_real_num_tx_queues(netdev, queue_size);
288 if (ret) {
289 netdev_err(netdev,
290 "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
291 return ret;
292 }
293
294 ret = netif_set_real_num_rx_queues(netdev, queue_size);
295 if (ret) {
296 netdev_err(netdev,
297 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
298 return ret;
299 }
300
301 return 0;
302 }
303
304 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
305 {
306 u16 alloc_tqps, max_rss_size, rss_size;
307
308 h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
309 rss_size = alloc_tqps / h->kinfo.num_tc;
310
311 return min_t(u16, rss_size, max_rss_size);
312 }
313
314 static void hns3_tqp_enable(struct hnae3_queue *tqp)
315 {
316 u32 rcb_reg;
317
318 rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
319 rcb_reg |= BIT(HNS3_RING_EN_B);
320 hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
321 }
322
323 static void hns3_tqp_disable(struct hnae3_queue *tqp)
324 {
325 u32 rcb_reg;
326
327 rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
328 rcb_reg &= ~BIT(HNS3_RING_EN_B);
329 hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
330 }
331
332 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
333 {
334 #ifdef CONFIG_RFS_ACCEL
335 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
336 netdev->rx_cpu_rmap = NULL;
337 #endif
338 }
339
340 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
341 {
342 #ifdef CONFIG_RFS_ACCEL
343 struct hns3_nic_priv *priv = netdev_priv(netdev);
344 struct hns3_enet_tqp_vector *tqp_vector;
345 int i, ret;
346
347 if (!netdev->rx_cpu_rmap) {
348 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
349 if (!netdev->rx_cpu_rmap)
350 return -ENOMEM;
351 }
352
353 for (i = 0; i < priv->vector_num; i++) {
354 tqp_vector = &priv->tqp_vector[i];
355 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
356 tqp_vector->vector_irq);
357 if (ret) {
358 hns3_free_rx_cpu_rmap(netdev);
359 return ret;
360 }
361 }
362 #endif
363 return 0;
364 }
365
366 static int hns3_nic_net_up(struct net_device *netdev)
367 {
368 struct hns3_nic_priv *priv = netdev_priv(netdev);
369 struct hnae3_handle *h = priv->ae_handle;
370 int i, j;
371 int ret;
372
373 ret = hns3_nic_reset_all_ring(h);
374 if (ret)
375 return ret;
376
377
378 ret = hns3_set_rx_cpu_rmap(netdev);
379 if (ret)
380 netdev_warn(netdev, "set rx cpu rmap fail, ret=%d!\n", ret);
381
382
383 ret = hns3_nic_init_irq(priv);
384 if (ret) {
385 netdev_err(netdev, "init irq failed! ret=%d\n", ret);
386 goto free_rmap;
387 }
388
389 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
390
391
392 for (i = 0; i < priv->vector_num; i++)
393 hns3_vector_enable(&priv->tqp_vector[i]);
394
395
396 for (j = 0; j < h->kinfo.num_tqps; j++)
397 hns3_tqp_enable(h->kinfo.tqp[j]);
398
399
400 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
401 if (ret)
402 goto out_start_err;
403
404 return 0;
405
406 out_start_err:
407 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
408 while (j--)
409 hns3_tqp_disable(h->kinfo.tqp[j]);
410
411 for (j = i - 1; j >= 0; j--)
412 hns3_vector_disable(&priv->tqp_vector[j]);
413
414 hns3_nic_uninit_irq(priv);
415 free_rmap:
416 hns3_free_rx_cpu_rmap(netdev);
417 return ret;
418 }
419
420 static void hns3_config_xps(struct hns3_nic_priv *priv)
421 {
422 int i;
423
424 for (i = 0; i < priv->vector_num; i++) {
425 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
426 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
427
428 while (ring) {
429 int ret;
430
431 ret = netif_set_xps_queue(priv->netdev,
432 &tqp_vector->affinity_mask,
433 ring->tqp->tqp_index);
434 if (ret)
435 netdev_warn(priv->netdev,
436 "set xps queue failed: %d", ret);
437
438 ring = ring->next;
439 }
440 }
441 }
442
443 static int hns3_nic_net_open(struct net_device *netdev)
444 {
445 struct hns3_nic_priv *priv = netdev_priv(netdev);
446 struct hnae3_handle *h = hns3_get_handle(netdev);
447 struct hnae3_knic_private_info *kinfo;
448 int i, ret;
449
450 if (hns3_nic_resetting(netdev))
451 return -EBUSY;
452
453 netif_carrier_off(netdev);
454
455 ret = hns3_nic_set_real_num_queue(netdev);
456 if (ret)
457 return ret;
458
459 ret = hns3_nic_net_up(netdev);
460 if (ret) {
461 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
462 return ret;
463 }
464
465 kinfo = &h->kinfo;
466 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
467 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
468
469 if (h->ae_algo->ops->set_timer_task)
470 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
471
472 hns3_config_xps(priv);
473
474 netif_dbg(h, drv, netdev, "net open\n");
475
476 return 0;
477 }
478
479 static void hns3_reset_tx_queue(struct hnae3_handle *h)
480 {
481 struct net_device *ndev = h->kinfo.netdev;
482 struct hns3_nic_priv *priv = netdev_priv(ndev);
483 struct netdev_queue *dev_queue;
484 u32 i;
485
486 for (i = 0; i < h->kinfo.num_tqps; i++) {
487 dev_queue = netdev_get_tx_queue(ndev,
488 priv->ring_data[i].queue_index);
489 netdev_tx_reset_queue(dev_queue);
490 }
491 }
492
493 static void hns3_nic_net_down(struct net_device *netdev)
494 {
495 struct hns3_nic_priv *priv = netdev_priv(netdev);
496 struct hnae3_handle *h = hns3_get_handle(netdev);
497 const struct hnae3_ae_ops *ops;
498 int i;
499
500
501 for (i = 0; i < priv->vector_num; i++)
502 hns3_vector_disable(&priv->tqp_vector[i]);
503
504
505 for (i = 0; i < h->kinfo.num_tqps; i++)
506 hns3_tqp_disable(h->kinfo.tqp[i]);
507
508
509 ops = priv->ae_handle->ae_algo->ops;
510 if (ops->stop)
511 ops->stop(priv->ae_handle);
512
513 hns3_free_rx_cpu_rmap(netdev);
514
515
516 hns3_nic_uninit_irq(priv);
517
518
519
520
521
522 if (!hns3_nic_resetting(netdev))
523 hns3_clear_all_ring(priv->ae_handle, false);
524
525 hns3_reset_tx_queue(priv->ae_handle);
526 }
527
528 static int hns3_nic_net_stop(struct net_device *netdev)
529 {
530 struct hns3_nic_priv *priv = netdev_priv(netdev);
531 struct hnae3_handle *h = hns3_get_handle(netdev);
532
533 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
534 return 0;
535
536 netif_dbg(h, drv, netdev, "net stop\n");
537
538 if (h->ae_algo->ops->set_timer_task)
539 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
540
541 netif_tx_stop_all_queues(netdev);
542 netif_carrier_off(netdev);
543
544 hns3_nic_net_down(netdev);
545
546 return 0;
547 }
548
549 static int hns3_nic_uc_sync(struct net_device *netdev,
550 const unsigned char *addr)
551 {
552 struct hnae3_handle *h = hns3_get_handle(netdev);
553
554 if (h->ae_algo->ops->add_uc_addr)
555 return h->ae_algo->ops->add_uc_addr(h, addr);
556
557 return 0;
558 }
559
560 static int hns3_nic_uc_unsync(struct net_device *netdev,
561 const unsigned char *addr)
562 {
563 struct hnae3_handle *h = hns3_get_handle(netdev);
564
565 if (h->ae_algo->ops->rm_uc_addr)
566 return h->ae_algo->ops->rm_uc_addr(h, addr);
567
568 return 0;
569 }
570
571 static int hns3_nic_mc_sync(struct net_device *netdev,
572 const unsigned char *addr)
573 {
574 struct hnae3_handle *h = hns3_get_handle(netdev);
575
576 if (h->ae_algo->ops->add_mc_addr)
577 return h->ae_algo->ops->add_mc_addr(h, addr);
578
579 return 0;
580 }
581
582 static int hns3_nic_mc_unsync(struct net_device *netdev,
583 const unsigned char *addr)
584 {
585 struct hnae3_handle *h = hns3_get_handle(netdev);
586
587 if (h->ae_algo->ops->rm_mc_addr)
588 return h->ae_algo->ops->rm_mc_addr(h, addr);
589
590 return 0;
591 }
592
593 static u8 hns3_get_netdev_flags(struct net_device *netdev)
594 {
595 u8 flags = 0;
596
597 if (netdev->flags & IFF_PROMISC) {
598 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
599 } else {
600 flags |= HNAE3_VLAN_FLTR;
601 if (netdev->flags & IFF_ALLMULTI)
602 flags |= HNAE3_USER_MPE;
603 }
604
605 return flags;
606 }
607
608 static void hns3_nic_set_rx_mode(struct net_device *netdev)
609 {
610 struct hnae3_handle *h = hns3_get_handle(netdev);
611 u8 new_flags;
612 int ret;
613
614 new_flags = hns3_get_netdev_flags(netdev);
615
616 ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
617 if (ret) {
618 netdev_err(netdev, "sync uc address fail\n");
619 if (ret == -ENOSPC)
620 new_flags |= HNAE3_OVERFLOW_UPE;
621 }
622
623 if (netdev->flags & IFF_MULTICAST) {
624 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
625 hns3_nic_mc_unsync);
626 if (ret) {
627 netdev_err(netdev, "sync mc address fail\n");
628 if (ret == -ENOSPC)
629 new_flags |= HNAE3_OVERFLOW_MPE;
630 }
631 }
632
633
634
635
636
637 hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
638 h->netdev_flags = new_flags;
639 hns3_update_promisc_mode(netdev, new_flags);
640 }
641
642 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
643 {
644 struct hns3_nic_priv *priv = netdev_priv(netdev);
645 struct hnae3_handle *h = priv->ae_handle;
646
647 if (h->ae_algo->ops->set_promisc_mode) {
648 return h->ae_algo->ops->set_promisc_mode(h,
649 promisc_flags & HNAE3_UPE,
650 promisc_flags & HNAE3_MPE);
651 }
652
653 return 0;
654 }
655
656 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
657 {
658 struct hns3_nic_priv *priv = netdev_priv(netdev);
659 struct hnae3_handle *h = priv->ae_handle;
660 bool last_state;
661
662 if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
663 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
664 if (enable != last_state) {
665 netdev_info(netdev,
666 "%s vlan filter\n",
667 enable ? "enable" : "disable");
668 h->ae_algo->ops->enable_vlan_filter(h, enable);
669 }
670 }
671 }
672
673 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
674 u16 *mss, u32 *type_cs_vlan_tso)
675 {
676 u32 l4_offset, hdr_len;
677 union l3_hdr_info l3;
678 union l4_hdr_info l4;
679 u32 l4_paylen;
680 int ret;
681
682 if (!skb_is_gso(skb))
683 return 0;
684
685 ret = skb_cow_head(skb, 0);
686 if (unlikely(ret))
687 return ret;
688
689 l3.hdr = skb_network_header(skb);
690 l4.hdr = skb_transport_header(skb);
691
692
693
694
695 if (l3.v4->version == 4)
696 l3.v4->check = 0;
697
698
699 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
700 SKB_GSO_GRE_CSUM |
701 SKB_GSO_UDP_TUNNEL |
702 SKB_GSO_UDP_TUNNEL_CSUM)) {
703 if ((!(skb_shinfo(skb)->gso_type &
704 SKB_GSO_PARTIAL)) &&
705 (skb_shinfo(skb)->gso_type &
706 SKB_GSO_UDP_TUNNEL_CSUM)) {
707
708
709
710 l4.udp->check = 0;
711 }
712
713 l3.hdr = skb_inner_network_header(skb);
714 l4.hdr = skb_inner_transport_header(skb);
715
716
717
718
719 if (l3.v4->version == 4)
720 l3.v4->check = 0;
721 }
722
723
724 l4_offset = l4.hdr - skb->data;
725 hdr_len = (l4.tcp->doff << 2) + l4_offset;
726
727
728 l4_paylen = skb->len - l4_offset;
729 csum_replace_by_diff(&l4.tcp->check,
730 (__force __wsum)htonl(l4_paylen));
731
732
733 *paylen = skb->len - hdr_len;
734 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
735
736
737 *mss = skb_shinfo(skb)->gso_size;
738
739 return 0;
740 }
741
742 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
743 u8 *il4_proto)
744 {
745 union l3_hdr_info l3;
746 unsigned char *l4_hdr;
747 unsigned char *exthdr;
748 u8 l4_proto_tmp;
749 __be16 frag_off;
750
751
752 l3.hdr = skb_network_header(skb);
753 l4_hdr = skb_transport_header(skb);
754
755 if (skb->protocol == htons(ETH_P_IPV6)) {
756 exthdr = l3.hdr + sizeof(*l3.v6);
757 l4_proto_tmp = l3.v6->nexthdr;
758 if (l4_hdr != exthdr)
759 ipv6_skip_exthdr(skb, exthdr - skb->data,
760 &l4_proto_tmp, &frag_off);
761 } else if (skb->protocol == htons(ETH_P_IP)) {
762 l4_proto_tmp = l3.v4->protocol;
763 } else {
764 return -EINVAL;
765 }
766
767 *ol4_proto = l4_proto_tmp;
768
769
770 if (!skb->encapsulation) {
771 *il4_proto = 0;
772 return 0;
773 }
774
775
776 l3.hdr = skb_inner_network_header(skb);
777 l4_hdr = skb_inner_transport_header(skb);
778
779 if (l3.v6->version == 6) {
780 exthdr = l3.hdr + sizeof(*l3.v6);
781 l4_proto_tmp = l3.v6->nexthdr;
782 if (l4_hdr != exthdr)
783 ipv6_skip_exthdr(skb, exthdr - skb->data,
784 &l4_proto_tmp, &frag_off);
785 } else if (l3.v4->version == 4) {
786 l4_proto_tmp = l3.v4->protocol;
787 }
788
789 *il4_proto = l4_proto_tmp;
790
791 return 0;
792 }
793
794
795
796
797
798
799
800 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
801 {
802 union l4_hdr_info l4;
803
804 l4.hdr = skb_transport_header(skb);
805
806 if (!(!skb->encapsulation &&
807 l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
808 return false;
809
810 skb_checksum_help(skb);
811
812 return true;
813 }
814
815 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
816 u32 *ol_type_vlan_len_msec)
817 {
818 u32 l2_len, l3_len, l4_len;
819 unsigned char *il2_hdr;
820 union l3_hdr_info l3;
821 union l4_hdr_info l4;
822
823 l3.hdr = skb_network_header(skb);
824 l4.hdr = skb_transport_header(skb);
825
826
827 l2_len = l3.hdr - skb->data;
828 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
829
830
831 l3_len = l4.hdr - l3.hdr;
832 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
833
834 il2_hdr = skb_inner_mac_header(skb);
835
836 l4_len = il2_hdr - l4.hdr;
837 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
838
839
840 if (skb->protocol == htons(ETH_P_IP)) {
841 if (skb_is_gso(skb))
842 hns3_set_field(*ol_type_vlan_len_msec,
843 HNS3_TXD_OL3T_S,
844 HNS3_OL3T_IPV4_CSUM);
845 else
846 hns3_set_field(*ol_type_vlan_len_msec,
847 HNS3_TXD_OL3T_S,
848 HNS3_OL3T_IPV4_NO_CSUM);
849
850 } else if (skb->protocol == htons(ETH_P_IPV6)) {
851 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
852 HNS3_OL3T_IPV6);
853 }
854
855 if (ol4_proto == IPPROTO_UDP)
856 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
857 HNS3_TUN_MAC_IN_UDP);
858 else if (ol4_proto == IPPROTO_GRE)
859 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
860 HNS3_TUN_NVGRE);
861 }
862
863 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
864 u8 il4_proto, u32 *type_cs_vlan_tso,
865 u32 *ol_type_vlan_len_msec)
866 {
867 unsigned char *l2_hdr = skb->data;
868 u32 l4_proto = ol4_proto;
869 union l4_hdr_info l4;
870 union l3_hdr_info l3;
871 u32 l2_len, l3_len;
872
873 l4.hdr = skb_transport_header(skb);
874 l3.hdr = skb_network_header(skb);
875
876
877 if (skb->encapsulation) {
878
879 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
880
881
882
883 if (skb_is_gso(skb))
884 return -EDOM;
885
886
887
888
889 skb_checksum_help(skb);
890 return 0;
891 }
892
893 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
894
895
896 l2_hdr = skb_inner_mac_header(skb);
897 l3.hdr = skb_inner_network_header(skb);
898 l4.hdr = skb_inner_transport_header(skb);
899 l4_proto = il4_proto;
900 }
901
902 if (l3.v4->version == 4) {
903 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
904 HNS3_L3T_IPV4);
905
906
907
908
909 if (skb_is_gso(skb))
910 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
911 } else if (l3.v6->version == 6) {
912 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
913 HNS3_L3T_IPV6);
914 }
915
916
917 l2_len = l3.hdr - l2_hdr;
918 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
919
920
921 l3_len = l4.hdr - l3.hdr;
922 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
923
924
925 switch (l4_proto) {
926 case IPPROTO_TCP:
927 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
928 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
929 HNS3_L4T_TCP);
930 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
931 l4.tcp->doff);
932 break;
933 case IPPROTO_UDP:
934 if (hns3_tunnel_csum_bug(skb))
935 break;
936
937 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
938 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
939 HNS3_L4T_UDP);
940 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
941 (sizeof(struct udphdr) >> 2));
942 break;
943 case IPPROTO_SCTP:
944 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
945 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
946 HNS3_L4T_SCTP);
947 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
948 (sizeof(struct sctphdr) >> 2));
949 break;
950 default:
951
952
953
954 if (skb_is_gso(skb))
955 return -EDOM;
956
957
958
959
960 skb_checksum_help(skb);
961 return 0;
962 }
963
964 return 0;
965 }
966
967 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
968 {
969
970 if (!!frag_end)
971 hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, 1U);
972 hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1U);
973 }
974
975 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
976 struct sk_buff *skb)
977 {
978 struct hnae3_handle *handle = tx_ring->tqp->handle;
979 struct vlan_ethhdr *vhdr;
980 int rc;
981
982 if (!(skb->protocol == htons(ETH_P_8021Q) ||
983 skb_vlan_tag_present(skb)))
984 return 0;
985
986
987
988
989 if (unlikely(skb_vlan_tagged_multi(skb) &&
990 handle->port_base_vlan_state ==
991 HNAE3_PORT_BASE_VLAN_ENABLE))
992 return -EINVAL;
993
994 if (skb->protocol == htons(ETH_P_8021Q) &&
995 !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
996
997
998
999
1000 skb->protocol = vlan_get_protocol(skb);
1001 return 0;
1002 }
1003
1004 if (skb_vlan_tag_present(skb)) {
1005
1006
1007
1008 if (skb->protocol == htons(ETH_P_8021Q) &&
1009 handle->port_base_vlan_state ==
1010 HNAE3_PORT_BASE_VLAN_DISABLE)
1011 rc = HNS3_OUTER_VLAN_TAG;
1012 else
1013 rc = HNS3_INNER_VLAN_TAG;
1014
1015 skb->protocol = vlan_get_protocol(skb);
1016 return rc;
1017 }
1018
1019 rc = skb_cow_head(skb, 0);
1020 if (unlikely(rc < 0))
1021 return rc;
1022
1023 vhdr = (struct vlan_ethhdr *)skb->data;
1024 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1025 & VLAN_PRIO_MASK);
1026
1027 skb->protocol = vlan_get_protocol(skb);
1028 return 0;
1029 }
1030
1031 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1032 struct sk_buff *skb, struct hns3_desc *desc)
1033 {
1034 u32 ol_type_vlan_len_msec = 0;
1035 u32 type_cs_vlan_tso = 0;
1036 u32 paylen = skb->len;
1037 u16 inner_vtag = 0;
1038 u16 out_vtag = 0;
1039 u16 mss = 0;
1040 int ret;
1041
1042 ret = hns3_handle_vtags(ring, skb);
1043 if (unlikely(ret < 0)) {
1044 u64_stats_update_begin(&ring->syncp);
1045 ring->stats.tx_vlan_err++;
1046 u64_stats_update_end(&ring->syncp);
1047 return ret;
1048 } else if (ret == HNS3_INNER_VLAN_TAG) {
1049 inner_vtag = skb_vlan_tag_get(skb);
1050 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1051 VLAN_PRIO_MASK;
1052 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1053 } else if (ret == HNS3_OUTER_VLAN_TAG) {
1054 out_vtag = skb_vlan_tag_get(skb);
1055 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1056 VLAN_PRIO_MASK;
1057 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1058 1);
1059 }
1060
1061 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1062 u8 ol4_proto, il4_proto;
1063
1064 skb_reset_mac_len(skb);
1065
1066 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1067 if (unlikely(ret)) {
1068 u64_stats_update_begin(&ring->syncp);
1069 ring->stats.tx_l4_proto_err++;
1070 u64_stats_update_end(&ring->syncp);
1071 return ret;
1072 }
1073
1074 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1075 &type_cs_vlan_tso,
1076 &ol_type_vlan_len_msec);
1077 if (unlikely(ret)) {
1078 u64_stats_update_begin(&ring->syncp);
1079 ring->stats.tx_l2l3l4_err++;
1080 u64_stats_update_end(&ring->syncp);
1081 return ret;
1082 }
1083
1084 ret = hns3_set_tso(skb, &paylen, &mss,
1085 &type_cs_vlan_tso);
1086 if (unlikely(ret)) {
1087 u64_stats_update_begin(&ring->syncp);
1088 ring->stats.tx_tso_err++;
1089 u64_stats_update_end(&ring->syncp);
1090 return ret;
1091 }
1092 }
1093
1094
1095 desc->tx.ol_type_vlan_len_msec =
1096 cpu_to_le32(ol_type_vlan_len_msec);
1097 desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1098 desc->tx.paylen = cpu_to_le32(paylen);
1099 desc->tx.mss = cpu_to_le16(mss);
1100 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1101 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1102
1103 return 0;
1104 }
1105
1106 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1107 unsigned int size, int frag_end,
1108 enum hns_desc_type type)
1109 {
1110 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1111 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1112 struct device *dev = ring_to_dev(ring);
1113 skb_frag_t *frag;
1114 unsigned int frag_buf_num;
1115 int k, sizeoflast;
1116 dma_addr_t dma;
1117
1118 if (type == DESC_TYPE_SKB) {
1119 struct sk_buff *skb = (struct sk_buff *)priv;
1120 int ret;
1121
1122 ret = hns3_fill_skb_desc(ring, skb, desc);
1123 if (unlikely(ret))
1124 return ret;
1125
1126 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1127 } else {
1128 frag = (skb_frag_t *)priv;
1129 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1130 }
1131
1132 if (unlikely(dma_mapping_error(dev, dma))) {
1133 u64_stats_update_begin(&ring->syncp);
1134 ring->stats.sw_err_cnt++;
1135 u64_stats_update_end(&ring->syncp);
1136 return -ENOMEM;
1137 }
1138
1139 desc_cb->length = size;
1140
1141 if (likely(size <= HNS3_MAX_BD_SIZE)) {
1142 u16 bdtp_fe_sc_vld_ra_ri = 0;
1143
1144 desc_cb->priv = priv;
1145 desc_cb->dma = dma;
1146 desc_cb->type = type;
1147 desc->addr = cpu_to_le64(dma);
1148 desc->tx.send_size = cpu_to_le16(size);
1149 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1150 desc->tx.bdtp_fe_sc_vld_ra_ri =
1151 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1152
1153 ring_ptr_move_fw(ring, next_to_use);
1154 return 0;
1155 }
1156
1157 frag_buf_num = hns3_tx_bd_count(size);
1158 sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1159 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1160
1161
1162 for (k = 0; k < frag_buf_num; k++) {
1163 u16 bdtp_fe_sc_vld_ra_ri = 0;
1164
1165
1166 desc_cb->priv = priv;
1167 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1168 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1169 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1170
1171
1172 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1173 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1174 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1175 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1176 frag_end && (k == frag_buf_num - 1) ?
1177 1 : 0);
1178 desc->tx.bdtp_fe_sc_vld_ra_ri =
1179 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1180
1181
1182 ring_ptr_move_fw(ring, next_to_use);
1183
1184 desc_cb = &ring->desc_cb[ring->next_to_use];
1185 desc = &ring->desc[ring->next_to_use];
1186 }
1187
1188 return 0;
1189 }
1190
1191 static unsigned int hns3_nic_bd_num(struct sk_buff *skb)
1192 {
1193 unsigned int bd_num;
1194 int i;
1195
1196
1197 if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1198 return skb_shinfo(skb)->nr_frags + 1;
1199
1200 bd_num = hns3_tx_bd_count(skb_headlen(skb));
1201
1202 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1203 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1204 bd_num += hns3_tx_bd_count(skb_frag_size(frag));
1205 }
1206
1207 return bd_num;
1208 }
1209
1210 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1211 {
1212 if (!skb->encapsulation)
1213 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1214
1215 return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1216 }
1217
1218
1219
1220
1221
1222
1223 static bool hns3_skb_need_linearized(struct sk_buff *skb)
1224 {
1225 int bd_limit = HNS3_MAX_BD_NUM_NORMAL - 1;
1226 unsigned int tot_len = 0;
1227 int i;
1228
1229 for (i = 0; i < bd_limit; i++)
1230 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i]);
1231
1232
1233
1234
1235 if (((tot_len + skb_headlen(skb)) < (skb_shinfo(skb)->gso_size +
1236 hns3_gso_hdr_len(skb))) || (tot_len < skb_shinfo(skb)->gso_size))
1237 return true;
1238
1239
1240 for (i = 0; i < (skb_shinfo(skb)->nr_frags - bd_limit - 1); i++) {
1241 tot_len -= skb_frag_size(&skb_shinfo(skb)->frags[i]);
1242 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i + bd_limit]);
1243
1244 if (tot_len < skb_shinfo(skb)->gso_size)
1245 return true;
1246 }
1247
1248 return false;
1249 }
1250
1251 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1252 struct sk_buff **out_skb)
1253 {
1254 struct sk_buff *skb = *out_skb;
1255 unsigned int bd_num;
1256
1257 bd_num = hns3_nic_bd_num(skb);
1258 if (unlikely(bd_num > HNS3_MAX_BD_NUM_NORMAL)) {
1259 struct sk_buff *new_skb;
1260
1261 if (skb_is_gso(skb) && bd_num <= HNS3_MAX_BD_NUM_TSO &&
1262 !hns3_skb_need_linearized(skb))
1263 goto out;
1264
1265
1266 new_skb = skb_copy(skb, GFP_ATOMIC);
1267 if (!new_skb)
1268 return -ENOMEM;
1269 dev_kfree_skb_any(skb);
1270 *out_skb = new_skb;
1271
1272 bd_num = hns3_nic_bd_num(new_skb);
1273 if ((skb_is_gso(new_skb) && bd_num > HNS3_MAX_BD_NUM_TSO) ||
1274 (!skb_is_gso(new_skb) && bd_num > HNS3_MAX_BD_NUM_NORMAL))
1275 return -ENOMEM;
1276
1277 u64_stats_update_begin(&ring->syncp);
1278 ring->stats.tx_copy++;
1279 u64_stats_update_end(&ring->syncp);
1280 }
1281
1282 out:
1283 if (unlikely(ring_space(ring) < bd_num))
1284 return -EBUSY;
1285
1286 return bd_num;
1287 }
1288
1289 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1290 {
1291 struct device *dev = ring_to_dev(ring);
1292 unsigned int i;
1293
1294 for (i = 0; i < ring->desc_num; i++) {
1295
1296 if (ring->next_to_use == next_to_use_orig)
1297 break;
1298
1299
1300 ring_ptr_move_bw(ring, next_to_use);
1301
1302
1303 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1304 dma_unmap_single(dev,
1305 ring->desc_cb[ring->next_to_use].dma,
1306 ring->desc_cb[ring->next_to_use].length,
1307 DMA_TO_DEVICE);
1308 else if (ring->desc_cb[ring->next_to_use].length)
1309 dma_unmap_page(dev,
1310 ring->desc_cb[ring->next_to_use].dma,
1311 ring->desc_cb[ring->next_to_use].length,
1312 DMA_TO_DEVICE);
1313
1314 ring->desc_cb[ring->next_to_use].length = 0;
1315 ring->desc_cb[ring->next_to_use].dma = 0;
1316 }
1317 }
1318
1319 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1320 {
1321 struct hns3_nic_priv *priv = netdev_priv(netdev);
1322 struct hns3_nic_ring_data *ring_data =
1323 &tx_ring_data(priv, skb->queue_mapping);
1324 struct hns3_enet_ring *ring = ring_data->ring;
1325 struct netdev_queue *dev_queue;
1326 skb_frag_t *frag;
1327 int next_to_use_head;
1328 int buf_num;
1329 int seg_num;
1330 int size;
1331 int ret;
1332 int i;
1333
1334
1335 if (skb_put_padto(skb, HNS3_MIN_TX_LEN))
1336 return NETDEV_TX_OK;
1337
1338
1339 prefetch(skb->data);
1340
1341 buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1342 if (unlikely(buf_num <= 0)) {
1343 if (buf_num == -EBUSY) {
1344 u64_stats_update_begin(&ring->syncp);
1345 ring->stats.tx_busy++;
1346 u64_stats_update_end(&ring->syncp);
1347 goto out_net_tx_busy;
1348 } else if (buf_num == -ENOMEM) {
1349 u64_stats_update_begin(&ring->syncp);
1350 ring->stats.sw_err_cnt++;
1351 u64_stats_update_end(&ring->syncp);
1352 }
1353
1354 hns3_rl_err(netdev, "xmit error: %d!\n", buf_num);
1355 goto out_err_tx_ok;
1356 }
1357
1358
1359 seg_num = skb_shinfo(skb)->nr_frags + 1;
1360
1361 size = skb_headlen(skb);
1362
1363 next_to_use_head = ring->next_to_use;
1364
1365 ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1366 DESC_TYPE_SKB);
1367 if (unlikely(ret))
1368 goto fill_err;
1369
1370
1371 for (i = 1; i < seg_num; i++) {
1372 frag = &skb_shinfo(skb)->frags[i - 1];
1373 size = skb_frag_size(frag);
1374
1375 ret = hns3_fill_desc(ring, frag, size,
1376 seg_num - 1 == i ? 1 : 0,
1377 DESC_TYPE_PAGE);
1378
1379 if (unlikely(ret))
1380 goto fill_err;
1381 }
1382
1383
1384 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1385 netdev_tx_sent_queue(dev_queue, skb->len);
1386
1387 wmb();
1388
1389 hnae3_queue_xmit(ring->tqp, buf_num);
1390
1391 return NETDEV_TX_OK;
1392
1393 fill_err:
1394 hns3_clear_desc(ring, next_to_use_head);
1395
1396 out_err_tx_ok:
1397 dev_kfree_skb_any(skb);
1398 return NETDEV_TX_OK;
1399
1400 out_net_tx_busy:
1401 netif_stop_subqueue(netdev, ring_data->queue_index);
1402 smp_mb();
1403
1404 return NETDEV_TX_BUSY;
1405 }
1406
1407 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1408 {
1409 struct hnae3_handle *h = hns3_get_handle(netdev);
1410 struct sockaddr *mac_addr = p;
1411 int ret;
1412
1413 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1414 return -EADDRNOTAVAIL;
1415
1416 if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1417 netdev_info(netdev, "already using mac address %pM\n",
1418 mac_addr->sa_data);
1419 return 0;
1420 }
1421
1422 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1423 if (ret) {
1424 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1425 return ret;
1426 }
1427
1428 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1429
1430 return 0;
1431 }
1432
1433 static int hns3_nic_do_ioctl(struct net_device *netdev,
1434 struct ifreq *ifr, int cmd)
1435 {
1436 struct hnae3_handle *h = hns3_get_handle(netdev);
1437
1438 if (!netif_running(netdev))
1439 return -EINVAL;
1440
1441 if (!h->ae_algo->ops->do_ioctl)
1442 return -EOPNOTSUPP;
1443
1444 return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1445 }
1446
1447 static int hns3_nic_set_features(struct net_device *netdev,
1448 netdev_features_t features)
1449 {
1450 netdev_features_t changed = netdev->features ^ features;
1451 struct hns3_nic_priv *priv = netdev_priv(netdev);
1452 struct hnae3_handle *h = priv->ae_handle;
1453 bool enable;
1454 int ret;
1455
1456 if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1457 enable = !!(features & NETIF_F_GRO_HW);
1458 ret = h->ae_algo->ops->set_gro_en(h, enable);
1459 if (ret)
1460 return ret;
1461 }
1462
1463 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1464 h->ae_algo->ops->enable_vlan_filter) {
1465 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1466 h->ae_algo->ops->enable_vlan_filter(h, enable);
1467 }
1468
1469 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1470 h->ae_algo->ops->enable_hw_strip_rxvtag) {
1471 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1472 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1473 if (ret)
1474 return ret;
1475 }
1476
1477 if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1478 enable = !!(features & NETIF_F_NTUPLE);
1479 h->ae_algo->ops->enable_fd(h, enable);
1480 }
1481
1482 netdev->features = features;
1483 return 0;
1484 }
1485
1486 static void hns3_nic_get_stats64(struct net_device *netdev,
1487 struct rtnl_link_stats64 *stats)
1488 {
1489 struct hns3_nic_priv *priv = netdev_priv(netdev);
1490 int queue_num = priv->ae_handle->kinfo.num_tqps;
1491 struct hnae3_handle *handle = priv->ae_handle;
1492 struct hns3_enet_ring *ring;
1493 u64 rx_length_errors = 0;
1494 u64 rx_crc_errors = 0;
1495 u64 rx_multicast = 0;
1496 unsigned int start;
1497 u64 tx_errors = 0;
1498 u64 rx_errors = 0;
1499 unsigned int idx;
1500 u64 tx_bytes = 0;
1501 u64 rx_bytes = 0;
1502 u64 tx_pkts = 0;
1503 u64 rx_pkts = 0;
1504 u64 tx_drop = 0;
1505 u64 rx_drop = 0;
1506
1507 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1508 return;
1509
1510 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1511
1512 for (idx = 0; idx < queue_num; idx++) {
1513
1514 ring = priv->ring_data[idx].ring;
1515 do {
1516 start = u64_stats_fetch_begin_irq(&ring->syncp);
1517 tx_bytes += ring->stats.tx_bytes;
1518 tx_pkts += ring->stats.tx_pkts;
1519 tx_drop += ring->stats.sw_err_cnt;
1520 tx_drop += ring->stats.tx_vlan_err;
1521 tx_drop += ring->stats.tx_l4_proto_err;
1522 tx_drop += ring->stats.tx_l2l3l4_err;
1523 tx_drop += ring->stats.tx_tso_err;
1524 tx_errors += ring->stats.sw_err_cnt;
1525 tx_errors += ring->stats.tx_vlan_err;
1526 tx_errors += ring->stats.tx_l4_proto_err;
1527 tx_errors += ring->stats.tx_l2l3l4_err;
1528 tx_errors += ring->stats.tx_tso_err;
1529 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1530
1531
1532 ring = priv->ring_data[idx + queue_num].ring;
1533 do {
1534 start = u64_stats_fetch_begin_irq(&ring->syncp);
1535 rx_bytes += ring->stats.rx_bytes;
1536 rx_pkts += ring->stats.rx_pkts;
1537 rx_drop += ring->stats.l2_err;
1538 rx_errors += ring->stats.l2_err;
1539 rx_errors += ring->stats.l3l4_csum_err;
1540 rx_crc_errors += ring->stats.l2_err;
1541 rx_multicast += ring->stats.rx_multicast;
1542 rx_length_errors += ring->stats.err_pkt_len;
1543 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1544 }
1545
1546 stats->tx_bytes = tx_bytes;
1547 stats->tx_packets = tx_pkts;
1548 stats->rx_bytes = rx_bytes;
1549 stats->rx_packets = rx_pkts;
1550
1551 stats->rx_errors = rx_errors;
1552 stats->multicast = rx_multicast;
1553 stats->rx_length_errors = rx_length_errors;
1554 stats->rx_crc_errors = rx_crc_errors;
1555 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1556
1557 stats->tx_errors = tx_errors;
1558 stats->rx_dropped = rx_drop;
1559 stats->tx_dropped = tx_drop;
1560 stats->collisions = netdev->stats.collisions;
1561 stats->rx_over_errors = netdev->stats.rx_over_errors;
1562 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1563 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1564 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1565 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1566 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1567 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1568 stats->tx_window_errors = netdev->stats.tx_window_errors;
1569 stats->rx_compressed = netdev->stats.rx_compressed;
1570 stats->tx_compressed = netdev->stats.tx_compressed;
1571 }
1572
1573 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1574 {
1575 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1576 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1577 struct hnae3_knic_private_info *kinfo;
1578 u8 tc = mqprio_qopt->qopt.num_tc;
1579 u16 mode = mqprio_qopt->mode;
1580 u8 hw = mqprio_qopt->qopt.hw;
1581 struct hnae3_handle *h;
1582
1583 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1584 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1585 return -EOPNOTSUPP;
1586
1587 if (tc > HNAE3_MAX_TC)
1588 return -EINVAL;
1589
1590 if (!netdev)
1591 return -EINVAL;
1592
1593 h = hns3_get_handle(netdev);
1594 kinfo = &h->kinfo;
1595
1596 netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1597
1598 return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1599 kinfo->dcb_ops->setup_tc(h, tc ? tc : 1, prio_tc) : -EOPNOTSUPP;
1600 }
1601
1602 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1603 void *type_data)
1604 {
1605 if (type != TC_SETUP_QDISC_MQPRIO)
1606 return -EOPNOTSUPP;
1607
1608 return hns3_setup_tc(dev, type_data);
1609 }
1610
1611 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1612 __be16 proto, u16 vid)
1613 {
1614 struct hnae3_handle *h = hns3_get_handle(netdev);
1615 int ret = -EIO;
1616
1617 if (h->ae_algo->ops->set_vlan_filter)
1618 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1619
1620 return ret;
1621 }
1622
1623 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1624 __be16 proto, u16 vid)
1625 {
1626 struct hnae3_handle *h = hns3_get_handle(netdev);
1627 int ret = -EIO;
1628
1629 if (h->ae_algo->ops->set_vlan_filter)
1630 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1631
1632 return ret;
1633 }
1634
1635 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1636 u8 qos, __be16 vlan_proto)
1637 {
1638 struct hnae3_handle *h = hns3_get_handle(netdev);
1639 int ret = -EIO;
1640
1641 netif_dbg(h, drv, netdev,
1642 "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=%u\n",
1643 vf, vlan, qos, vlan_proto);
1644
1645 if (h->ae_algo->ops->set_vf_vlan_filter)
1646 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1647 qos, vlan_proto);
1648
1649 return ret;
1650 }
1651
1652 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1653 {
1654 struct hnae3_handle *h = hns3_get_handle(netdev);
1655 int ret;
1656
1657 if (hns3_nic_resetting(netdev))
1658 return -EBUSY;
1659
1660 if (!h->ae_algo->ops->set_mtu)
1661 return -EOPNOTSUPP;
1662
1663 netif_dbg(h, drv, netdev,
1664 "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1665
1666 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1667 if (ret)
1668 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1669 ret);
1670 else
1671 netdev->mtu = new_mtu;
1672
1673 return ret;
1674 }
1675
1676 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1677 {
1678 struct hns3_nic_priv *priv = netdev_priv(ndev);
1679 struct hnae3_handle *h = hns3_get_handle(ndev);
1680 struct hns3_enet_ring *tx_ring = NULL;
1681 struct napi_struct *napi;
1682 int timeout_queue = 0;
1683 int hw_head, hw_tail;
1684 int fbd_num, fbd_oft;
1685 int ebd_num, ebd_oft;
1686 int bd_num, bd_err;
1687 int ring_en, tc;
1688 int i;
1689
1690
1691 for (i = 0; i < ndev->num_tx_queues; i++) {
1692 struct netdev_queue *q;
1693 unsigned long trans_start;
1694
1695 q = netdev_get_tx_queue(ndev, i);
1696 trans_start = q->trans_start;
1697 if (netif_xmit_stopped(q) &&
1698 time_after(jiffies,
1699 (trans_start + ndev->watchdog_timeo))) {
1700 timeout_queue = i;
1701 netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
1702 q->state,
1703 jiffies_to_msecs(jiffies - trans_start));
1704 break;
1705 }
1706 }
1707
1708 if (i == ndev->num_tx_queues) {
1709 netdev_info(ndev,
1710 "no netdev TX timeout queue found, timeout count: %llu\n",
1711 priv->tx_timeout_count);
1712 return false;
1713 }
1714
1715 priv->tx_timeout_count++;
1716
1717 tx_ring = priv->ring_data[timeout_queue].ring;
1718 napi = &tx_ring->tqp_vector->napi;
1719
1720 netdev_info(ndev,
1721 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1722 priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1723 tx_ring->next_to_clean, napi->state);
1724
1725 netdev_info(ndev,
1726 "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1727 tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1728 tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1729
1730 netdev_info(ndev,
1731 "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1732 tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1733 tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1734
1735
1736
1737
1738 if (h->ae_algo->ops->get_mac_stats) {
1739 struct hns3_mac_stats mac_stats;
1740
1741 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
1742 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1743 mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
1744 }
1745
1746 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1747 HNS3_RING_TX_RING_HEAD_REG);
1748 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1749 HNS3_RING_TX_RING_TAIL_REG);
1750 fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1751 HNS3_RING_TX_RING_FBDNUM_REG);
1752 fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1753 HNS3_RING_TX_RING_OFFSET_REG);
1754 ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1755 HNS3_RING_TX_RING_EBDNUM_REG);
1756 ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1757 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1758 bd_num = readl_relaxed(tx_ring->tqp->io_base +
1759 HNS3_RING_TX_RING_BD_NUM_REG);
1760 bd_err = readl_relaxed(tx_ring->tqp->io_base +
1761 HNS3_RING_TX_RING_BD_ERR_REG);
1762 ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1763 tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1764
1765 netdev_info(ndev,
1766 "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1767 bd_num, hw_head, hw_tail, bd_err,
1768 readl(tx_ring->tqp_vector->mask_addr));
1769 netdev_info(ndev,
1770 "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1771 ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1772
1773 return true;
1774 }
1775
1776 static void hns3_nic_net_timeout(struct net_device *ndev)
1777 {
1778 struct hns3_nic_priv *priv = netdev_priv(ndev);
1779 struct hnae3_handle *h = priv->ae_handle;
1780
1781 if (!hns3_get_tx_timeo_queue_info(ndev))
1782 return;
1783
1784
1785
1786
1787 if (h->ae_algo->ops->reset_event)
1788 h->ae_algo->ops->reset_event(h->pdev, h);
1789 }
1790
1791 #ifdef CONFIG_RFS_ACCEL
1792 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1793 u16 rxq_index, u32 flow_id)
1794 {
1795 struct hnae3_handle *h = hns3_get_handle(dev);
1796 struct flow_keys fkeys;
1797
1798 if (!h->ae_algo->ops->add_arfs_entry)
1799 return -EOPNOTSUPP;
1800
1801 if (skb->encapsulation)
1802 return -EPROTONOSUPPORT;
1803
1804 if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1805 return -EPROTONOSUPPORT;
1806
1807 if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1808 fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1809 (fkeys.basic.ip_proto != IPPROTO_TCP &&
1810 fkeys.basic.ip_proto != IPPROTO_UDP))
1811 return -EPROTONOSUPPORT;
1812
1813 return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1814 }
1815 #endif
1816
1817 static const struct net_device_ops hns3_nic_netdev_ops = {
1818 .ndo_open = hns3_nic_net_open,
1819 .ndo_stop = hns3_nic_net_stop,
1820 .ndo_start_xmit = hns3_nic_net_xmit,
1821 .ndo_tx_timeout = hns3_nic_net_timeout,
1822 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
1823 .ndo_do_ioctl = hns3_nic_do_ioctl,
1824 .ndo_change_mtu = hns3_nic_change_mtu,
1825 .ndo_set_features = hns3_nic_set_features,
1826 .ndo_get_stats64 = hns3_nic_get_stats64,
1827 .ndo_setup_tc = hns3_nic_setup_tc,
1828 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1829 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1830 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1831 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1832 #ifdef CONFIG_RFS_ACCEL
1833 .ndo_rx_flow_steer = hns3_rx_flow_steer,
1834 #endif
1835
1836 };
1837
1838 bool hns3_is_phys_func(struct pci_dev *pdev)
1839 {
1840 u32 dev_id = pdev->device;
1841
1842 switch (dev_id) {
1843 case HNAE3_DEV_ID_GE:
1844 case HNAE3_DEV_ID_25GE:
1845 case HNAE3_DEV_ID_25GE_RDMA:
1846 case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1847 case HNAE3_DEV_ID_50GE_RDMA:
1848 case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1849 case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1850 return true;
1851 case HNAE3_DEV_ID_100G_VF:
1852 case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1853 return false;
1854 default:
1855 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1856 dev_id);
1857 }
1858
1859 return false;
1860 }
1861
1862 static void hns3_disable_sriov(struct pci_dev *pdev)
1863 {
1864
1865
1866
1867
1868 if (pci_vfs_assigned(pdev)) {
1869 dev_warn(&pdev->dev,
1870 "disabling driver while VFs are assigned\n");
1871 return;
1872 }
1873
1874 pci_disable_sriov(pdev);
1875 }
1876
1877 static void hns3_get_dev_capability(struct pci_dev *pdev,
1878 struct hnae3_ae_dev *ae_dev)
1879 {
1880 if (pdev->revision >= 0x21) {
1881 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1882 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1883 }
1884 }
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1897 {
1898 struct hnae3_ae_dev *ae_dev;
1899 int ret;
1900
1901 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
1902 if (!ae_dev) {
1903 ret = -ENOMEM;
1904 return ret;
1905 }
1906
1907 ae_dev->pdev = pdev;
1908 ae_dev->flag = ent->driver_data;
1909 ae_dev->reset_type = HNAE3_NONE_RESET;
1910 hns3_get_dev_capability(pdev, ae_dev);
1911 pci_set_drvdata(pdev, ae_dev);
1912
1913 ret = hnae3_register_ae_dev(ae_dev);
1914 if (ret) {
1915 devm_kfree(&pdev->dev, ae_dev);
1916 pci_set_drvdata(pdev, NULL);
1917 }
1918
1919 return ret;
1920 }
1921
1922
1923
1924
1925 static void hns3_remove(struct pci_dev *pdev)
1926 {
1927 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1928
1929 if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1930 hns3_disable_sriov(pdev);
1931
1932 hnae3_unregister_ae_dev(ae_dev);
1933 pci_set_drvdata(pdev, NULL);
1934 }
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1945 {
1946 int ret;
1947
1948 if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1949 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1950 return -EINVAL;
1951 }
1952
1953 if (num_vfs) {
1954 ret = pci_enable_sriov(pdev, num_vfs);
1955 if (ret)
1956 dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1957 else
1958 return num_vfs;
1959 } else if (!pci_vfs_assigned(pdev)) {
1960 pci_disable_sriov(pdev);
1961 } else {
1962 dev_warn(&pdev->dev,
1963 "Unable to free VFs because some are assigned to VMs.\n");
1964 }
1965
1966 return 0;
1967 }
1968
1969 static void hns3_shutdown(struct pci_dev *pdev)
1970 {
1971 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1972
1973 hnae3_unregister_ae_dev(ae_dev);
1974 devm_kfree(&pdev->dev, ae_dev);
1975 pci_set_drvdata(pdev, NULL);
1976
1977 if (system_state == SYSTEM_POWER_OFF)
1978 pci_set_power_state(pdev, PCI_D3hot);
1979 }
1980
1981 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1982 pci_channel_state_t state)
1983 {
1984 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1985 pci_ers_result_t ret;
1986
1987 dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1988
1989 if (state == pci_channel_io_perm_failure)
1990 return PCI_ERS_RESULT_DISCONNECT;
1991
1992 if (!ae_dev || !ae_dev->ops) {
1993 dev_err(&pdev->dev,
1994 "Can't recover - error happened before device initialized\n");
1995 return PCI_ERS_RESULT_NONE;
1996 }
1997
1998 if (ae_dev->ops->handle_hw_ras_error)
1999 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2000 else
2001 return PCI_ERS_RESULT_NONE;
2002
2003 return ret;
2004 }
2005
2006 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2007 {
2008 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2009 const struct hnae3_ae_ops *ops;
2010 enum hnae3_reset_type reset_type;
2011 struct device *dev = &pdev->dev;
2012
2013 if (!ae_dev || !ae_dev->ops)
2014 return PCI_ERS_RESULT_NONE;
2015
2016 ops = ae_dev->ops;
2017
2018 if (ops->reset_event && ops->get_reset_level &&
2019 ops->set_default_reset_request) {
2020 if (ae_dev->hw_err_reset_req) {
2021 reset_type = ops->get_reset_level(ae_dev,
2022 &ae_dev->hw_err_reset_req);
2023 ops->set_default_reset_request(ae_dev, reset_type);
2024 dev_info(dev, "requesting reset due to PCI error\n");
2025 ops->reset_event(pdev, NULL);
2026 }
2027
2028 return PCI_ERS_RESULT_RECOVERED;
2029 }
2030
2031 return PCI_ERS_RESULT_DISCONNECT;
2032 }
2033
2034 static void hns3_reset_prepare(struct pci_dev *pdev)
2035 {
2036 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2037
2038 dev_info(&pdev->dev, "hns3 flr prepare\n");
2039 if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2040 ae_dev->ops->flr_prepare(ae_dev);
2041 }
2042
2043 static void hns3_reset_done(struct pci_dev *pdev)
2044 {
2045 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2046
2047 dev_info(&pdev->dev, "hns3 flr done\n");
2048 if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2049 ae_dev->ops->flr_done(ae_dev);
2050 }
2051
2052 static const struct pci_error_handlers hns3_err_handler = {
2053 .error_detected = hns3_error_detected,
2054 .slot_reset = hns3_slot_reset,
2055 .reset_prepare = hns3_reset_prepare,
2056 .reset_done = hns3_reset_done,
2057 };
2058
2059 static struct pci_driver hns3_driver = {
2060 .name = hns3_driver_name,
2061 .id_table = hns3_pci_tbl,
2062 .probe = hns3_probe,
2063 .remove = hns3_remove,
2064 .shutdown = hns3_shutdown,
2065 .sriov_configure = hns3_pci_sriov_configure,
2066 .err_handler = &hns3_err_handler,
2067 };
2068
2069
2070 static void hns3_set_default_feature(struct net_device *netdev)
2071 {
2072 struct hnae3_handle *h = hns3_get_handle(netdev);
2073 struct pci_dev *pdev = h->pdev;
2074
2075 netdev->priv_flags |= IFF_UNICAST_FLT;
2076
2077 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2078 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2079 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2080 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2081 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2082
2083 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
2084
2085 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2086
2087 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2088 NETIF_F_HW_VLAN_CTAG_FILTER |
2089 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2090 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2091 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2092 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2093 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2094
2095 netdev->vlan_features |=
2096 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2097 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2098 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2099 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2100 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2101
2102 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2103 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2104 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2105 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2106 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2107 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2108
2109 if (pdev->revision >= 0x21) {
2110 netdev->hw_features |= NETIF_F_GRO_HW;
2111 netdev->features |= NETIF_F_GRO_HW;
2112
2113 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2114 netdev->hw_features |= NETIF_F_NTUPLE;
2115 netdev->features |= NETIF_F_NTUPLE;
2116 }
2117 }
2118 }
2119
2120 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2121 struct hns3_desc_cb *cb)
2122 {
2123 unsigned int order = hns3_page_order(ring);
2124 struct page *p;
2125
2126 p = dev_alloc_pages(order);
2127 if (!p)
2128 return -ENOMEM;
2129
2130 cb->priv = p;
2131 cb->page_offset = 0;
2132 cb->reuse_flag = 0;
2133 cb->buf = page_address(p);
2134 cb->length = hns3_page_size(ring);
2135 cb->type = DESC_TYPE_PAGE;
2136
2137 return 0;
2138 }
2139
2140 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2141 struct hns3_desc_cb *cb)
2142 {
2143 if (cb->type == DESC_TYPE_SKB)
2144 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2145 else if (!HNAE3_IS_TX_RING(ring))
2146 put_page((struct page *)cb->priv);
2147 memset(cb, 0, sizeof(*cb));
2148 }
2149
2150 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2151 {
2152 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2153 cb->length, ring_to_dma_dir(ring));
2154
2155 if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2156 return -EIO;
2157
2158 return 0;
2159 }
2160
2161 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2162 struct hns3_desc_cb *cb)
2163 {
2164 if (cb->type == DESC_TYPE_SKB)
2165 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2166 ring_to_dma_dir(ring));
2167 else if (cb->length)
2168 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2169 ring_to_dma_dir(ring));
2170 }
2171
2172 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2173 {
2174 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2175 ring->desc[i].addr = 0;
2176 }
2177
2178 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2179 {
2180 struct hns3_desc_cb *cb = &ring->desc_cb[i];
2181
2182 if (!ring->desc_cb[i].dma)
2183 return;
2184
2185 hns3_buffer_detach(ring, i);
2186 hns3_free_buffer(ring, cb);
2187 }
2188
2189 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2190 {
2191 int i;
2192
2193 for (i = 0; i < ring->desc_num; i++)
2194 hns3_free_buffer_detach(ring, i);
2195 }
2196
2197
2198 static void hns3_free_desc(struct hns3_enet_ring *ring)
2199 {
2200 int size = ring->desc_num * sizeof(ring->desc[0]);
2201
2202 hns3_free_buffers(ring);
2203
2204 if (ring->desc) {
2205 dma_free_coherent(ring_to_dev(ring), size,
2206 ring->desc, ring->desc_dma_addr);
2207 ring->desc = NULL;
2208 }
2209 }
2210
2211 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2212 {
2213 int size = ring->desc_num * sizeof(ring->desc[0]);
2214
2215 ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2216 &ring->desc_dma_addr, GFP_KERNEL);
2217 if (!ring->desc)
2218 return -ENOMEM;
2219
2220 return 0;
2221 }
2222
2223 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2224 struct hns3_desc_cb *cb)
2225 {
2226 int ret;
2227
2228 ret = hns3_alloc_buffer(ring, cb);
2229 if (ret)
2230 goto out;
2231
2232 ret = hns3_map_buffer(ring, cb);
2233 if (ret)
2234 goto out_with_buf;
2235
2236 return 0;
2237
2238 out_with_buf:
2239 hns3_free_buffer(ring, cb);
2240 out:
2241 return ret;
2242 }
2243
2244 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2245 {
2246 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2247
2248 if (ret)
2249 return ret;
2250
2251 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2252
2253 return 0;
2254 }
2255
2256
2257 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2258 {
2259 int i, j, ret;
2260
2261 for (i = 0; i < ring->desc_num; i++) {
2262 ret = hns3_alloc_buffer_attach(ring, i);
2263 if (ret)
2264 goto out_buffer_fail;
2265 }
2266
2267 return 0;
2268
2269 out_buffer_fail:
2270 for (j = i - 1; j >= 0; j--)
2271 hns3_free_buffer_detach(ring, j);
2272 return ret;
2273 }
2274
2275
2276 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2277 struct hns3_desc_cb *res_cb)
2278 {
2279 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2280 ring->desc_cb[i] = *res_cb;
2281 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2282 ring->desc[i].rx.bd_base_info = 0;
2283 }
2284
2285 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2286 {
2287 ring->desc_cb[i].reuse_flag = 0;
2288 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2289 ring->desc_cb[i].page_offset);
2290 ring->desc[i].rx.bd_base_info = 0;
2291 }
2292
2293 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2294 int *bytes, int *pkts)
2295 {
2296 int ntc = ring->next_to_clean;
2297 struct hns3_desc_cb *desc_cb;
2298
2299 while (head != ntc) {
2300 desc_cb = &ring->desc_cb[ntc];
2301 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2302 (*bytes) += desc_cb->length;
2303
2304 hns3_free_buffer_detach(ring, ntc);
2305
2306 if (++ntc == ring->desc_num)
2307 ntc = 0;
2308
2309
2310 prefetch(&ring->desc_cb[ntc]);
2311 }
2312
2313
2314
2315
2316 smp_store_release(&ring->next_to_clean, ntc);
2317 }
2318
2319 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2320 {
2321 int u = ring->next_to_use;
2322 int c = ring->next_to_clean;
2323
2324 if (unlikely(h > ring->desc_num))
2325 return 0;
2326
2327 return u > c ? (h > c && h <= u) : (h > c || h <= u);
2328 }
2329
2330 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2331 {
2332 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2333 struct hns3_nic_priv *priv = netdev_priv(netdev);
2334 struct netdev_queue *dev_queue;
2335 int bytes, pkts;
2336 int head;
2337
2338 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2339 rmb();
2340
2341 if (is_ring_empty(ring) || head == ring->next_to_clean)
2342 return;
2343
2344 if (unlikely(!is_valid_clean_head(ring, head))) {
2345 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2346 ring->next_to_use, ring->next_to_clean);
2347
2348 u64_stats_update_begin(&ring->syncp);
2349 ring->stats.io_err_cnt++;
2350 u64_stats_update_end(&ring->syncp);
2351 return;
2352 }
2353
2354 bytes = 0;
2355 pkts = 0;
2356 hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2357
2358 ring->tqp_vector->tx_group.total_bytes += bytes;
2359 ring->tqp_vector->tx_group.total_packets += pkts;
2360
2361 u64_stats_update_begin(&ring->syncp);
2362 ring->stats.tx_bytes += bytes;
2363 ring->stats.tx_pkts += pkts;
2364 u64_stats_update_end(&ring->syncp);
2365
2366 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2367 netdev_tx_completed_queue(dev_queue, pkts, bytes);
2368
2369 if (unlikely(pkts && netif_carrier_ok(netdev) &&
2370 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2371
2372
2373
2374 smp_mb();
2375 if (netif_tx_queue_stopped(dev_queue) &&
2376 !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2377 netif_tx_wake_queue(dev_queue);
2378 ring->stats.restart_queue++;
2379 }
2380 }
2381 }
2382
2383 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2384 {
2385 int ntc = ring->next_to_clean;
2386 int ntu = ring->next_to_use;
2387
2388 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2389 }
2390
2391 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2392 int cleand_count)
2393 {
2394 struct hns3_desc_cb *desc_cb;
2395 struct hns3_desc_cb res_cbs;
2396 int i, ret;
2397
2398 for (i = 0; i < cleand_count; i++) {
2399 desc_cb = &ring->desc_cb[ring->next_to_use];
2400 if (desc_cb->reuse_flag) {
2401 u64_stats_update_begin(&ring->syncp);
2402 ring->stats.reuse_pg_cnt++;
2403 u64_stats_update_end(&ring->syncp);
2404
2405 hns3_reuse_buffer(ring, ring->next_to_use);
2406 } else {
2407 ret = hns3_reserve_buffer_map(ring, &res_cbs);
2408 if (ret) {
2409 u64_stats_update_begin(&ring->syncp);
2410 ring->stats.sw_err_cnt++;
2411 u64_stats_update_end(&ring->syncp);
2412
2413 hns3_rl_err(ring->tqp_vector->napi.dev,
2414 "alloc rx buffer failed: %d\n",
2415 ret);
2416 break;
2417 }
2418 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2419
2420 u64_stats_update_begin(&ring->syncp);
2421 ring->stats.non_reuse_pg++;
2422 u64_stats_update_end(&ring->syncp);
2423 }
2424
2425 ring_ptr_move_fw(ring, next_to_use);
2426 }
2427
2428 wmb();
2429 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2430 }
2431
2432 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2433 struct hns3_enet_ring *ring, int pull_len,
2434 struct hns3_desc_cb *desc_cb)
2435 {
2436 struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2437 int size = le16_to_cpu(desc->rx.size);
2438 u32 truesize = hns3_buf_size(ring);
2439
2440 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2441 size - pull_len, truesize);
2442
2443
2444
2445
2446 if (unlikely(page_to_nid(desc_cb->priv) != numa_mem_id()) ||
2447 (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2448 return;
2449
2450
2451 desc_cb->page_offset += truesize;
2452
2453 if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2454 desc_cb->reuse_flag = 1;
2455
2456 get_page(desc_cb->priv);
2457 } else if (page_count(desc_cb->priv) == 1) {
2458 desc_cb->reuse_flag = 1;
2459 desc_cb->page_offset = 0;
2460 get_page(desc_cb->priv);
2461 }
2462 }
2463
2464 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2465 {
2466 __be16 type = skb->protocol;
2467 struct tcphdr *th;
2468 int depth = 0;
2469
2470 while (eth_type_vlan(type)) {
2471 struct vlan_hdr *vh;
2472
2473 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2474 return -EFAULT;
2475
2476 vh = (struct vlan_hdr *)(skb->data + depth);
2477 type = vh->h_vlan_encapsulated_proto;
2478 depth += VLAN_HLEN;
2479 }
2480
2481 skb_set_network_header(skb, depth);
2482
2483 if (type == htons(ETH_P_IP)) {
2484 const struct iphdr *iph = ip_hdr(skb);
2485
2486 depth += sizeof(struct iphdr);
2487 skb_set_transport_header(skb, depth);
2488 th = tcp_hdr(skb);
2489 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2490 iph->daddr, 0);
2491 } else if (type == htons(ETH_P_IPV6)) {
2492 const struct ipv6hdr *iph = ipv6_hdr(skb);
2493
2494 depth += sizeof(struct ipv6hdr);
2495 skb_set_transport_header(skb, depth);
2496 th = tcp_hdr(skb);
2497 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2498 &iph->daddr, 0);
2499 } else {
2500 hns3_rl_err(skb->dev,
2501 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2502 be16_to_cpu(type), depth);
2503 return -EFAULT;
2504 }
2505
2506 skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2507 if (th->cwr)
2508 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2509
2510 if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2511 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2512
2513 skb->csum_start = (unsigned char *)th - skb->head;
2514 skb->csum_offset = offsetof(struct tcphdr, check);
2515 skb->ip_summed = CHECKSUM_PARTIAL;
2516 return 0;
2517 }
2518
2519 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2520 u32 l234info, u32 bd_base_info, u32 ol_info)
2521 {
2522 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2523 int l3_type, l4_type;
2524 int ol4_type;
2525
2526 skb->ip_summed = CHECKSUM_NONE;
2527
2528 skb_checksum_none_assert(skb);
2529
2530 if (!(netdev->features & NETIF_F_RXCSUM))
2531 return;
2532
2533
2534 if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2535 return;
2536
2537 if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2538 BIT(HNS3_RXD_OL3E_B) |
2539 BIT(HNS3_RXD_OL4E_B)))) {
2540 u64_stats_update_begin(&ring->syncp);
2541 ring->stats.l3l4_csum_err++;
2542 u64_stats_update_end(&ring->syncp);
2543
2544 return;
2545 }
2546
2547 ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2548 HNS3_RXD_OL4ID_S);
2549 switch (ol4_type) {
2550 case HNS3_OL4_TYPE_MAC_IN_UDP:
2551 case HNS3_OL4_TYPE_NVGRE:
2552 skb->csum_level = 1;
2553
2554 case HNS3_OL4_TYPE_NO_TUN:
2555 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2556 HNS3_RXD_L3ID_S);
2557 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2558 HNS3_RXD_L4ID_S);
2559
2560
2561 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2562 l3_type == HNS3_L3_TYPE_IPV6) &&
2563 (l4_type == HNS3_L4_TYPE_UDP ||
2564 l4_type == HNS3_L4_TYPE_TCP ||
2565 l4_type == HNS3_L4_TYPE_SCTP))
2566 skb->ip_summed = CHECKSUM_UNNECESSARY;
2567 break;
2568 default:
2569 break;
2570 }
2571 }
2572
2573 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2574 {
2575 if (skb_has_frag_list(skb))
2576 napi_gro_flush(&ring->tqp_vector->napi, false);
2577
2578 napi_gro_receive(&ring->tqp_vector->napi, skb);
2579 }
2580
2581 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2582 struct hns3_desc *desc, u32 l234info,
2583 u16 *vlan_tag)
2584 {
2585 struct hnae3_handle *handle = ring->tqp->handle;
2586 struct pci_dev *pdev = ring->tqp->handle->pdev;
2587
2588 if (pdev->revision == 0x20) {
2589 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2590 if (!(*vlan_tag & VLAN_VID_MASK))
2591 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2592
2593 return (*vlan_tag != 0);
2594 }
2595
2596 #define HNS3_STRP_OUTER_VLAN 0x1
2597 #define HNS3_STRP_INNER_VLAN 0x2
2598 #define HNS3_STRP_BOTH 0x3
2599
2600
2601
2602
2603
2604 switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2605 HNS3_RXD_STRP_TAGP_S)) {
2606 case HNS3_STRP_OUTER_VLAN:
2607 if (handle->port_base_vlan_state !=
2608 HNAE3_PORT_BASE_VLAN_DISABLE)
2609 return false;
2610
2611 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2612 return true;
2613 case HNS3_STRP_INNER_VLAN:
2614 if (handle->port_base_vlan_state !=
2615 HNAE3_PORT_BASE_VLAN_DISABLE)
2616 return false;
2617
2618 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2619 return true;
2620 case HNS3_STRP_BOTH:
2621 if (handle->port_base_vlan_state ==
2622 HNAE3_PORT_BASE_VLAN_DISABLE)
2623 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2624 else
2625 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2626
2627 return true;
2628 default:
2629 return false;
2630 }
2631 }
2632
2633 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2634 unsigned char *va)
2635 {
2636 #define HNS3_NEED_ADD_FRAG 1
2637 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2638 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2639 struct sk_buff *skb;
2640
2641 ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2642 skb = ring->skb;
2643 if (unlikely(!skb)) {
2644 hns3_rl_err(netdev, "alloc rx skb fail\n");
2645
2646 u64_stats_update_begin(&ring->syncp);
2647 ring->stats.sw_err_cnt++;
2648 u64_stats_update_end(&ring->syncp);
2649
2650 return -ENOMEM;
2651 }
2652
2653 prefetchw(skb->data);
2654
2655 ring->pending_buf = 1;
2656 ring->frag_num = 0;
2657 ring->tail_skb = NULL;
2658 if (length <= HNS3_RX_HEAD_SIZE) {
2659 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2660
2661
2662 if (likely(page_to_nid(desc_cb->priv) == numa_mem_id()))
2663 desc_cb->reuse_flag = 1;
2664 else
2665 put_page(desc_cb->priv);
2666
2667 ring_ptr_move_fw(ring, next_to_clean);
2668 return 0;
2669 }
2670 u64_stats_update_begin(&ring->syncp);
2671 ring->stats.seg_pkt_cnt++;
2672 u64_stats_update_end(&ring->syncp);
2673
2674 ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2675 __skb_put(skb, ring->pull_len);
2676 hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2677 desc_cb);
2678 ring_ptr_move_fw(ring, next_to_clean);
2679
2680 return HNS3_NEED_ADD_FRAG;
2681 }
2682
2683 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2684 struct sk_buff **out_skb, bool pending)
2685 {
2686 struct sk_buff *skb = *out_skb;
2687 struct sk_buff *head_skb = *out_skb;
2688 struct sk_buff *new_skb;
2689 struct hns3_desc_cb *desc_cb;
2690 struct hns3_desc *pre_desc;
2691 u32 bd_base_info;
2692 int pre_bd;
2693
2694
2695
2696
2697 if (pending) {
2698 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2699 ring->desc_num;
2700 pre_desc = &ring->desc[pre_bd];
2701 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2702 } else {
2703 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2704 }
2705
2706 while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2707 desc = &ring->desc[ring->next_to_clean];
2708 desc_cb = &ring->desc_cb[ring->next_to_clean];
2709 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2710
2711 dma_rmb();
2712 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2713 return -ENXIO;
2714
2715 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2716 new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2717 HNS3_RX_HEAD_SIZE);
2718 if (unlikely(!new_skb)) {
2719 hns3_rl_err(ring->tqp_vector->napi.dev,
2720 "alloc rx fraglist skb fail\n");
2721 return -ENXIO;
2722 }
2723 ring->frag_num = 0;
2724
2725 if (ring->tail_skb) {
2726 ring->tail_skb->next = new_skb;
2727 ring->tail_skb = new_skb;
2728 } else {
2729 skb_shinfo(skb)->frag_list = new_skb;
2730 ring->tail_skb = new_skb;
2731 }
2732 }
2733
2734 if (ring->tail_skb) {
2735 head_skb->truesize += hns3_buf_size(ring);
2736 head_skb->data_len += le16_to_cpu(desc->rx.size);
2737 head_skb->len += le16_to_cpu(desc->rx.size);
2738 skb = ring->tail_skb;
2739 }
2740
2741 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2742 ring_ptr_move_fw(ring, next_to_clean);
2743 ring->pending_buf++;
2744 }
2745
2746 return 0;
2747 }
2748
2749 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2750 struct sk_buff *skb, u32 l234info,
2751 u32 bd_base_info, u32 ol_info)
2752 {
2753 u32 l3_type;
2754
2755 skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2756 HNS3_RXD_GRO_SIZE_M,
2757 HNS3_RXD_GRO_SIZE_S);
2758
2759 if (!skb_shinfo(skb)->gso_size) {
2760 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2761 return 0;
2762 }
2763
2764 NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2765 HNS3_RXD_GRO_COUNT_M,
2766 HNS3_RXD_GRO_COUNT_S);
2767
2768 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2769 if (l3_type == HNS3_L3_TYPE_IPV4)
2770 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2771 else if (l3_type == HNS3_L3_TYPE_IPV6)
2772 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2773 else
2774 return -EFAULT;
2775
2776 return hns3_gro_complete(skb, l234info);
2777 }
2778
2779 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2780 struct sk_buff *skb, u32 rss_hash)
2781 {
2782 struct hnae3_handle *handle = ring->tqp->handle;
2783 enum pkt_hash_types rss_type;
2784
2785 if (rss_hash)
2786 rss_type = handle->kinfo.rss_type;
2787 else
2788 rss_type = PKT_HASH_TYPE_NONE;
2789
2790 skb_set_hash(skb, rss_hash, rss_type);
2791 }
2792
2793 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2794 {
2795 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2796 enum hns3_pkt_l2t_type l2_frame_type;
2797 u32 bd_base_info, l234info, ol_info;
2798 struct hns3_desc *desc;
2799 unsigned int len;
2800 int pre_ntc, ret;
2801
2802
2803
2804
2805
2806 pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2807 (ring->desc_num - 1);
2808 desc = &ring->desc[pre_ntc];
2809 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2810 l234info = le32_to_cpu(desc->rx.l234_info);
2811 ol_info = le32_to_cpu(desc->rx.ol_info);
2812
2813
2814
2815
2816
2817 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2818 u16 vlan_tag;
2819
2820 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2821 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2822 vlan_tag);
2823 }
2824
2825 if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2826 BIT(HNS3_RXD_L2E_B))))) {
2827 u64_stats_update_begin(&ring->syncp);
2828 if (l234info & BIT(HNS3_RXD_L2E_B))
2829 ring->stats.l2_err++;
2830 else
2831 ring->stats.err_pkt_len++;
2832 u64_stats_update_end(&ring->syncp);
2833
2834 return -EFAULT;
2835 }
2836
2837 len = skb->len;
2838
2839
2840 skb->protocol = eth_type_trans(skb, netdev);
2841
2842
2843 ret = hns3_set_gro_and_checksum(ring, skb, l234info,
2844 bd_base_info, ol_info);
2845 if (unlikely(ret)) {
2846 u64_stats_update_begin(&ring->syncp);
2847 ring->stats.rx_err_cnt++;
2848 u64_stats_update_end(&ring->syncp);
2849 return ret;
2850 }
2851
2852 l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2853 HNS3_RXD_DMAC_S);
2854
2855 u64_stats_update_begin(&ring->syncp);
2856 ring->stats.rx_pkts++;
2857 ring->stats.rx_bytes += len;
2858
2859 if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2860 ring->stats.rx_multicast++;
2861
2862 u64_stats_update_end(&ring->syncp);
2863
2864 ring->tqp_vector->rx_group.total_bytes += len;
2865
2866 hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2867 return 0;
2868 }
2869
2870 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2871 struct sk_buff **out_skb)
2872 {
2873 struct sk_buff *skb = ring->skb;
2874 struct hns3_desc_cb *desc_cb;
2875 struct hns3_desc *desc;
2876 unsigned int length;
2877 u32 bd_base_info;
2878 int ret;
2879
2880 desc = &ring->desc[ring->next_to_clean];
2881 desc_cb = &ring->desc_cb[ring->next_to_clean];
2882
2883 prefetch(desc);
2884
2885 length = le16_to_cpu(desc->rx.size);
2886 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2887
2888
2889 if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2890 return -ENXIO;
2891
2892 if (!skb)
2893 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2894
2895
2896
2897
2898
2899
2900
2901
2902 prefetch(ring->va);
2903 #if L1_CACHE_BYTES < 128
2904 prefetch(ring->va + L1_CACHE_BYTES);
2905 #endif
2906
2907 if (!skb) {
2908 ret = hns3_alloc_skb(ring, length, ring->va);
2909 *out_skb = skb = ring->skb;
2910
2911 if (ret < 0)
2912 return ret;
2913 if (ret > 0) {
2914 ret = hns3_add_frag(ring, desc, &skb, false);
2915 if (ret)
2916 return ret;
2917
2918
2919
2920
2921 memcpy(skb->data, ring->va,
2922 ALIGN(ring->pull_len, sizeof(long)));
2923 }
2924 } else {
2925 ret = hns3_add_frag(ring, desc, &skb, true);
2926 if (ret)
2927 return ret;
2928
2929
2930
2931
2932 memcpy(skb->data, ring->va,
2933 ALIGN(ring->pull_len, sizeof(long)));
2934 }
2935
2936 ret = hns3_handle_bdinfo(ring, skb);
2937 if (unlikely(ret)) {
2938 dev_kfree_skb_any(skb);
2939 return ret;
2940 }
2941
2942 skb_record_rx_queue(skb, ring->tqp->tqp_index);
2943 *out_skb = skb;
2944
2945 return 0;
2946 }
2947
2948 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
2949 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2950 {
2951 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2952 int unused_count = hns3_desc_unused(ring);
2953 struct sk_buff *skb = ring->skb;
2954 int recv_pkts = 0;
2955 int recv_bds = 0;
2956 int err, num;
2957
2958 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2959 rmb();
2960
2961 num -= unused_count;
2962 unused_count -= ring->pending_buf;
2963
2964 while (recv_pkts < budget && recv_bds < num) {
2965
2966 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2967 hns3_nic_alloc_rx_buffers(ring, unused_count);
2968 unused_count = hns3_desc_unused(ring) -
2969 ring->pending_buf;
2970 }
2971
2972
2973 err = hns3_handle_rx_bd(ring, &skb);
2974 if (unlikely(!skb))
2975 goto out;
2976
2977 if (err == -ENXIO) {
2978 goto out;
2979 } else if (unlikely(err)) {
2980 recv_bds += ring->pending_buf;
2981 unused_count += ring->pending_buf;
2982 ring->skb = NULL;
2983 ring->pending_buf = 0;
2984 continue;
2985 }
2986
2987 rx_fn(ring, skb);
2988 recv_bds += ring->pending_buf;
2989 unused_count += ring->pending_buf;
2990 ring->skb = NULL;
2991 ring->pending_buf = 0;
2992
2993 recv_pkts++;
2994 }
2995
2996 out:
2997
2998 if (unused_count > 0)
2999 hns3_nic_alloc_rx_buffers(ring, unused_count);
3000
3001 return recv_pkts;
3002 }
3003
3004 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3005 {
3006 #define HNS3_RX_LOW_BYTE_RATE 10000
3007 #define HNS3_RX_MID_BYTE_RATE 20000
3008 #define HNS3_RX_ULTRA_PACKET_RATE 40
3009
3010 enum hns3_flow_level_range new_flow_level;
3011 struct hns3_enet_tqp_vector *tqp_vector;
3012 int packets_per_msecs, bytes_per_msecs;
3013 u32 time_passed_ms;
3014
3015 tqp_vector = ring_group->ring->tqp_vector;
3016 time_passed_ms =
3017 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3018 if (!time_passed_ms)
3019 return false;
3020
3021 do_div(ring_group->total_packets, time_passed_ms);
3022 packets_per_msecs = ring_group->total_packets;
3023
3024 do_div(ring_group->total_bytes, time_passed_ms);
3025 bytes_per_msecs = ring_group->total_bytes;
3026
3027 new_flow_level = ring_group->coal.flow_level;
3028
3029
3030
3031
3032
3033
3034
3035 switch (new_flow_level) {
3036 case HNS3_FLOW_LOW:
3037 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3038 new_flow_level = HNS3_FLOW_MID;
3039 break;
3040 case HNS3_FLOW_MID:
3041 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3042 new_flow_level = HNS3_FLOW_HIGH;
3043 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3044 new_flow_level = HNS3_FLOW_LOW;
3045 break;
3046 case HNS3_FLOW_HIGH:
3047 case HNS3_FLOW_ULTRA:
3048 default:
3049 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3050 new_flow_level = HNS3_FLOW_MID;
3051 break;
3052 }
3053
3054 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3055 &tqp_vector->rx_group == ring_group)
3056 new_flow_level = HNS3_FLOW_ULTRA;
3057
3058 ring_group->total_bytes = 0;
3059 ring_group->total_packets = 0;
3060 ring_group->coal.flow_level = new_flow_level;
3061
3062 return true;
3063 }
3064
3065 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3066 {
3067 struct hns3_enet_tqp_vector *tqp_vector;
3068 u16 new_int_gl;
3069
3070 if (!ring_group->ring)
3071 return false;
3072
3073 tqp_vector = ring_group->ring->tqp_vector;
3074 if (!tqp_vector->last_jiffies)
3075 return false;
3076
3077 if (ring_group->total_packets == 0) {
3078 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3079 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3080 return true;
3081 }
3082
3083 if (!hns3_get_new_flow_lvl(ring_group))
3084 return false;
3085
3086 new_int_gl = ring_group->coal.int_gl;
3087 switch (ring_group->coal.flow_level) {
3088 case HNS3_FLOW_LOW:
3089 new_int_gl = HNS3_INT_GL_50K;
3090 break;
3091 case HNS3_FLOW_MID:
3092 new_int_gl = HNS3_INT_GL_20K;
3093 break;
3094 case HNS3_FLOW_HIGH:
3095 new_int_gl = HNS3_INT_GL_18K;
3096 break;
3097 case HNS3_FLOW_ULTRA:
3098 new_int_gl = HNS3_INT_GL_8K;
3099 break;
3100 default:
3101 break;
3102 }
3103
3104 if (new_int_gl != ring_group->coal.int_gl) {
3105 ring_group->coal.int_gl = new_int_gl;
3106 return true;
3107 }
3108 return false;
3109 }
3110
3111 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3112 {
3113 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3114 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3115 bool rx_update, tx_update;
3116
3117
3118 if (time_before(jiffies,
3119 tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3120 return;
3121
3122 if (rx_group->coal.gl_adapt_enable) {
3123 rx_update = hns3_get_new_int_gl(rx_group);
3124 if (rx_update)
3125 hns3_set_vector_coalesce_rx_gl(tqp_vector,
3126 rx_group->coal.int_gl);
3127 }
3128
3129 if (tx_group->coal.gl_adapt_enable) {
3130 tx_update = hns3_get_new_int_gl(tx_group);
3131 if (tx_update)
3132 hns3_set_vector_coalesce_tx_gl(tqp_vector,
3133 tx_group->coal.int_gl);
3134 }
3135
3136 tqp_vector->last_jiffies = jiffies;
3137 }
3138
3139 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3140 {
3141 struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3142 struct hns3_enet_ring *ring;
3143 int rx_pkt_total = 0;
3144
3145 struct hns3_enet_tqp_vector *tqp_vector =
3146 container_of(napi, struct hns3_enet_tqp_vector, napi);
3147 bool clean_complete = true;
3148 int rx_budget = budget;
3149
3150 if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3151 napi_complete(napi);
3152 return 0;
3153 }
3154
3155
3156
3157
3158 hns3_for_each_ring(ring, tqp_vector->tx_group)
3159 hns3_clean_tx_ring(ring);
3160
3161
3162 if (tqp_vector->num_tqps > 1)
3163 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3164
3165 hns3_for_each_ring(ring, tqp_vector->rx_group) {
3166 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3167 hns3_rx_skb);
3168
3169 if (rx_cleaned >= rx_budget)
3170 clean_complete = false;
3171
3172 rx_pkt_total += rx_cleaned;
3173 }
3174
3175 tqp_vector->rx_group.total_packets += rx_pkt_total;
3176
3177 if (!clean_complete)
3178 return budget;
3179
3180 if (napi_complete(napi) &&
3181 likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3182 hns3_update_new_int_gl(tqp_vector);
3183 hns3_mask_vector_irq(tqp_vector, 1);
3184 }
3185
3186 return rx_pkt_total;
3187 }
3188
3189 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3190 struct hnae3_ring_chain_node *head)
3191 {
3192 struct pci_dev *pdev = tqp_vector->handle->pdev;
3193 struct hnae3_ring_chain_node *cur_chain = head;
3194 struct hnae3_ring_chain_node *chain;
3195 struct hns3_enet_ring *tx_ring;
3196 struct hns3_enet_ring *rx_ring;
3197
3198 tx_ring = tqp_vector->tx_group.ring;
3199 if (tx_ring) {
3200 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3201 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3202 HNAE3_RING_TYPE_TX);
3203 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3204 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3205
3206 cur_chain->next = NULL;
3207
3208 while (tx_ring->next) {
3209 tx_ring = tx_ring->next;
3210
3211 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3212 GFP_KERNEL);
3213 if (!chain)
3214 goto err_free_chain;
3215
3216 cur_chain->next = chain;
3217 chain->tqp_index = tx_ring->tqp->tqp_index;
3218 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3219 HNAE3_RING_TYPE_TX);
3220 hnae3_set_field(chain->int_gl_idx,
3221 HNAE3_RING_GL_IDX_M,
3222 HNAE3_RING_GL_IDX_S,
3223 HNAE3_RING_GL_TX);
3224
3225 cur_chain = chain;
3226 }
3227 }
3228
3229 rx_ring = tqp_vector->rx_group.ring;
3230 if (!tx_ring && rx_ring) {
3231 cur_chain->next = NULL;
3232 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3233 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3234 HNAE3_RING_TYPE_RX);
3235 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3236 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3237
3238 rx_ring = rx_ring->next;
3239 }
3240
3241 while (rx_ring) {
3242 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3243 if (!chain)
3244 goto err_free_chain;
3245
3246 cur_chain->next = chain;
3247 chain->tqp_index = rx_ring->tqp->tqp_index;
3248 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3249 HNAE3_RING_TYPE_RX);
3250 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3251 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3252
3253 cur_chain = chain;
3254
3255 rx_ring = rx_ring->next;
3256 }
3257
3258 return 0;
3259
3260 err_free_chain:
3261 cur_chain = head->next;
3262 while (cur_chain) {
3263 chain = cur_chain->next;
3264 devm_kfree(&pdev->dev, cur_chain);
3265 cur_chain = chain;
3266 }
3267 head->next = NULL;
3268
3269 return -ENOMEM;
3270 }
3271
3272 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3273 struct hnae3_ring_chain_node *head)
3274 {
3275 struct pci_dev *pdev = tqp_vector->handle->pdev;
3276 struct hnae3_ring_chain_node *chain_tmp, *chain;
3277
3278 chain = head->next;
3279
3280 while (chain) {
3281 chain_tmp = chain->next;
3282 devm_kfree(&pdev->dev, chain);
3283 chain = chain_tmp;
3284 }
3285 }
3286
3287 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3288 struct hns3_enet_ring *ring)
3289 {
3290 ring->next = group->ring;
3291 group->ring = ring;
3292
3293 group->count++;
3294 }
3295
3296 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3297 {
3298 struct pci_dev *pdev = priv->ae_handle->pdev;
3299 struct hns3_enet_tqp_vector *tqp_vector;
3300 int num_vectors = priv->vector_num;
3301 int numa_node;
3302 int vector_i;
3303
3304 numa_node = dev_to_node(&pdev->dev);
3305
3306 for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3307 tqp_vector = &priv->tqp_vector[vector_i];
3308 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3309 &tqp_vector->affinity_mask);
3310 }
3311 }
3312
3313 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3314 {
3315 struct hnae3_ring_chain_node vector_ring_chain;
3316 struct hnae3_handle *h = priv->ae_handle;
3317 struct hns3_enet_tqp_vector *tqp_vector;
3318 int ret = 0;
3319 int i;
3320
3321 hns3_nic_set_cpumask(priv);
3322
3323 for (i = 0; i < priv->vector_num; i++) {
3324 tqp_vector = &priv->tqp_vector[i];
3325 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3326 tqp_vector->num_tqps = 0;
3327 }
3328
3329 for (i = 0; i < h->kinfo.num_tqps; i++) {
3330 u16 vector_i = i % priv->vector_num;
3331 u16 tqp_num = h->kinfo.num_tqps;
3332
3333 tqp_vector = &priv->tqp_vector[vector_i];
3334
3335 hns3_add_ring_to_group(&tqp_vector->tx_group,
3336 priv->ring_data[i].ring);
3337
3338 hns3_add_ring_to_group(&tqp_vector->rx_group,
3339 priv->ring_data[i + tqp_num].ring);
3340
3341 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3342 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3343 tqp_vector->num_tqps++;
3344 }
3345
3346 for (i = 0; i < priv->vector_num; i++) {
3347 tqp_vector = &priv->tqp_vector[i];
3348
3349 tqp_vector->rx_group.total_bytes = 0;
3350 tqp_vector->rx_group.total_packets = 0;
3351 tqp_vector->tx_group.total_bytes = 0;
3352 tqp_vector->tx_group.total_packets = 0;
3353 tqp_vector->handle = h;
3354
3355 ret = hns3_get_vector_ring_chain(tqp_vector,
3356 &vector_ring_chain);
3357 if (ret)
3358 goto map_ring_fail;
3359
3360 ret = h->ae_algo->ops->map_ring_to_vector(h,
3361 tqp_vector->vector_irq, &vector_ring_chain);
3362
3363 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3364
3365 if (ret)
3366 goto map_ring_fail;
3367
3368 netif_napi_add(priv->netdev, &tqp_vector->napi,
3369 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3370 }
3371
3372 return 0;
3373
3374 map_ring_fail:
3375 while (i--)
3376 netif_napi_del(&priv->tqp_vector[i].napi);
3377
3378 return ret;
3379 }
3380
3381 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3382 {
3383 #define HNS3_VECTOR_PF_MAX_NUM 64
3384
3385 struct hnae3_handle *h = priv->ae_handle;
3386 struct hns3_enet_tqp_vector *tqp_vector;
3387 struct hnae3_vector_info *vector;
3388 struct pci_dev *pdev = h->pdev;
3389 u16 tqp_num = h->kinfo.num_tqps;
3390 u16 vector_num;
3391 int ret = 0;
3392 u16 i;
3393
3394
3395
3396 vector_num = min_t(u16, num_online_cpus(), tqp_num);
3397 vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3398
3399 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3400 GFP_KERNEL);
3401 if (!vector)
3402 return -ENOMEM;
3403
3404
3405 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3406
3407 priv->vector_num = vector_num;
3408 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3409 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3410 GFP_KERNEL);
3411 if (!priv->tqp_vector) {
3412 ret = -ENOMEM;
3413 goto out;
3414 }
3415
3416 for (i = 0; i < priv->vector_num; i++) {
3417 tqp_vector = &priv->tqp_vector[i];
3418 tqp_vector->idx = i;
3419 tqp_vector->mask_addr = vector[i].io_addr;
3420 tqp_vector->vector_irq = vector[i].vector;
3421 hns3_vector_gl_rl_init(tqp_vector, priv);
3422 }
3423
3424 out:
3425 devm_kfree(&pdev->dev, vector);
3426 return ret;
3427 }
3428
3429 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3430 {
3431 group->ring = NULL;
3432 group->count = 0;
3433 }
3434
3435 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3436 {
3437 struct hnae3_ring_chain_node vector_ring_chain;
3438 struct hnae3_handle *h = priv->ae_handle;
3439 struct hns3_enet_tqp_vector *tqp_vector;
3440 int i;
3441
3442 for (i = 0; i < priv->vector_num; i++) {
3443 tqp_vector = &priv->tqp_vector[i];
3444
3445 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3446 continue;
3447
3448 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3449
3450 h->ae_algo->ops->unmap_ring_from_vector(h,
3451 tqp_vector->vector_irq, &vector_ring_chain);
3452
3453 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3454
3455 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3456 irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3457 free_irq(tqp_vector->vector_irq, tqp_vector);
3458 tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3459 }
3460
3461 hns3_clear_ring_group(&tqp_vector->rx_group);
3462 hns3_clear_ring_group(&tqp_vector->tx_group);
3463 netif_napi_del(&priv->tqp_vector[i].napi);
3464 }
3465 }
3466
3467 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3468 {
3469 struct hnae3_handle *h = priv->ae_handle;
3470 struct pci_dev *pdev = h->pdev;
3471 int i, ret;
3472
3473 for (i = 0; i < priv->vector_num; i++) {
3474 struct hns3_enet_tqp_vector *tqp_vector;
3475
3476 tqp_vector = &priv->tqp_vector[i];
3477 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3478 if (ret)
3479 return ret;
3480 }
3481
3482 devm_kfree(&pdev->dev, priv->tqp_vector);
3483 return 0;
3484 }
3485
3486 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3487 unsigned int ring_type)
3488 {
3489 struct hns3_nic_ring_data *ring_data = priv->ring_data;
3490 int queue_num = priv->ae_handle->kinfo.num_tqps;
3491 struct pci_dev *pdev = priv->ae_handle->pdev;
3492 struct hns3_enet_ring *ring;
3493 int desc_num;
3494
3495 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3496 if (!ring)
3497 return -ENOMEM;
3498
3499 if (ring_type == HNAE3_RING_TYPE_TX) {
3500 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3501 ring_data[q->tqp_index].ring = ring;
3502 ring_data[q->tqp_index].queue_index = q->tqp_index;
3503 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3504 } else {
3505 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3506 ring_data[q->tqp_index + queue_num].ring = ring;
3507 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3508 ring->io_base = q->io_base;
3509 }
3510
3511 hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3512
3513 ring->tqp = q;
3514 ring->desc = NULL;
3515 ring->desc_cb = NULL;
3516 ring->dev = priv->dev;
3517 ring->desc_dma_addr = 0;
3518 ring->buf_size = q->buf_size;
3519 ring->desc_num = desc_num;
3520 ring->next_to_use = 0;
3521 ring->next_to_clean = 0;
3522
3523 return 0;
3524 }
3525
3526 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3527 struct hns3_nic_priv *priv)
3528 {
3529 int ret;
3530
3531 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3532 if (ret)
3533 return ret;
3534
3535 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3536 if (ret) {
3537 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3538 return ret;
3539 }
3540
3541 return 0;
3542 }
3543
3544 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3545 {
3546 struct hnae3_handle *h = priv->ae_handle;
3547 struct pci_dev *pdev = h->pdev;
3548 int i, ret;
3549
3550 priv->ring_data = devm_kzalloc(&pdev->dev,
3551 array3_size(h->kinfo.num_tqps,
3552 sizeof(*priv->ring_data),
3553 2),
3554 GFP_KERNEL);
3555 if (!priv->ring_data)
3556 return -ENOMEM;
3557
3558 for (i = 0; i < h->kinfo.num_tqps; i++) {
3559 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3560 if (ret)
3561 goto err;
3562 }
3563
3564 return 0;
3565 err:
3566 while (i--) {
3567 devm_kfree(priv->dev, priv->ring_data[i].ring);
3568 devm_kfree(priv->dev,
3569 priv->ring_data[i + h->kinfo.num_tqps].ring);
3570 }
3571
3572 devm_kfree(&pdev->dev, priv->ring_data);
3573 priv->ring_data = NULL;
3574 return ret;
3575 }
3576
3577 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3578 {
3579 struct hnae3_handle *h = priv->ae_handle;
3580 int i;
3581
3582 if (!priv->ring_data)
3583 return;
3584
3585 for (i = 0; i < h->kinfo.num_tqps; i++) {
3586 devm_kfree(priv->dev, priv->ring_data[i].ring);
3587 devm_kfree(priv->dev,
3588 priv->ring_data[i + h->kinfo.num_tqps].ring);
3589 }
3590 devm_kfree(priv->dev, priv->ring_data);
3591 priv->ring_data = NULL;
3592 }
3593
3594 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3595 {
3596 int ret;
3597
3598 if (ring->desc_num <= 0 || ring->buf_size <= 0)
3599 return -EINVAL;
3600
3601 ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3602 sizeof(ring->desc_cb[0]), GFP_KERNEL);
3603 if (!ring->desc_cb) {
3604 ret = -ENOMEM;
3605 goto out;
3606 }
3607
3608 ret = hns3_alloc_desc(ring);
3609 if (ret)
3610 goto out_with_desc_cb;
3611
3612 if (!HNAE3_IS_TX_RING(ring)) {
3613 ret = hns3_alloc_ring_buffers(ring);
3614 if (ret)
3615 goto out_with_desc;
3616 }
3617
3618 return 0;
3619
3620 out_with_desc:
3621 hns3_free_desc(ring);
3622 out_with_desc_cb:
3623 devm_kfree(ring_to_dev(ring), ring->desc_cb);
3624 ring->desc_cb = NULL;
3625 out:
3626 return ret;
3627 }
3628
3629 void hns3_fini_ring(struct hns3_enet_ring *ring)
3630 {
3631 hns3_free_desc(ring);
3632 devm_kfree(ring_to_dev(ring), ring->desc_cb);
3633 ring->desc_cb = NULL;
3634 ring->next_to_clean = 0;
3635 ring->next_to_use = 0;
3636 ring->pending_buf = 0;
3637 if (ring->skb) {
3638 dev_kfree_skb_any(ring->skb);
3639 ring->skb = NULL;
3640 }
3641 }
3642
3643 static int hns3_buf_size2type(u32 buf_size)
3644 {
3645 int bd_size_type;
3646
3647 switch (buf_size) {
3648 case 512:
3649 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3650 break;
3651 case 1024:
3652 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3653 break;
3654 case 2048:
3655 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3656 break;
3657 case 4096:
3658 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3659 break;
3660 default:
3661 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3662 }
3663
3664 return bd_size_type;
3665 }
3666
3667 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3668 {
3669 dma_addr_t dma = ring->desc_dma_addr;
3670 struct hnae3_queue *q = ring->tqp;
3671
3672 if (!HNAE3_IS_TX_RING(ring)) {
3673 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3674 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3675 (u32)((dma >> 31) >> 1));
3676
3677 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3678 hns3_buf_size2type(ring->buf_size));
3679 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3680 ring->desc_num / 8 - 1);
3681
3682 } else {
3683 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3684 (u32)dma);
3685 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3686 (u32)((dma >> 31) >> 1));
3687
3688 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3689 ring->desc_num / 8 - 1);
3690 }
3691 }
3692
3693 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3694 {
3695 struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3696 int i;
3697
3698 for (i = 0; i < HNAE3_MAX_TC; i++) {
3699 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3700 int j;
3701
3702 if (!tc_info->enable)
3703 continue;
3704
3705 for (j = 0; j < tc_info->tqp_count; j++) {
3706 struct hnae3_queue *q;
3707
3708 q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3709 hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3710 tc_info->tc);
3711 }
3712 }
3713 }
3714
3715 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3716 {
3717 struct hnae3_handle *h = priv->ae_handle;
3718 int ring_num = h->kinfo.num_tqps * 2;
3719 int i, j;
3720 int ret;
3721
3722 for (i = 0; i < ring_num; i++) {
3723 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3724 if (ret) {
3725 dev_err(priv->dev,
3726 "Alloc ring memory fail! ret=%d\n", ret);
3727 goto out_when_alloc_ring_memory;
3728 }
3729
3730 u64_stats_init(&priv->ring_data[i].ring->syncp);
3731 }
3732
3733 return 0;
3734
3735 out_when_alloc_ring_memory:
3736 for (j = i - 1; j >= 0; j--)
3737 hns3_fini_ring(priv->ring_data[j].ring);
3738
3739 return -ENOMEM;
3740 }
3741
3742 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3743 {
3744 struct hnae3_handle *h = priv->ae_handle;
3745 int i;
3746
3747 for (i = 0; i < h->kinfo.num_tqps; i++) {
3748 hns3_fini_ring(priv->ring_data[i].ring);
3749 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3750 }
3751 return 0;
3752 }
3753
3754
3755 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3756 {
3757 struct hns3_nic_priv *priv = netdev_priv(netdev);
3758 struct hnae3_handle *h = priv->ae_handle;
3759 u8 mac_addr_temp[ETH_ALEN];
3760 int ret = 0;
3761
3762 if (h->ae_algo->ops->get_mac_addr && init) {
3763 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3764 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3765 }
3766
3767
3768 if (!is_valid_ether_addr(netdev->dev_addr)) {
3769 eth_hw_addr_random(netdev);
3770 dev_warn(priv->dev, "using random MAC address %pM\n",
3771 netdev->dev_addr);
3772 }
3773
3774 if (h->ae_algo->ops->set_mac_addr)
3775 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3776
3777 return ret;
3778 }
3779
3780 static int hns3_init_phy(struct net_device *netdev)
3781 {
3782 struct hnae3_handle *h = hns3_get_handle(netdev);
3783 int ret = 0;
3784
3785 if (h->ae_algo->ops->mac_connect_phy)
3786 ret = h->ae_algo->ops->mac_connect_phy(h);
3787
3788 return ret;
3789 }
3790
3791 static void hns3_uninit_phy(struct net_device *netdev)
3792 {
3793 struct hnae3_handle *h = hns3_get_handle(netdev);
3794
3795 if (h->ae_algo->ops->mac_disconnect_phy)
3796 h->ae_algo->ops->mac_disconnect_phy(h);
3797 }
3798
3799 static int hns3_restore_fd_rules(struct net_device *netdev)
3800 {
3801 struct hnae3_handle *h = hns3_get_handle(netdev);
3802 int ret = 0;
3803
3804 if (h->ae_algo->ops->restore_fd_rules)
3805 ret = h->ae_algo->ops->restore_fd_rules(h);
3806
3807 return ret;
3808 }
3809
3810 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3811 {
3812 struct hnae3_handle *h = hns3_get_handle(netdev);
3813
3814 if (h->ae_algo->ops->del_all_fd_entries)
3815 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3816 }
3817
3818 static int hns3_client_start(struct hnae3_handle *handle)
3819 {
3820 if (!handle->ae_algo->ops->client_start)
3821 return 0;
3822
3823 return handle->ae_algo->ops->client_start(handle);
3824 }
3825
3826 static void hns3_client_stop(struct hnae3_handle *handle)
3827 {
3828 if (!handle->ae_algo->ops->client_stop)
3829 return;
3830
3831 handle->ae_algo->ops->client_stop(handle);
3832 }
3833
3834 static void hns3_info_show(struct hns3_nic_priv *priv)
3835 {
3836 struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3837
3838 dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3839 dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3840 dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3841 dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3842 dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3843 dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3844 dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3845 dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3846 dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3847 }
3848
3849 static int hns3_client_init(struct hnae3_handle *handle)
3850 {
3851 struct pci_dev *pdev = handle->pdev;
3852 u16 alloc_tqps, max_rss_size;
3853 struct hns3_nic_priv *priv;
3854 struct net_device *netdev;
3855 int ret;
3856
3857 handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3858 &max_rss_size);
3859 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3860 if (!netdev)
3861 return -ENOMEM;
3862
3863 priv = netdev_priv(netdev);
3864 priv->dev = &pdev->dev;
3865 priv->netdev = netdev;
3866 priv->ae_handle = handle;
3867 priv->tx_timeout_count = 0;
3868 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3869
3870 handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3871
3872 handle->kinfo.netdev = netdev;
3873 handle->priv = (void *)priv;
3874
3875 hns3_init_mac_addr(netdev, true);
3876
3877 hns3_set_default_feature(netdev);
3878
3879 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3880 netdev->priv_flags |= IFF_UNICAST_FLT;
3881 netdev->netdev_ops = &hns3_nic_netdev_ops;
3882 SET_NETDEV_DEV(netdev, &pdev->dev);
3883 hns3_ethtool_set_ops(netdev);
3884
3885
3886 netif_carrier_off(netdev);
3887
3888 ret = hns3_get_ring_config(priv);
3889 if (ret) {
3890 ret = -ENOMEM;
3891 goto out_get_ring_cfg;
3892 }
3893
3894 ret = hns3_nic_alloc_vector_data(priv);
3895 if (ret) {
3896 ret = -ENOMEM;
3897 goto out_alloc_vector_data;
3898 }
3899
3900 ret = hns3_nic_init_vector_data(priv);
3901 if (ret) {
3902 ret = -ENOMEM;
3903 goto out_init_vector_data;
3904 }
3905
3906 ret = hns3_init_all_ring(priv);
3907 if (ret) {
3908 ret = -ENOMEM;
3909 goto out_init_ring_data;
3910 }
3911
3912 ret = hns3_init_phy(netdev);
3913 if (ret)
3914 goto out_init_phy;
3915
3916 ret = register_netdev(netdev);
3917 if (ret) {
3918 dev_err(priv->dev, "probe register netdev fail!\n");
3919 goto out_reg_netdev_fail;
3920 }
3921
3922 ret = hns3_client_start(handle);
3923 if (ret) {
3924 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3925 goto out_client_start;
3926 }
3927
3928 hns3_dcbnl_setup(handle);
3929
3930 hns3_dbg_init(handle);
3931
3932
3933 netdev->max_mtu = HNS3_MAX_MTU;
3934
3935 set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3936
3937 if (netif_msg_drv(handle))
3938 hns3_info_show(priv);
3939
3940 return ret;
3941
3942 out_client_start:
3943 unregister_netdev(netdev);
3944 out_reg_netdev_fail:
3945 hns3_uninit_phy(netdev);
3946 out_init_phy:
3947 hns3_uninit_all_ring(priv);
3948 out_init_ring_data:
3949 hns3_nic_uninit_vector_data(priv);
3950 out_init_vector_data:
3951 hns3_nic_dealloc_vector_data(priv);
3952 out_alloc_vector_data:
3953 priv->ring_data = NULL;
3954 out_get_ring_cfg:
3955 priv->ae_handle = NULL;
3956 free_netdev(netdev);
3957 return ret;
3958 }
3959
3960 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3961 {
3962 struct net_device *netdev = handle->kinfo.netdev;
3963 struct hns3_nic_priv *priv = netdev_priv(netdev);
3964 int ret;
3965
3966 hns3_remove_hw_addr(netdev);
3967
3968 if (netdev->reg_state != NETREG_UNINITIALIZED)
3969 unregister_netdev(netdev);
3970
3971 hns3_client_stop(handle);
3972
3973 hns3_uninit_phy(netdev);
3974
3975 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3976 netdev_warn(netdev, "already uninitialized\n");
3977 goto out_netdev_free;
3978 }
3979
3980 hns3_del_all_fd_rules(netdev, true);
3981
3982 hns3_clear_all_ring(handle, true);
3983
3984 hns3_nic_uninit_vector_data(priv);
3985
3986 ret = hns3_nic_dealloc_vector_data(priv);
3987 if (ret)
3988 netdev_err(netdev, "dealloc vector error\n");
3989
3990 ret = hns3_uninit_all_ring(priv);
3991 if (ret)
3992 netdev_err(netdev, "uninit ring error\n");
3993
3994 hns3_put_ring_config(priv);
3995
3996 hns3_dbg_uninit(handle);
3997
3998 out_netdev_free:
3999 free_netdev(netdev);
4000 }
4001
4002 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4003 {
4004 struct net_device *netdev = handle->kinfo.netdev;
4005
4006 if (!netdev)
4007 return;
4008
4009 if (linkup) {
4010 netif_carrier_on(netdev);
4011 netif_tx_wake_all_queues(netdev);
4012 if (netif_msg_link(handle))
4013 netdev_info(netdev, "link up\n");
4014 } else {
4015 netif_carrier_off(netdev);
4016 netif_tx_stop_all_queues(netdev);
4017 if (netif_msg_link(handle))
4018 netdev_info(netdev, "link down\n");
4019 }
4020 }
4021
4022 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
4023 {
4024 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4025 struct net_device *ndev = kinfo->netdev;
4026
4027 if (tc > HNAE3_MAX_TC)
4028 return -EINVAL;
4029
4030 if (!ndev)
4031 return -ENODEV;
4032
4033 return hns3_nic_set_real_num_queue(ndev);
4034 }
4035
4036 static int hns3_recover_hw_addr(struct net_device *ndev)
4037 {
4038 struct netdev_hw_addr_list *list;
4039 struct netdev_hw_addr *ha, *tmp;
4040 int ret = 0;
4041
4042 netif_addr_lock_bh(ndev);
4043
4044 list = &ndev->uc;
4045 list_for_each_entry_safe(ha, tmp, &list->list, list) {
4046 ret = hns3_nic_uc_sync(ndev, ha->addr);
4047 if (ret)
4048 goto out;
4049 }
4050
4051
4052 list = &ndev->mc;
4053 list_for_each_entry_safe(ha, tmp, &list->list, list) {
4054 ret = hns3_nic_mc_sync(ndev, ha->addr);
4055 if (ret)
4056 goto out;
4057 }
4058
4059 out:
4060 netif_addr_unlock_bh(ndev);
4061 return ret;
4062 }
4063
4064 static void hns3_remove_hw_addr(struct net_device *netdev)
4065 {
4066 struct netdev_hw_addr_list *list;
4067 struct netdev_hw_addr *ha, *tmp;
4068
4069 hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4070
4071 netif_addr_lock_bh(netdev);
4072
4073 list = &netdev->uc;
4074 list_for_each_entry_safe(ha, tmp, &list->list, list)
4075 hns3_nic_uc_unsync(netdev, ha->addr);
4076
4077
4078 list = &netdev->mc;
4079 list_for_each_entry_safe(ha, tmp, &list->list, list)
4080 if (ha->refcount > 1)
4081 hns3_nic_mc_unsync(netdev, ha->addr);
4082
4083 netif_addr_unlock_bh(netdev);
4084 }
4085
4086 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4087 {
4088 while (ring->next_to_clean != ring->next_to_use) {
4089 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4090 hns3_free_buffer_detach(ring, ring->next_to_clean);
4091 ring_ptr_move_fw(ring, next_to_clean);
4092 }
4093 }
4094
4095 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4096 {
4097 struct hns3_desc_cb res_cbs;
4098 int ret;
4099
4100 while (ring->next_to_use != ring->next_to_clean) {
4101
4102
4103
4104
4105 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4106 ret = hns3_reserve_buffer_map(ring, &res_cbs);
4107 if (ret) {
4108 u64_stats_update_begin(&ring->syncp);
4109 ring->stats.sw_err_cnt++;
4110 u64_stats_update_end(&ring->syncp);
4111
4112
4113
4114 netdev_warn(ring->tqp->handle->kinfo.netdev,
4115 "reserve buffer map failed, ret = %d\n",
4116 ret);
4117 return ret;
4118 }
4119 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4120 }
4121 ring_ptr_move_fw(ring, next_to_use);
4122 }
4123
4124
4125 if (ring->skb) {
4126 dev_kfree_skb_any(ring->skb);
4127 ring->skb = NULL;
4128 ring->pending_buf = 0;
4129 }
4130
4131 return 0;
4132 }
4133
4134 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4135 {
4136 while (ring->next_to_use != ring->next_to_clean) {
4137
4138
4139
4140
4141 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4142 hns3_unmap_buffer(ring,
4143 &ring->desc_cb[ring->next_to_use]);
4144 ring->desc_cb[ring->next_to_use].dma = 0;
4145 }
4146
4147 ring_ptr_move_fw(ring, next_to_use);
4148 }
4149 }
4150
4151 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4152 {
4153 struct net_device *ndev = h->kinfo.netdev;
4154 struct hns3_nic_priv *priv = netdev_priv(ndev);
4155 u32 i;
4156
4157 for (i = 0; i < h->kinfo.num_tqps; i++) {
4158 struct hns3_enet_ring *ring;
4159
4160 ring = priv->ring_data[i].ring;
4161 hns3_clear_tx_ring(ring);
4162
4163 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4164
4165
4166
4167 if (force)
4168 hns3_force_clear_rx_ring(ring);
4169 else
4170 hns3_clear_rx_ring(ring);
4171 }
4172 }
4173
4174 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4175 {
4176 struct net_device *ndev = h->kinfo.netdev;
4177 struct hns3_nic_priv *priv = netdev_priv(ndev);
4178 struct hns3_enet_ring *rx_ring;
4179 int i, j;
4180 int ret;
4181
4182 for (i = 0; i < h->kinfo.num_tqps; i++) {
4183 ret = h->ae_algo->ops->reset_queue(h, i);
4184 if (ret)
4185 return ret;
4186
4187 hns3_init_ring_hw(priv->ring_data[i].ring);
4188
4189
4190
4191
4192 hns3_clear_tx_ring(priv->ring_data[i].ring);
4193 priv->ring_data[i].ring->next_to_clean = 0;
4194 priv->ring_data[i].ring->next_to_use = 0;
4195
4196 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4197 hns3_init_ring_hw(rx_ring);
4198 ret = hns3_clear_rx_ring(rx_ring);
4199 if (ret)
4200 return ret;
4201
4202
4203
4204
4205 for (j = 0; j < rx_ring->desc_num; j++)
4206 hns3_reuse_buffer(rx_ring, j);
4207
4208 rx_ring->next_to_clean = 0;
4209 rx_ring->next_to_use = 0;
4210 }
4211
4212 hns3_init_tx_ring_tc(priv);
4213
4214 return 0;
4215 }
4216
4217 static void hns3_store_coal(struct hns3_nic_priv *priv)
4218 {
4219
4220
4221
4222
4223 memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4224 sizeof(struct hns3_enet_coalesce));
4225 memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4226 sizeof(struct hns3_enet_coalesce));
4227 }
4228
4229 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4230 {
4231 u16 vector_num = priv->vector_num;
4232 int i;
4233
4234 for (i = 0; i < vector_num; i++) {
4235 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4236 sizeof(struct hns3_enet_coalesce));
4237 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4238 sizeof(struct hns3_enet_coalesce));
4239 }
4240 }
4241
4242 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4243 {
4244 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4245 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4246 struct net_device *ndev = kinfo->netdev;
4247 struct hns3_nic_priv *priv = netdev_priv(ndev);
4248
4249 if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4250 return 0;
4251
4252
4253
4254
4255
4256 if (hns3_dev_ongoing_func_reset(ae_dev)) {
4257 hns3_remove_hw_addr(ndev);
4258 hns3_del_all_fd_rules(ndev, false);
4259 }
4260
4261 if (!netif_running(ndev))
4262 return 0;
4263
4264 return hns3_nic_net_stop(ndev);
4265 }
4266
4267 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4268 {
4269 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4270 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4271 int ret = 0;
4272
4273 clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4274
4275 if (netif_running(kinfo->netdev)) {
4276 ret = hns3_nic_net_open(kinfo->netdev);
4277 if (ret) {
4278 set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4279 netdev_err(kinfo->netdev,
4280 "net up fail, ret=%d!\n", ret);
4281 return ret;
4282 }
4283 }
4284
4285 return ret;
4286 }
4287
4288 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4289 {
4290 struct net_device *netdev = handle->kinfo.netdev;
4291 struct hns3_nic_priv *priv = netdev_priv(netdev);
4292 int ret;
4293
4294
4295 netif_carrier_off(netdev);
4296
4297 ret = hns3_get_ring_config(priv);
4298 if (ret)
4299 return ret;
4300
4301 ret = hns3_nic_alloc_vector_data(priv);
4302 if (ret)
4303 goto err_put_ring;
4304
4305 hns3_restore_coal(priv);
4306
4307 ret = hns3_nic_init_vector_data(priv);
4308 if (ret)
4309 goto err_dealloc_vector;
4310
4311 ret = hns3_init_all_ring(priv);
4312 if (ret)
4313 goto err_uninit_vector;
4314
4315 ret = hns3_client_start(handle);
4316 if (ret) {
4317 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4318 goto err_uninit_ring;
4319 }
4320
4321 set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4322
4323 return ret;
4324
4325 err_uninit_ring:
4326 hns3_uninit_all_ring(priv);
4327 err_uninit_vector:
4328 hns3_nic_uninit_vector_data(priv);
4329 err_dealloc_vector:
4330 hns3_nic_dealloc_vector_data(priv);
4331 err_put_ring:
4332 hns3_put_ring_config(priv);
4333
4334 return ret;
4335 }
4336
4337 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4338 {
4339 struct net_device *netdev = handle->kinfo.netdev;
4340 bool vlan_filter_enable;
4341 int ret;
4342
4343 ret = hns3_init_mac_addr(netdev, false);
4344 if (ret)
4345 return ret;
4346
4347 ret = hns3_recover_hw_addr(netdev);
4348 if (ret)
4349 return ret;
4350
4351 ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4352 if (ret)
4353 return ret;
4354
4355 vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4356 hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4357
4358 if (handle->ae_algo->ops->restore_vlan_table)
4359 handle->ae_algo->ops->restore_vlan_table(handle);
4360
4361 return hns3_restore_fd_rules(netdev);
4362 }
4363
4364 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4365 {
4366 struct net_device *netdev = handle->kinfo.netdev;
4367 struct hns3_nic_priv *priv = netdev_priv(netdev);
4368 int ret;
4369
4370 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4371 netdev_warn(netdev, "already uninitialized\n");
4372 return 0;
4373 }
4374
4375 hns3_clear_all_ring(handle, true);
4376 hns3_reset_tx_queue(priv->ae_handle);
4377
4378 hns3_nic_uninit_vector_data(priv);
4379
4380 hns3_store_coal(priv);
4381
4382 ret = hns3_nic_dealloc_vector_data(priv);
4383 if (ret)
4384 netdev_err(netdev, "dealloc vector error\n");
4385
4386 ret = hns3_uninit_all_ring(priv);
4387 if (ret)
4388 netdev_err(netdev, "uninit ring error\n");
4389
4390 hns3_put_ring_config(priv);
4391
4392 return ret;
4393 }
4394
4395 static int hns3_reset_notify(struct hnae3_handle *handle,
4396 enum hnae3_reset_notify_type type)
4397 {
4398 int ret = 0;
4399
4400 switch (type) {
4401 case HNAE3_UP_CLIENT:
4402 ret = hns3_reset_notify_up_enet(handle);
4403 break;
4404 case HNAE3_DOWN_CLIENT:
4405 ret = hns3_reset_notify_down_enet(handle);
4406 break;
4407 case HNAE3_INIT_CLIENT:
4408 ret = hns3_reset_notify_init_enet(handle);
4409 break;
4410 case HNAE3_UNINIT_CLIENT:
4411 ret = hns3_reset_notify_uninit_enet(handle);
4412 break;
4413 case HNAE3_RESTORE_CLIENT:
4414 ret = hns3_reset_notify_restore_enet(handle);
4415 break;
4416 default:
4417 break;
4418 }
4419
4420 return ret;
4421 }
4422
4423 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4424 bool rxfh_configured)
4425 {
4426 int ret;
4427
4428 ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4429 rxfh_configured);
4430 if (ret) {
4431 dev_err(&handle->pdev->dev,
4432 "Change tqp num(%u) fail.\n", new_tqp_num);
4433 return ret;
4434 }
4435
4436 ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4437 if (ret)
4438 return ret;
4439
4440 ret = hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4441 if (ret)
4442 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4443
4444 return ret;
4445 }
4446
4447 int hns3_set_channels(struct net_device *netdev,
4448 struct ethtool_channels *ch)
4449 {
4450 struct hnae3_handle *h = hns3_get_handle(netdev);
4451 struct hnae3_knic_private_info *kinfo = &h->kinfo;
4452 bool rxfh_configured = netif_is_rxfh_configured(netdev);
4453 u32 new_tqp_num = ch->combined_count;
4454 u16 org_tqp_num;
4455 int ret;
4456
4457 if (hns3_nic_resetting(netdev))
4458 return -EBUSY;
4459
4460 if (ch->rx_count || ch->tx_count)
4461 return -EINVAL;
4462
4463 if (new_tqp_num > hns3_get_max_available_channels(h) ||
4464 new_tqp_num < 1) {
4465 dev_err(&netdev->dev,
4466 "Change tqps fail, the tqp range is from 1 to %d",
4467 hns3_get_max_available_channels(h));
4468 return -EINVAL;
4469 }
4470
4471 if (kinfo->rss_size == new_tqp_num)
4472 return 0;
4473
4474 netif_dbg(h, drv, netdev,
4475 "set channels: tqp_num=%u, rxfh=%d\n",
4476 new_tqp_num, rxfh_configured);
4477
4478 ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4479 if (ret)
4480 return ret;
4481
4482 ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4483 if (ret)
4484 return ret;
4485
4486 org_tqp_num = h->kinfo.num_tqps;
4487 ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4488 if (ret) {
4489 int ret1;
4490
4491 netdev_warn(netdev,
4492 "Change channels fail, revert to old value\n");
4493 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4494 if (ret1) {
4495 netdev_err(netdev,
4496 "revert to old channel fail\n");
4497 return ret1;
4498 }
4499
4500 return ret;
4501 }
4502
4503 return 0;
4504 }
4505
4506 static const struct hns3_hw_error_info hns3_hw_err[] = {
4507 { .type = HNAE3_PPU_POISON_ERROR,
4508 .msg = "PPU poison" },
4509 { .type = HNAE3_CMDQ_ECC_ERROR,
4510 .msg = "IMP CMDQ error" },
4511 { .type = HNAE3_IMP_RD_POISON_ERROR,
4512 .msg = "IMP RD poison" },
4513 };
4514
4515 static void hns3_process_hw_error(struct hnae3_handle *handle,
4516 enum hnae3_hw_error_type type)
4517 {
4518 int i;
4519
4520 for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4521 if (hns3_hw_err[i].type == type) {
4522 dev_err(&handle->pdev->dev, "Detected %s!\n",
4523 hns3_hw_err[i].msg);
4524 break;
4525 }
4526 }
4527 }
4528
4529 static const struct hnae3_client_ops client_ops = {
4530 .init_instance = hns3_client_init,
4531 .uninit_instance = hns3_client_uninit,
4532 .link_status_change = hns3_link_status_change,
4533 .setup_tc = hns3_client_setup_tc,
4534 .reset_notify = hns3_reset_notify,
4535 .process_hw_error = hns3_process_hw_error,
4536 };
4537
4538
4539
4540
4541
4542 static int __init hns3_init_module(void)
4543 {
4544 int ret;
4545
4546 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4547 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4548
4549 client.type = HNAE3_CLIENT_KNIC;
4550 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4551 hns3_driver_name);
4552
4553 client.ops = &client_ops;
4554
4555 INIT_LIST_HEAD(&client.node);
4556
4557 hns3_dbg_register_debugfs(hns3_driver_name);
4558
4559 ret = hnae3_register_client(&client);
4560 if (ret)
4561 goto err_reg_client;
4562
4563 ret = pci_register_driver(&hns3_driver);
4564 if (ret)
4565 goto err_reg_driver;
4566
4567 return ret;
4568
4569 err_reg_driver:
4570 hnae3_unregister_client(&client);
4571 err_reg_client:
4572 hns3_dbg_unregister_debugfs();
4573 return ret;
4574 }
4575 module_init(hns3_init_module);
4576
4577
4578
4579
4580
4581 static void __exit hns3_exit_module(void)
4582 {
4583 pci_unregister_driver(&hns3_driver);
4584 hnae3_unregister_client(&client);
4585 hns3_dbg_unregister_debugfs();
4586 }
4587 module_exit(hns3_exit_module);
4588
4589 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4590 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4591 MODULE_LICENSE("GPL");
4592 MODULE_ALIAS("pci:hns-nic");
4593 MODULE_VERSION(HNS3_MOD_VERSION);