root/include/linux/mfd/hi655x-pmic.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Device driver for regulators in hi655x IC
   4  *
   5  * Copyright (c) 2016 Hisilicon.
   6  *
   7  * Authors:
   8  * Chen Feng <puck.chen@hisilicon.com>
   9  * Fei  Wang <w.f@huawei.com>
  10  */
  11 
  12 #ifndef __HI655X_PMIC_H
  13 #define __HI655X_PMIC_H
  14 
  15 /* Hi655x registers are mapped to memory bus in 4 bytes stride */
  16 #define HI655X_STRIDE                   4
  17 #define HI655X_BUS_ADDR(x)              ((x) << 2)
  18 
  19 #define HI655X_BITS                     8
  20 
  21 #define HI655X_NR_IRQ                   32
  22 
  23 #define HI655X_IRQ_STAT_BASE            (0x003 << 2)
  24 #define HI655X_IRQ_MASK_BASE            (0x007 << 2)
  25 #define HI655X_ANA_IRQM_BASE            (0x1b5 << 2)
  26 #define HI655X_IRQ_ARRAY                4
  27 #define HI655X_IRQ_MASK                 0xFF
  28 #define HI655X_IRQ_CLR                  0xFF
  29 #define HI655X_VER_REG                  0x00
  30 
  31 #define PMU_VER_START                   0x10
  32 #define PMU_VER_END                     0x38
  33 
  34 #define RESERVE_INT                     7
  35 #define PWRON_D20R_INT                  6
  36 #define PWRON_D20F_INT                  5
  37 #define PWRON_D4SR_INT                  4
  38 #define VSYS_6P0_D200UR_INT             3
  39 #define VSYS_UV_D3R_INT                 2
  40 #define VSYS_2P5_R_INT                  1
  41 #define OTMP_D1R_INT                    0
  42 
  43 #define RESERVE_INT_MASK                BIT(RESERVE_INT)
  44 #define PWRON_D20R_INT_MASK             BIT(PWRON_D20R_INT)
  45 #define PWRON_D20F_INT_MASK             BIT(PWRON_D20F_INT)
  46 #define PWRON_D4SR_INT_MASK             BIT(PWRON_D4SR_INT)
  47 #define VSYS_6P0_D200UR_INT_MASK        BIT(VSYS_6P0_D200UR_INT)
  48 #define VSYS_UV_D3R_INT_MASK            BIT(VSYS_UV_D3R_INT)
  49 #define VSYS_2P5_R_INT_MASK             BIT(VSYS_2P5_R_INT)
  50 #define OTMP_D1R_INT_MASK               BIT(OTMP_D1R_INT)
  51 
  52 struct hi655x_pmic {
  53         struct resource *res;
  54         struct device *dev;
  55         struct regmap *regmap;
  56         int gpio;
  57         unsigned int ver;
  58         struct regmap_irq_chip_data *irq_data;
  59 };
  60 
  61 #endif