1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */
3
4 #ifndef _UAPI_SCC_H
5 #define _UAPI_SCC_H
6
7
8 /* selection of hardware types */
9
10 #define PA0HZP 0x00 /* hardware type for PA0HZP SCC card and compatible */
11 #define EAGLE 0x01 /* hardware type for EAGLE card */
12 #define PC100 0x02 /* hardware type for PC100 card */
13 #define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
14 #define DRSI 0x08 /* hardware type for DRSI PC*Packet card */
15 #define BAYCOM 0x10 /* hardware type for BayCom (U)SCC */
16
17 /* DEV ioctl() commands */
18
19 enum SCC_ioctl_cmds {
20 SIOCSCCRESERVED = SIOCDEVPRIVATE,
21 SIOCSCCCFG,
22 SIOCSCCINI,
23 SIOCSCCCHANINI,
24 SIOCSCCSMEM,
25 SIOCSCCGKISS,
26 SIOCSCCSKISS,
27 SIOCSCCGSTAT,
28 SIOCSCCCAL
29 };
30
31 /* Device parameter control (from WAMPES) */
32
33 enum L1_params {
34 PARAM_DATA,
35 PARAM_TXDELAY,
36 PARAM_PERSIST,
37 PARAM_SLOTTIME,
38 PARAM_TXTAIL,
39 PARAM_FULLDUP,
40 PARAM_SOFTDCD, /* was: PARAM_HW */
41 PARAM_MUTE, /* ??? */
42 PARAM_DTR,
43 PARAM_RTS,
44 PARAM_SPEED,
45 PARAM_ENDDELAY, /* ??? */
46 PARAM_GROUP,
47 PARAM_IDLE,
48 PARAM_MIN,
49 PARAM_MAXKEY,
50 PARAM_WAIT,
51 PARAM_MAXDEFER,
52 PARAM_TX,
53 PARAM_HWEVENT = 31,
54 PARAM_RETURN = 255 /* reset kiss mode */
55 };
56
57 /* fulldup parameter */
58
59 enum FULLDUP_modes {
60 KISS_DUPLEX_HALF, /* normal CSMA operation */
61 KISS_DUPLEX_FULL, /* fullduplex, key down trx after transmission */
62 KISS_DUPLEX_LINK, /* fullduplex, key down trx after 'idletime' sec */
63 KISS_DUPLEX_OPTIMA /* fullduplex, let the protocol layer control the hw */
64 };
65
66 /* misc. parameters */
67
68 #define TIMER_OFF 65535U /* to switch off timers */
69 #define NO_SUCH_PARAM 65534U /* param not implemented */
70
71 /* HWEVENT parameter */
72
73 enum HWEVENT_opts {
74 HWEV_DCD_ON,
75 HWEV_DCD_OFF,
76 HWEV_ALL_SENT
77 };
78
79 /* channel grouping */
80
81 #define RXGROUP 0100 /* if set, only tx when all channels clear */
82 #define TXGROUP 0200 /* if set, don't transmit simultaneously */
83
84 /* Tx/Rx clock sources */
85
86 enum CLOCK_sources {
87 CLK_DPLL, /* normal halfduplex operation */
88 CLK_EXTERNAL, /* external clocking (G3RUH/DF9IC modems) */
89 CLK_DIVIDER, /* Rx = DPLL, Tx = divider (fullduplex with */
90 /* modems without clock regeneration */
91 CLK_BRG /* experimental fullduplex mode with DPLL/BRG for */
92 /* MODEMs without clock recovery */
93 };
94
95 /* Tx state */
96
97 enum TX_state {
98 TXS_IDLE, /* Transmitter off, no data pending */
99 TXS_BUSY, /* waiting for permission to send / tailtime */
100 TXS_ACTIVE, /* Transmitter on, sending data */
101 TXS_NEWFRAME, /* reset CRC and send (next) frame */
102 TXS_IDLE2, /* Transmitter on, no data pending */
103 TXS_WAIT, /* Waiting for Mintime to expire */
104 TXS_TIMEOUT /* We had a transmission timeout */
105 };
106
107 typedef unsigned long io_port; /* type definition for an 'io port address' */
108
109 /* SCC statistical information */
110
111 struct scc_stat {
112 long rxints; /* Receiver interrupts */
113 long txints; /* Transmitter interrupts */
114 long exints; /* External/status interrupts */
115 long spints; /* Special receiver interrupts */
116
117 long txframes; /* Packets sent */
118 long rxframes; /* Number of Frames Actually Received */
119 long rxerrs; /* CRC Errors */
120 long txerrs; /* KISS errors */
121
122 unsigned int nospace; /* "Out of buffers" */
123 unsigned int rx_over; /* Receiver Overruns */
124 unsigned int tx_under; /* Transmitter Underruns */
125
126 unsigned int tx_state; /* Transmitter state */
127 int tx_queued; /* tx frames enqueued */
128
129 unsigned int maxqueue; /* allocated tx_buffers */
130 unsigned int bufsize; /* used buffersize */
131 };
132
133 struct scc_modem {
134 long speed; /* Line speed, bps */
135 char clocksrc; /* 0 = DPLL, 1 = external, 2 = divider */
136 char nrz; /* NRZ instead of NRZI */
137 };
138
139 struct scc_kiss_cmd {
140 int command; /* one of the KISS-Commands defined above */
141 unsigned param; /* KISS-Param */
142 };
143
144 struct scc_hw_config {
145 io_port data_a; /* data port channel A */
146 io_port ctrl_a; /* control port channel A */
147 io_port data_b; /* data port channel B */
148 io_port ctrl_b; /* control port channel B */
149 io_port vector_latch; /* INTACK-Latch (#) */
150 io_port special; /* special function port */
151
152 int irq; /* irq */
153 long clock; /* clock */
154 char option; /* command for function port */
155
156 char brand; /* hardware type */
157 char escc; /* use ext. features of a 8580/85180/85280 */
158 };
159
160 /* (#) only one INTACK latch allowed. */
161
162
163 struct scc_mem_config {
164 unsigned int dummy;
165 unsigned int bufsize;
166 };
167
168 struct scc_calibrate {
169 unsigned int time;
170 unsigned char pattern;
171 };
172
173 #endif /* _UAPI_SCC_H */