arch/powerpc/kernel/smp.c

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This source file includes following definitions.
smp_generic_cpu_bootable
smp_generic_kick_cpu
call_function_action
reschedule_action
tick_broadcast_ipi_action
nmi_ipi_action
smp_request_message_ipi
smp_muxed_ipi_set_message
smp_muxed_ipi_message_pass
smp_ipi_demux
smp_ipi_demux_relaxed
do_message_pass
smp_send_reschedule
arch_send_call_function_single_ipi
arch_send_call_function_ipi_mask
nmi_ipi_lock_start
nmi_ipi_lock
nmi_ipi_unlock
nmi_ipi_unlock_end
smp_handle_nmi_ipi
do_smp_send_nmi_ipi
__smp_send_nmi_ipi
smp_send_nmi_ipi
smp_send_safe_nmi_ipi
tick_broadcast
debugger_ipi_callback
smp_send_debugger_break
crash_send_ipi
nmi_stop_this_cpu
smp_send_stop
stop_this_cpu
smp_send_stop
smp_store_cpu_info
set_cpus_related
set_cpus_unrelated
parse_thread_groups
get_cpu_thread_group_start
init_cpu_l1_cache_map
init_big_cores
smp_prepare_cpus
smp_prepare_boot_cpu
generic_cpu_disable
generic_cpu_die
generic_set_cpu_dead
generic_set_cpu_up
generic_check_cpu_restart
is_cpu_dead
secondaries_inhibited
cpu_idle_thread_init
__cpu_up
cpu_to_core_id
cpu_core_index_of_thread
cpu_first_thread_of_core
cpu_to_l2cache
update_mask_by_l2
remove_cpu_from_masks
add_cpu_to_smallcore_masks
add_cpu_to_masks
start_secondary
setup_profiling_timer
powerpc_smt_flags
powerpc_shared_cache_flags
shared_cache_mask
smallcore_smt_mask
smp_cpus_done
__cpu_disable
__cpu_die
cpu_die
   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * SMP support for ppc.
   4  *
   5  * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
   6  * deal of code from the sparc and intel versions.
   7  *
   8  * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
   9  *
  10  * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
  11  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
  12  */
  13 
  14 #undef DEBUG
  15 
  16 #include <linux/kernel.h>
  17 #include <linux/export.h>
  18 #include <linux/sched/mm.h>
  19 #include <linux/sched/task_stack.h>
  20 #include <linux/sched/topology.h>
  21 #include <linux/smp.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/delay.h>
  24 #include <linux/init.h>
  25 #include <linux/spinlock.h>
  26 #include <linux/cache.h>
  27 #include <linux/err.h>
  28 #include <linux/device.h>
  29 #include <linux/cpu.h>
  30 #include <linux/notifier.h>
  31 #include <linux/topology.h>
  32 #include <linux/profile.h>
  33 #include <linux/processor.h>
  34 #include <linux/random.h>
  35 #include <linux/stackprotector.h>
  36 
  37 #include <asm/ptrace.h>
  38 #include <linux/atomic.h>
  39 #include <asm/irq.h>
  40 #include <asm/hw_irq.h>
  41 #include <asm/kvm_ppc.h>
  42 #include <asm/dbell.h>
  43 #include <asm/page.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/prom.h>
  46 #include <asm/smp.h>
  47 #include <asm/time.h>
  48 #include <asm/machdep.h>
  49 #include <asm/cputhreads.h>
  50 #include <asm/cputable.h>
  51 #include <asm/mpic.h>
  52 #include <asm/vdso_datapage.h>
  53 #ifdef CONFIG_PPC64
  54 #include <asm/paca.h>
  55 #endif
  56 #include <asm/vdso.h>
  57 #include <asm/debug.h>
  58 #include <asm/kexec.h>
  59 #include <asm/asm-prototypes.h>
  60 #include <asm/cpu_has_feature.h>
  61 #include <asm/ftrace.h>
  62 
  63 #ifdef DEBUG
  64 #include <asm/udbg.h>
  65 #define DBG(fmt...) udbg_printf(fmt)
  66 #else
  67 #define DBG(fmt...)
  68 #endif
  69 
  70 #ifdef CONFIG_HOTPLUG_CPU
  71 /* State of each CPU during hotplug phases */
  72 static DEFINE_PER_CPU(int, cpu_state) = { 0 };
  73 #endif
  74 
  75 struct task_struct *secondary_current;
  76 bool has_big_cores;
  77 
  78 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
  79 DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
  80 DEFINE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
  81 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
  82 
  83 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
  84 EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_map);
  85 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
  86 EXPORT_SYMBOL_GPL(has_big_cores);
  87 
  88 #define MAX_THREAD_LIST_SIZE    8
  89 #define THREAD_GROUP_SHARE_L1   1
  90 struct thread_groups {
  91         unsigned int property;
  92         unsigned int nr_groups;
  93         unsigned int threads_per_group;
  94         unsigned int thread_list[MAX_THREAD_LIST_SIZE];
  95 };
  96 
  97 /*
  98  * On big-cores system, cpu_l1_cache_map for each CPU corresponds to
  99  * the set its siblings that share the L1-cache.
 100  */
 101 DEFINE_PER_CPU(cpumask_var_t, cpu_l1_cache_map);
 102 
 103 /* SMP operations for this machine */
 104 struct smp_ops_t *smp_ops;
 105 
 106 /* Can't be static due to PowerMac hackery */
 107 volatile unsigned int cpu_callin_map[NR_CPUS];
 108 
 109 int smt_enabled_at_boot = 1;
 110 
 111 /*
 112  * Returns 1 if the specified cpu should be brought up during boot.
 113  * Used to inhibit booting threads if they've been disabled or
 114  * limited on the command line
 115  */
 116 int smp_generic_cpu_bootable(unsigned int nr)
 117 {
 118         /* Special case - we inhibit secondary thread startup
 119          * during boot if the user requests it.
 120          */
 121         if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
 122                 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
 123                         return 0;
 124                 if (smt_enabled_at_boot
 125                     && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
 126                         return 0;
 127         }
 128 
 129         return 1;
 130 }
 131 
 132 
 133 #ifdef CONFIG_PPC64
 134 int smp_generic_kick_cpu(int nr)
 135 {
 136         if (nr < 0 || nr >= nr_cpu_ids)
 137                 return -EINVAL;
 138 
 139         /*
 140          * The processor is currently spinning, waiting for the
 141          * cpu_start field to become non-zero After we set cpu_start,
 142          * the processor will continue on to secondary_start
 143          */
 144         if (!paca_ptrs[nr]->cpu_start) {
 145                 paca_ptrs[nr]->cpu_start = 1;
 146                 smp_mb();
 147                 return 0;
 148         }
 149 
 150 #ifdef CONFIG_HOTPLUG_CPU
 151         /*
 152          * Ok it's not there, so it might be soft-unplugged, let's
 153          * try to bring it back
 154          */
 155         generic_set_cpu_up(nr);
 156         smp_wmb();
 157         smp_send_reschedule(nr);
 158 #endif /* CONFIG_HOTPLUG_CPU */
 159 
 160         return 0;
 161 }
 162 #endif /* CONFIG_PPC64 */
 163 
 164 static irqreturn_t call_function_action(int irq, void *data)
 165 {
 166         generic_smp_call_function_interrupt();
 167         return IRQ_HANDLED;
 168 }
 169 
 170 static irqreturn_t reschedule_action(int irq, void *data)
 171 {
 172         scheduler_ipi();
 173         return IRQ_HANDLED;
 174 }
 175 
 176 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 177 static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
 178 {
 179         timer_broadcast_interrupt();
 180         return IRQ_HANDLED;
 181 }
 182 #endif
 183 
 184 #ifdef CONFIG_NMI_IPI
 185 static irqreturn_t nmi_ipi_action(int irq, void *data)
 186 {
 187         smp_handle_nmi_ipi(get_irq_regs());
 188         return IRQ_HANDLED;
 189 }
 190 #endif
 191 
 192 static irq_handler_t smp_ipi_action[] = {
 193         [PPC_MSG_CALL_FUNCTION] =  call_function_action,
 194         [PPC_MSG_RESCHEDULE] = reschedule_action,
 195 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 196         [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
 197 #endif
 198 #ifdef CONFIG_NMI_IPI
 199         [PPC_MSG_NMI_IPI] = nmi_ipi_action,
 200 #endif
 201 };
 202 
 203 /*
 204  * The NMI IPI is a fallback and not truly non-maskable. It is simpler
 205  * than going through the call function infrastructure, and strongly
 206  * serialized, so it is more appropriate for debugging.
 207  */
 208 const char *smp_ipi_name[] = {
 209         [PPC_MSG_CALL_FUNCTION] =  "ipi call function",
 210         [PPC_MSG_RESCHEDULE] = "ipi reschedule",
 211 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 212         [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
 213 #endif
 214 #ifdef CONFIG_NMI_IPI
 215         [PPC_MSG_NMI_IPI] = "nmi ipi",
 216 #endif
 217 };
 218 
 219 /* optional function to request ipi, for controllers with >= 4 ipis */
 220 int smp_request_message_ipi(int virq, int msg)
 221 {
 222         int err;
 223 
 224         if (msg < 0 || msg > PPC_MSG_NMI_IPI)
 225                 return -EINVAL;
 226 #ifndef CONFIG_NMI_IPI
 227         if (msg == PPC_MSG_NMI_IPI)
 228                 return 1;
 229 #endif
 230 
 231         err = request_irq(virq, smp_ipi_action[msg],
 232                           IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
 233                           smp_ipi_name[msg], NULL);
 234         WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
 235                 virq, smp_ipi_name[msg], err);
 236 
 237         return err;
 238 }
 239 
 240 #ifdef CONFIG_PPC_SMP_MUXED_IPI
 241 struct cpu_messages {
 242         long messages;                  /* current messages */
 243 };
 244 static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
 245 
 246 void smp_muxed_ipi_set_message(int cpu, int msg)
 247 {
 248         struct cpu_messages *info = &per_cpu(ipi_message, cpu);
 249         char *message = (char *)&info->messages;
 250 
 251         /*
 252          * Order previous accesses before accesses in the IPI handler.
 253          */
 254         smp_mb();
 255         message[msg] = 1;
 256 }
 257 
 258 void smp_muxed_ipi_message_pass(int cpu, int msg)
 259 {
 260         smp_muxed_ipi_set_message(cpu, msg);
 261 
 262         /*
 263          * cause_ipi functions are required to include a full barrier
 264          * before doing whatever causes the IPI.
 265          */
 266         smp_ops->cause_ipi(cpu);
 267 }
 268 
 269 #ifdef __BIG_ENDIAN__
 270 #define IPI_MESSAGE(A) (1uL << ((BITS_PER_LONG - 8) - 8 * (A)))
 271 #else
 272 #define IPI_MESSAGE(A) (1uL << (8 * (A)))
 273 #endif
 274 
 275 irqreturn_t smp_ipi_demux(void)
 276 {
 277         mb();   /* order any irq clear */
 278 
 279         return smp_ipi_demux_relaxed();
 280 }
 281 
 282 /* sync-free variant. Callers should ensure synchronization */
 283 irqreturn_t smp_ipi_demux_relaxed(void)
 284 {
 285         struct cpu_messages *info;
 286         unsigned long all;
 287 
 288         info = this_cpu_ptr(&ipi_message);
 289         do {
 290                 all = xchg(&info->messages, 0);
 291 #if defined(CONFIG_KVM_XICS) && defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
 292                 /*
 293                  * Must check for PPC_MSG_RM_HOST_ACTION messages
 294                  * before PPC_MSG_CALL_FUNCTION messages because when
 295                  * a VM is destroyed, we call kick_all_cpus_sync()
 296                  * to ensure that any pending PPC_MSG_RM_HOST_ACTION
 297                  * messages have completed before we free any VCPUs.
 298                  */
 299                 if (all & IPI_MESSAGE(PPC_MSG_RM_HOST_ACTION))
 300                         kvmppc_xics_ipi_action();
 301 #endif
 302                 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
 303                         generic_smp_call_function_interrupt();
 304                 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
 305                         scheduler_ipi();
 306 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 307                 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
 308                         timer_broadcast_interrupt();
 309 #endif
 310 #ifdef CONFIG_NMI_IPI
 311                 if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
 312                         nmi_ipi_action(0, NULL);
 313 #endif
 314         } while (info->messages);
 315 
 316         return IRQ_HANDLED;
 317 }
 318 #endif /* CONFIG_PPC_SMP_MUXED_IPI */
 319 
 320 static inline void do_message_pass(int cpu, int msg)
 321 {
 322         if (smp_ops->message_pass)
 323                 smp_ops->message_pass(cpu, msg);
 324 #ifdef CONFIG_PPC_SMP_MUXED_IPI
 325         else
 326                 smp_muxed_ipi_message_pass(cpu, msg);
 327 #endif
 328 }
 329 
 330 void smp_send_reschedule(int cpu)
 331 {
 332         if (likely(smp_ops))
 333                 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
 334 }
 335 EXPORT_SYMBOL_GPL(smp_send_reschedule);
 336 
 337 void arch_send_call_function_single_ipi(int cpu)
 338 {
 339         do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
 340 }
 341 
 342 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 343 {
 344         unsigned int cpu;
 345 
 346         for_each_cpu(cpu, mask)
 347                 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
 348 }
 349 
 350 #ifdef CONFIG_NMI_IPI
 351 
 352 /*
 353  * "NMI IPI" system.
 354  *
 355  * NMI IPIs may not be recoverable, so should not be used as ongoing part of
 356  * a running system. They can be used for crash, debug, halt/reboot, etc.
 357  *
 358  * The IPI call waits with interrupts disabled until all targets enter the
 359  * NMI handler, then returns. Subsequent IPIs can be issued before targets
 360  * have returned from their handlers, so there is no guarantee about
 361  * concurrency or re-entrancy.
 362  *
 363  * A new NMI can be issued before all targets exit the handler.
 364  *
 365  * The IPI call may time out without all targets entering the NMI handler.
 366  * In that case, there is some logic to recover (and ignore subsequent
 367  * NMI interrupts that may eventually be raised), but the platform interrupt
 368  * handler may not be able to distinguish this from other exception causes,
 369  * which may cause a crash.
 370  */
 371 
 372 static atomic_t __nmi_ipi_lock = ATOMIC_INIT(0);
 373 static struct cpumask nmi_ipi_pending_mask;
 374 static bool nmi_ipi_busy = false;
 375 static void (*nmi_ipi_function)(struct pt_regs *) = NULL;
 376 
 377 static void nmi_ipi_lock_start(unsigned long *flags)
 378 {
 379         raw_local_irq_save(*flags);
 380         hard_irq_disable();
 381         while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
 382                 raw_local_irq_restore(*flags);
 383                 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
 384                 raw_local_irq_save(*flags);
 385                 hard_irq_disable();
 386         }
 387 }
 388 
 389 static void nmi_ipi_lock(void)
 390 {
 391         while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
 392                 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
 393 }
 394 
 395 static void nmi_ipi_unlock(void)
 396 {
 397         smp_mb();
 398         WARN_ON(atomic_read(&__nmi_ipi_lock) != 1);
 399         atomic_set(&__nmi_ipi_lock, 0);
 400 }
 401 
 402 static void nmi_ipi_unlock_end(unsigned long *flags)
 403 {
 404         nmi_ipi_unlock();
 405         raw_local_irq_restore(*flags);
 406 }
 407 
 408 /*
 409  * Platform NMI handler calls this to ack
 410  */
 411 int smp_handle_nmi_ipi(struct pt_regs *regs)
 412 {
 413         void (*fn)(struct pt_regs *) = NULL;
 414         unsigned long flags;
 415         int me = raw_smp_processor_id();
 416         int ret = 0;
 417 
 418         /*
 419          * Unexpected NMIs are possible here because the interrupt may not
 420          * be able to distinguish NMI IPIs from other types of NMIs, or
 421          * because the caller may have timed out.
 422          */
 423         nmi_ipi_lock_start(&flags);
 424         if (cpumask_test_cpu(me, &nmi_ipi_pending_mask)) {
 425                 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
 426                 fn = READ_ONCE(nmi_ipi_function);
 427                 WARN_ON_ONCE(!fn);
 428                 ret = 1;
 429         }
 430         nmi_ipi_unlock_end(&flags);
 431 
 432         if (fn)
 433                 fn(regs);
 434 
 435         return ret;
 436 }
 437 
 438 static void do_smp_send_nmi_ipi(int cpu, bool safe)
 439 {
 440         if (!safe && smp_ops->cause_nmi_ipi && smp_ops->cause_nmi_ipi(cpu))
 441                 return;
 442 
 443         if (cpu >= 0) {
 444                 do_message_pass(cpu, PPC_MSG_NMI_IPI);
 445         } else {
 446                 int c;
 447 
 448                 for_each_online_cpu(c) {
 449                         if (c == raw_smp_processor_id())
 450                                 continue;
 451                         do_message_pass(c, PPC_MSG_NMI_IPI);
 452                 }
 453         }
 454 }
 455 
 456 /*
 457  * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
 458  * - fn is the target callback function.
 459  * - delay_us > 0 is the delay before giving up waiting for targets to
 460  *   begin executing the handler, == 0 specifies indefinite delay.
 461  */
 462 static int __smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *),
 463                                 u64 delay_us, bool safe)
 464 {
 465         unsigned long flags;
 466         int me = raw_smp_processor_id();
 467         int ret = 1;
 468 
 469         BUG_ON(cpu == me);
 470         BUG_ON(cpu < 0 && cpu != NMI_IPI_ALL_OTHERS);
 471 
 472         if (unlikely(!smp_ops))
 473                 return 0;
 474 
 475         nmi_ipi_lock_start(&flags);
 476         while (nmi_ipi_busy) {
 477                 nmi_ipi_unlock_end(&flags);
 478                 spin_until_cond(!nmi_ipi_busy);
 479                 nmi_ipi_lock_start(&flags);
 480         }
 481         nmi_ipi_busy = true;
 482         nmi_ipi_function = fn;
 483 
 484         WARN_ON_ONCE(!cpumask_empty(&nmi_ipi_pending_mask));
 485 
 486         if (cpu < 0) {
 487                 /* ALL_OTHERS */
 488                 cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
 489                 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
 490         } else {
 491                 cpumask_set_cpu(cpu, &nmi_ipi_pending_mask);
 492         }
 493 
 494         nmi_ipi_unlock();
 495 
 496         /* Interrupts remain hard disabled */
 497 
 498         do_smp_send_nmi_ipi(cpu, safe);
 499 
 500         nmi_ipi_lock();
 501         /* nmi_ipi_busy is set here, so unlock/lock is okay */
 502         while (!cpumask_empty(&nmi_ipi_pending_mask)) {
 503                 nmi_ipi_unlock();
 504                 udelay(1);
 505                 nmi_ipi_lock();
 506                 if (delay_us) {
 507                         delay_us--;
 508                         if (!delay_us)
 509                                 break;
 510                 }
 511         }
 512 
 513         if (!cpumask_empty(&nmi_ipi_pending_mask)) {
 514                 /* Timeout waiting for CPUs to call smp_handle_nmi_ipi */
 515                 ret = 0;
 516                 cpumask_clear(&nmi_ipi_pending_mask);
 517         }
 518 
 519         nmi_ipi_function = NULL;
 520         nmi_ipi_busy = false;
 521 
 522         nmi_ipi_unlock_end(&flags);
 523 
 524         return ret;
 525 }
 526 
 527 int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
 528 {
 529         return __smp_send_nmi_ipi(cpu, fn, delay_us, false);
 530 }
 531 
 532 int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
 533 {
 534         return __smp_send_nmi_ipi(cpu, fn, delay_us, true);
 535 }
 536 #endif /* CONFIG_NMI_IPI */
 537 
 538 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 539 void tick_broadcast(const struct cpumask *mask)
 540 {
 541         unsigned int cpu;
 542 
 543         for_each_cpu(cpu, mask)
 544                 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
 545 }
 546 #endif
 547 
 548 #ifdef CONFIG_DEBUGGER
 549 void debugger_ipi_callback(struct pt_regs *regs)
 550 {
 551         debugger_ipi(regs);
 552 }
 553 
 554 void smp_send_debugger_break(void)
 555 {
 556         smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, debugger_ipi_callback, 1000000);
 557 }
 558 #endif
 559 
 560 #ifdef CONFIG_KEXEC_CORE
 561 void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
 562 {
 563         int cpu;
 564 
 565         smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_ipi_callback, 1000000);
 566         if (kdump_in_progress() && crash_wake_offline) {
 567                 for_each_present_cpu(cpu) {
 568                         if (cpu_online(cpu))
 569                                 continue;
 570                         /*
 571                          * crash_ipi_callback will wait for
 572                          * all cpus, including offline CPUs.
 573                          * We don't care about nmi_ipi_function.
 574                          * Offline cpus will jump straight into
 575                          * crash_ipi_callback, we can skip the
 576                          * entire NMI dance and waiting for
 577                          * cpus to clear pending mask, etc.
 578                          */
 579                         do_smp_send_nmi_ipi(cpu, false);
 580                 }
 581         }
 582 }
 583 #endif
 584 
 585 #ifdef CONFIG_NMI_IPI
 586 static void nmi_stop_this_cpu(struct pt_regs *regs)
 587 {
 588         /*
 589          * IRQs are already hard disabled by the smp_handle_nmi_ipi.
 590          */
 591         spin_begin();
 592         while (1)
 593                 spin_cpu_relax();
 594 }
 595 
 596 void smp_send_stop(void)
 597 {
 598         smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, nmi_stop_this_cpu, 1000000);
 599 }
 600 
 601 #else /* CONFIG_NMI_IPI */
 602 
 603 static void stop_this_cpu(void *dummy)
 604 {
 605         hard_irq_disable();
 606         spin_begin();
 607         while (1)
 608                 spin_cpu_relax();
 609 }
 610 
 611 void smp_send_stop(void)
 612 {
 613         static bool stopped = false;
 614 
 615         /*
 616          * Prevent waiting on csd lock from a previous smp_send_stop.
 617          * This is racy, but in general callers try to do the right
 618          * thing and only fire off one smp_send_stop (e.g., see
 619          * kernel/panic.c)
 620          */
 621         if (stopped)
 622                 return;
 623 
 624         stopped = true;
 625 
 626         smp_call_function(stop_this_cpu, NULL, 0);
 627 }
 628 #endif /* CONFIG_NMI_IPI */
 629 
 630 struct task_struct *current_set[NR_CPUS];
 631 
 632 static void smp_store_cpu_info(int id)
 633 {
 634         per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
 635 #ifdef CONFIG_PPC_FSL_BOOK3E
 636         per_cpu(next_tlbcam_idx, id)
 637                 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
 638 #endif
 639 }
 640 
 641 /*
 642  * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
 643  * rather than just passing around the cpumask we pass around a function that
 644  * returns the that cpumask for the given CPU.
 645  */
 646 static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))
 647 {
 648         cpumask_set_cpu(i, get_cpumask(j));
 649         cpumask_set_cpu(j, get_cpumask(i));
 650 }
 651 
 652 #ifdef CONFIG_HOTPLUG_CPU
 653 static void set_cpus_unrelated(int i, int j,
 654                 struct cpumask *(*get_cpumask)(int))
 655 {
 656         cpumask_clear_cpu(i, get_cpumask(j));
 657         cpumask_clear_cpu(j, get_cpumask(i));
 658 }
 659 #endif
 660 
 661 /*
 662  * parse_thread_groups: Parses the "ibm,thread-groups" device tree
 663  *                      property for the CPU device node @dn and stores
 664  *                      the parsed output in the thread_groups
 665  *                      structure @tg if the ibm,thread-groups[0]
 666  *                      matches @property.
 667  *
 668  * @dn: The device node of the CPU device.
 669  * @tg: Pointer to a thread group structure into which the parsed
 670  *      output of "ibm,thread-groups" is stored.
 671  * @property: The property of the thread-group that the caller is
 672  *            interested in.
 673  *
 674  * ibm,thread-groups[0..N-1] array defines which group of threads in
 675  * the CPU-device node can be grouped together based on the property.
 676  *
 677  * ibm,thread-groups[0] tells us the property based on which the
 678  * threads are being grouped together. If this value is 1, it implies
 679  * that the threads in the same group share L1, translation cache.
 680  *
 681  * ibm,thread-groups[1] tells us how many such thread groups exist.
 682  *
 683  * ibm,thread-groups[2] tells us the number of threads in each such
 684  * group.
 685  *
 686  * ibm,thread-groups[3..N-1] is the list of threads identified by
 687  * "ibm,ppc-interrupt-server#s" arranged as per their membership in
 688  * the grouping.
 689  *
 690  * Example: If ibm,thread-groups = [1,2,4,5,6,7,8,9,10,11,12] it
 691  * implies that there are 2 groups of 4 threads each, where each group
 692  * of threads share L1, translation cache.
 693  *
 694  * The "ibm,ppc-interrupt-server#s" of the first group is {5,6,7,8}
 695  * and the "ibm,ppc-interrupt-server#s" of the second group is {9, 10,
 696  * 11, 12} structure
 697  *
 698  * Returns 0 on success, -EINVAL if the property does not exist,
 699  * -ENODATA if property does not have a value, and -EOVERFLOW if the
 700  * property data isn't large enough.
 701  */
 702 static int parse_thread_groups(struct device_node *dn,
 703                                struct thread_groups *tg,
 704                                unsigned int property)
 705 {
 706         int i;
 707         u32 thread_group_array[3 + MAX_THREAD_LIST_SIZE];
 708         u32 *thread_list;
 709         size_t total_threads;
 710         int ret;
 711 
 712         ret = of_property_read_u32_array(dn, "ibm,thread-groups",
 713                                          thread_group_array, 3);
 714         if (ret)
 715                 return ret;
 716 
 717         tg->property = thread_group_array[0];
 718         tg->nr_groups = thread_group_array[1];
 719         tg->threads_per_group = thread_group_array[2];
 720         if (tg->property != property ||
 721             tg->nr_groups < 1 ||
 722             tg->threads_per_group < 1)
 723                 return -ENODATA;
 724 
 725         total_threads = tg->nr_groups * tg->threads_per_group;
 726 
 727         ret = of_property_read_u32_array(dn, "ibm,thread-groups",
 728                                          thread_group_array,
 729                                          3 + total_threads);
 730         if (ret)
 731                 return ret;
 732 
 733         thread_list = &thread_group_array[3];
 734 
 735         for (i = 0 ; i < total_threads; i++)
 736                 tg->thread_list[i] = thread_list[i];
 737 
 738         return 0;
 739 }
 740 
 741 /*
 742  * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
 743  *                              that @cpu belongs to.
 744  *
 745  * @cpu : The logical CPU whose thread group is being searched.
 746  * @tg : The thread-group structure of the CPU node which @cpu belongs
 747  *       to.
 748  *
 749  * Returns the index to tg->thread_list that points to the the start
 750  * of the thread_group that @cpu belongs to.
 751  *
 752  * Returns -1 if cpu doesn't belong to any of the groups pointed to by
 753  * tg->thread_list.
 754  */
 755 static int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
 756 {
 757         int hw_cpu_id = get_hard_smp_processor_id(cpu);
 758         int i, j;
 759 
 760         for (i = 0; i < tg->nr_groups; i++) {
 761                 int group_start = i * tg->threads_per_group;
 762 
 763                 for (j = 0; j < tg->threads_per_group; j++) {
 764                         int idx = group_start + j;
 765 
 766                         if (tg->thread_list[idx] == hw_cpu_id)
 767                                 return group_start;
 768                 }
 769         }
 770 
 771         return -1;
 772 }
 773 
 774 static int init_cpu_l1_cache_map(int cpu)
 775 
 776 {
 777         struct device_node *dn = of_get_cpu_node(cpu, NULL);
 778         struct thread_groups tg = {.property = 0,
 779                                    .nr_groups = 0,
 780                                    .threads_per_group = 0};
 781         int first_thread = cpu_first_thread_sibling(cpu);
 782         int i, cpu_group_start = -1, err = 0;
 783 
 784         if (!dn)
 785                 return -ENODATA;
 786 
 787         err = parse_thread_groups(dn, &tg, THREAD_GROUP_SHARE_L1);
 788         if (err)
 789                 goto out;
 790 
 791         zalloc_cpumask_var_node(&per_cpu(cpu_l1_cache_map, cpu),
 792                                 GFP_KERNEL,
 793                                 cpu_to_node(cpu));
 794 
 795         cpu_group_start = get_cpu_thread_group_start(cpu, &tg);
 796 
 797         if (unlikely(cpu_group_start == -1)) {
 798                 WARN_ON_ONCE(1);
 799                 err = -ENODATA;
 800                 goto out;
 801         }
 802 
 803         for (i = first_thread; i < first_thread + threads_per_core; i++) {
 804                 int i_group_start = get_cpu_thread_group_start(i, &tg);
 805 
 806                 if (unlikely(i_group_start == -1)) {
 807                         WARN_ON_ONCE(1);
 808                         err = -ENODATA;
 809                         goto out;
 810                 }
 811 
 812                 if (i_group_start == cpu_group_start)
 813                         cpumask_set_cpu(i, per_cpu(cpu_l1_cache_map, cpu));
 814         }
 815 
 816 out:
 817         of_node_put(dn);
 818         return err;
 819 }
 820 
 821 static int init_big_cores(void)
 822 {
 823         int cpu;
 824 
 825         for_each_possible_cpu(cpu) {
 826                 int err = init_cpu_l1_cache_map(cpu);
 827 
 828                 if (err)
 829                         return err;
 830 
 831                 zalloc_cpumask_var_node(&per_cpu(cpu_smallcore_map, cpu),
 832                                         GFP_KERNEL,
 833                                         cpu_to_node(cpu));
 834         }
 835 
 836         has_big_cores = true;
 837         return 0;
 838 }
 839 
 840 void __init smp_prepare_cpus(unsigned int max_cpus)
 841 {
 842         unsigned int cpu;
 843 
 844         DBG("smp_prepare_cpus\n");
 845 
 846         /* 
 847          * setup_cpu may need to be called on the boot cpu. We havent
 848          * spun any cpus up but lets be paranoid.
 849          */
 850         BUG_ON(boot_cpuid != smp_processor_id());
 851 
 852         /* Fixup boot cpu */
 853         smp_store_cpu_info(boot_cpuid);
 854         cpu_callin_map[boot_cpuid] = 1;
 855 
 856         for_each_possible_cpu(cpu) {
 857                 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
 858                                         GFP_KERNEL, cpu_to_node(cpu));
 859                 zalloc_cpumask_var_node(&per_cpu(cpu_l2_cache_map, cpu),
 860                                         GFP_KERNEL, cpu_to_node(cpu));
 861                 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
 862                                         GFP_KERNEL, cpu_to_node(cpu));
 863                 /*
 864                  * numa_node_id() works after this.
 865                  */
 866                 if (cpu_present(cpu)) {
 867                         set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
 868                         set_cpu_numa_mem(cpu,
 869                                 local_memory_node(numa_cpu_lookup_table[cpu]));
 870                 }
 871         }
 872 
 873         /* Init the cpumasks so the boot CPU is related to itself */
 874         cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
 875         cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
 876         cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
 877 
 878         init_big_cores();
 879         if (has_big_cores) {
 880                 cpumask_set_cpu(boot_cpuid,
 881                                 cpu_smallcore_mask(boot_cpuid));
 882         }
 883 
 884         if (smp_ops && smp_ops->probe)
 885                 smp_ops->probe();
 886 }
 887 
 888 void smp_prepare_boot_cpu(void)
 889 {
 890         BUG_ON(smp_processor_id() != boot_cpuid);
 891 #ifdef CONFIG_PPC64
 892         paca_ptrs[boot_cpuid]->__current = current;
 893 #endif
 894         set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
 895         current_set[boot_cpuid] = current;
 896 }
 897 
 898 #ifdef CONFIG_HOTPLUG_CPU
 899 
 900 int generic_cpu_disable(void)
 901 {
 902         unsigned int cpu = smp_processor_id();
 903 
 904         if (cpu == boot_cpuid)
 905                 return -EBUSY;
 906 
 907         set_cpu_online(cpu, false);
 908 #ifdef CONFIG_PPC64
 909         vdso_data->processorCount--;
 910 #endif
 911         /* Update affinity of all IRQs previously aimed at this CPU */
 912         irq_migrate_all_off_this_cpu();
 913 
 914         /*
 915          * Depending on the details of the interrupt controller, it's possible
 916          * that one of the interrupts we just migrated away from this CPU is
 917          * actually already pending on this CPU. If we leave it in that state
 918          * the interrupt will never be EOI'ed, and will never fire again. So
 919          * temporarily enable interrupts here, to allow any pending interrupt to
 920          * be received (and EOI'ed), before we take this CPU offline.
 921          */
 922         local_irq_enable();
 923         mdelay(1);
 924         local_irq_disable();
 925 
 926         return 0;
 927 }
 928 
 929 void generic_cpu_die(unsigned int cpu)
 930 {
 931         int i;
 932 
 933         for (i = 0; i < 100; i++) {
 934                 smp_rmb();
 935                 if (is_cpu_dead(cpu))
 936                         return;
 937                 msleep(100);
 938         }
 939         printk(KERN_ERR "CPU%d didn't die...\n", cpu);
 940 }
 941 
 942 void generic_set_cpu_dead(unsigned int cpu)
 943 {
 944         per_cpu(cpu_state, cpu) = CPU_DEAD;
 945 }
 946 
 947 /*
 948  * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
 949  * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
 950  * which makes the delay in generic_cpu_die() not happen.
 951  */
 952 void generic_set_cpu_up(unsigned int cpu)
 953 {
 954         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 955 }
 956 
 957 int generic_check_cpu_restart(unsigned int cpu)
 958 {
 959         return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
 960 }
 961 
 962 int is_cpu_dead(unsigned int cpu)
 963 {
 964         return per_cpu(cpu_state, cpu) == CPU_DEAD;
 965 }
 966 
 967 static bool secondaries_inhibited(void)
 968 {
 969         return kvm_hv_mode_active();
 970 }
 971 
 972 #else /* HOTPLUG_CPU */
 973 
 974 #define secondaries_inhibited()         0
 975 
 976 #endif
 977 
 978 static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
 979 {
 980 #ifdef CONFIG_PPC64
 981         paca_ptrs[cpu]->__current = idle;
 982         paca_ptrs[cpu]->kstack = (unsigned long)task_stack_page(idle) +
 983                                  THREAD_SIZE - STACK_FRAME_OVERHEAD;
 984 #endif
 985         idle->cpu = cpu;
 986         secondary_current = current_set[cpu] = idle;
 987 }
 988 
 989 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 990 {
 991         int rc, c;
 992 
 993         /*
 994          * Don't allow secondary threads to come online if inhibited
 995          */
 996         if (threads_per_core > 1 && secondaries_inhibited() &&
 997             cpu_thread_in_subcore(cpu))
 998                 return -EBUSY;
 999 
1000         if (smp_ops == NULL ||
1001             (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
1002                 return -EINVAL;
1003 
1004         cpu_idle_thread_init(cpu, tidle);
1005 
1006         /*
1007          * The platform might need to allocate resources prior to bringing
1008          * up the CPU
1009          */
1010         if (smp_ops->prepare_cpu) {
1011                 rc = smp_ops->prepare_cpu(cpu);
1012                 if (rc)
1013                         return rc;
1014         }
1015 
1016         /* Make sure callin-map entry is 0 (can be leftover a CPU
1017          * hotplug
1018          */
1019         cpu_callin_map[cpu] = 0;
1020 
1021         /* The information for processor bringup must
1022          * be written out to main store before we release
1023          * the processor.
1024          */
1025         smp_mb();
1026 
1027         /* wake up cpus */
1028         DBG("smp: kicking cpu %d\n", cpu);
1029         rc = smp_ops->kick_cpu(cpu);
1030         if (rc) {
1031                 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
1032                 return rc;
1033         }
1034 
1035         /*
1036          * wait to see if the cpu made a callin (is actually up).
1037          * use this value that I found through experimentation.
1038          * -- Cort
1039          */
1040         if (system_state < SYSTEM_RUNNING)
1041                 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
1042                         udelay(100);
1043 #ifdef CONFIG_HOTPLUG_CPU
1044         else
1045                 /*
1046                  * CPUs can take much longer to come up in the
1047                  * hotplug case.  Wait five seconds.
1048                  */
1049                 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
1050                         msleep(1);
1051 #endif
1052 
1053         if (!cpu_callin_map[cpu]) {
1054                 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
1055                 return -ENOENT;
1056         }
1057 
1058         DBG("Processor %u found.\n", cpu);
1059 
1060         if (smp_ops->give_timebase)
1061                 smp_ops->give_timebase();
1062 
1063         /* Wait until cpu puts itself in the online & active maps */
1064         spin_until_cond(cpu_online(cpu));
1065 
1066         return 0;
1067 }
1068 
1069 /* Return the value of the reg property corresponding to the given
1070  * logical cpu.
1071  */
1072 int cpu_to_core_id(int cpu)
1073 {
1074         struct device_node *np;
1075         const __be32 *reg;
1076         int id = -1;
1077 
1078         np = of_get_cpu_node(cpu, NULL);
1079         if (!np)
1080                 goto out;
1081 
1082         reg = of_get_property(np, "reg", NULL);
1083         if (!reg)
1084                 goto out;
1085 
1086         id = be32_to_cpup(reg);
1087 out:
1088         of_node_put(np);
1089         return id;
1090 }
1091 EXPORT_SYMBOL_GPL(cpu_to_core_id);
1092 
1093 /* Helper routines for cpu to core mapping */
1094 int cpu_core_index_of_thread(int cpu)
1095 {
1096         return cpu >> threads_shift;
1097 }
1098 EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
1099 
1100 int cpu_first_thread_of_core(int core)
1101 {
1102         return core << threads_shift;
1103 }
1104 EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
1105 
1106 /* Must be called when no change can occur to cpu_present_mask,
1107  * i.e. during cpu online or offline.
1108  */
1109 static struct device_node *cpu_to_l2cache(int cpu)
1110 {
1111         struct device_node *np;
1112         struct device_node *cache;
1113 
1114         if (!cpu_present(cpu))
1115                 return NULL;
1116 
1117         np = of_get_cpu_node(cpu, NULL);
1118         if (np == NULL)
1119                 return NULL;
1120 
1121         cache = of_find_next_cache_node(np);
1122 
1123         of_node_put(np);
1124 
1125         return cache;
1126 }
1127 
1128 static bool update_mask_by_l2(int cpu, struct cpumask *(*mask_fn)(int))
1129 {
1130         struct device_node *l2_cache, *np;
1131         int i;
1132 
1133         l2_cache = cpu_to_l2cache(cpu);
1134         if (!l2_cache)
1135                 return false;
1136 
1137         for_each_cpu(i, cpu_online_mask) {
1138                 /*
1139                  * when updating the marks the current CPU has not been marked
1140                  * online, but we need to update the cache masks
1141                  */
1142                 np = cpu_to_l2cache(i);
1143                 if (!np)
1144                         continue;
1145 
1146                 if (np == l2_cache)
1147                         set_cpus_related(cpu, i, mask_fn);
1148 
1149                 of_node_put(np);
1150         }
1151         of_node_put(l2_cache);
1152 
1153         return true;
1154 }
1155 
1156 #ifdef CONFIG_HOTPLUG_CPU
1157 static void remove_cpu_from_masks(int cpu)
1158 {
1159         int i;
1160 
1161         /* NB: cpu_core_mask is a superset of the others */
1162         for_each_cpu(i, cpu_core_mask(cpu)) {
1163                 set_cpus_unrelated(cpu, i, cpu_core_mask);
1164                 set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
1165                 set_cpus_unrelated(cpu, i, cpu_sibling_mask);
1166                 if (has_big_cores)
1167                         set_cpus_unrelated(cpu, i, cpu_smallcore_mask);
1168         }
1169 }
1170 #endif
1171 
1172 static inline void add_cpu_to_smallcore_masks(int cpu)
1173 {
1174         struct cpumask *this_l1_cache_map = per_cpu(cpu_l1_cache_map, cpu);
1175         int i, first_thread = cpu_first_thread_sibling(cpu);
1176 
1177         if (!has_big_cores)
1178                 return;
1179 
1180         cpumask_set_cpu(cpu, cpu_smallcore_mask(cpu));
1181 
1182         for (i = first_thread; i < first_thread + threads_per_core; i++) {
1183                 if (cpu_online(i) && cpumask_test_cpu(i, this_l1_cache_map))
1184                         set_cpus_related(i, cpu, cpu_smallcore_mask);
1185         }
1186 }
1187 
1188 static void add_cpu_to_masks(int cpu)
1189 {
1190         int first_thread = cpu_first_thread_sibling(cpu);
1191         int chipid = cpu_to_chip_id(cpu);
1192         int i;
1193 
1194         /*
1195          * This CPU will not be in the online mask yet so we need to manually
1196          * add it to it's own thread sibling mask.
1197          */
1198         cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
1199 
1200         for (i = first_thread; i < first_thread + threads_per_core; i++)
1201                 if (cpu_online(i))
1202                         set_cpus_related(i, cpu, cpu_sibling_mask);
1203 
1204         add_cpu_to_smallcore_masks(cpu);
1205         /*
1206          * Copy the thread sibling mask into the cache sibling mask
1207          * and mark any CPUs that share an L2 with this CPU.
1208          */
1209         for_each_cpu(i, cpu_sibling_mask(cpu))
1210                 set_cpus_related(cpu, i, cpu_l2_cache_mask);
1211         update_mask_by_l2(cpu, cpu_l2_cache_mask);
1212 
1213         /*
1214          * Copy the cache sibling mask into core sibling mask and mark
1215          * any CPUs on the same chip as this CPU.
1216          */
1217         for_each_cpu(i, cpu_l2_cache_mask(cpu))
1218                 set_cpus_related(cpu, i, cpu_core_mask);
1219 
1220         if (chipid == -1)
1221                 return;
1222 
1223         for_each_cpu(i, cpu_online_mask)
1224                 if (cpu_to_chip_id(i) == chipid)
1225                         set_cpus_related(cpu, i, cpu_core_mask);
1226 }
1227 
1228 static bool shared_caches;
1229 
1230 /* Activate a secondary processor. */
1231 void start_secondary(void *unused)
1232 {
1233         unsigned int cpu = smp_processor_id();
1234         struct cpumask *(*sibling_mask)(int) = cpu_sibling_mask;
1235 
1236         mmgrab(&init_mm);
1237         current->active_mm = &init_mm;
1238 
1239         smp_store_cpu_info(cpu);
1240         set_dec(tb_ticks_per_jiffy);
1241         preempt_disable();
1242         cpu_callin_map[cpu] = 1;
1243 
1244         if (smp_ops->setup_cpu)
1245                 smp_ops->setup_cpu(cpu);
1246         if (smp_ops->take_timebase)
1247                 smp_ops->take_timebase();
1248 
1249         secondary_cpu_time_init();
1250 
1251 #ifdef CONFIG_PPC64
1252         if (system_state == SYSTEM_RUNNING)
1253                 vdso_data->processorCount++;
1254 
1255         vdso_getcpu_init();
1256 #endif
1257         /* Update topology CPU masks */
1258         add_cpu_to_masks(cpu);
1259 
1260         if (has_big_cores)
1261                 sibling_mask = cpu_smallcore_mask;
1262         /*
1263          * Check for any shared caches. Note that this must be done on a
1264          * per-core basis because one core in the pair might be disabled.
1265          */
1266         if (!cpumask_equal(cpu_l2_cache_mask(cpu), sibling_mask(cpu)))
1267                 shared_caches = true;
1268 
1269         set_numa_node(numa_cpu_lookup_table[cpu]);
1270         set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));
1271 
1272         smp_wmb();
1273         notify_cpu_starting(cpu);
1274         set_cpu_online(cpu, true);
1275 
1276         boot_init_stack_canary();
1277 
1278         local_irq_enable();
1279 
1280         /* We can enable ftrace for secondary cpus now */
1281         this_cpu_enable_ftrace();
1282 
1283         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1284 
1285         BUG();
1286 }
1287 
1288 int setup_profiling_timer(unsigned int multiplier)
1289 {
1290         return 0;
1291 }
1292 
1293 #ifdef CONFIG_SCHED_SMT
1294 /* cpumask of CPUs with asymetric SMT dependancy */
1295 static int powerpc_smt_flags(void)
1296 {
1297         int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
1298 
1299         if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
1300                 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
1301                 flags |= SD_ASYM_PACKING;
1302         }
1303         return flags;
1304 }
1305 #endif
1306 
1307 static struct sched_domain_topology_level powerpc_topology[] = {
1308 #ifdef CONFIG_SCHED_SMT
1309         { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1310 #endif
1311         { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1312         { NULL, },
1313 };
1314 
1315 /*
1316  * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
1317  * This topology makes it *much* cheaper to migrate tasks between adjacent cores
1318  * since the migrated task remains cache hot. We want to take advantage of this
1319  * at the scheduler level so an extra topology level is required.
1320  */
1321 static int powerpc_shared_cache_flags(void)
1322 {
1323         return SD_SHARE_PKG_RESOURCES;
1324 }
1325 
1326 /*
1327  * We can't just pass cpu_l2_cache_mask() directly because
1328  * returns a non-const pointer and the compiler barfs on that.
1329  */
1330 static const struct cpumask *shared_cache_mask(int cpu)
1331 {
1332         return cpu_l2_cache_mask(cpu);
1333 }
1334 
1335 #ifdef CONFIG_SCHED_SMT
1336 static const struct cpumask *smallcore_smt_mask(int cpu)
1337 {
1338         return cpu_smallcore_mask(cpu);
1339 }
1340 #endif
1341 
1342 static struct sched_domain_topology_level power9_topology[] = {
1343 #ifdef CONFIG_SCHED_SMT
1344         { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1345 #endif
1346         { shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
1347         { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1348         { NULL, },
1349 };
1350 
1351 void __init smp_cpus_done(unsigned int max_cpus)
1352 {
1353         /*
1354          * We are running pinned to the boot CPU, see rest_init().
1355          */
1356         if (smp_ops && smp_ops->setup_cpu)
1357                 smp_ops->setup_cpu(boot_cpuid);
1358 
1359         if (smp_ops && smp_ops->bringup_done)
1360                 smp_ops->bringup_done();
1361 
1362         /*
1363          * On a shared LPAR, associativity needs to be requested.
1364          * Hence, get numa topology before dumping cpu topology
1365          */
1366         shared_proc_topology_init();
1367         dump_numa_cpu_topology();
1368 
1369 #ifdef CONFIG_SCHED_SMT
1370         if (has_big_cores) {
1371                 pr_info("Using small cores at SMT level\n");
1372                 power9_topology[0].mask = smallcore_smt_mask;
1373                 powerpc_topology[0].mask = smallcore_smt_mask;
1374         }
1375 #endif
1376         /*
1377          * If any CPU detects that it's sharing a cache with another CPU then
1378          * use the deeper topology that is aware of this sharing.
1379          */
1380         if (shared_caches) {
1381                 pr_info("Using shared cache scheduler topology\n");
1382                 set_sched_topology(power9_topology);
1383         } else {
1384                 pr_info("Using standard scheduler topology\n");
1385                 set_sched_topology(powerpc_topology);
1386         }
1387 }
1388 
1389 #ifdef CONFIG_HOTPLUG_CPU
1390 int __cpu_disable(void)
1391 {
1392         int cpu = smp_processor_id();
1393         int err;
1394 
1395         if (!smp_ops->cpu_disable)
1396                 return -ENOSYS;
1397 
1398         this_cpu_disable_ftrace();
1399 
1400         err = smp_ops->cpu_disable();
1401         if (err)
1402                 return err;
1403 
1404         /* Update sibling maps */
1405         remove_cpu_from_masks(cpu);
1406 
1407         return 0;
1408 }
1409 
1410 void __cpu_die(unsigned int cpu)
1411 {
1412         if (smp_ops->cpu_die)
1413                 smp_ops->cpu_die(cpu);
1414 }
1415 
1416 void cpu_die(void)
1417 {
1418         /*
1419          * Disable on the down path. This will be re-enabled by
1420          * start_secondary() via start_secondary_resume() below
1421          */
1422         this_cpu_disable_ftrace();
1423 
1424         if (ppc_md.cpu_die)
1425                 ppc_md.cpu_die();
1426 
1427         /* If we return, we re-enter start_secondary */
1428         start_secondary_resume();
1429 }
1430 
1431 #endif
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root/arch/powerpc/kernel/smp.c

DEFINITIONS
