root/arch/powerpc/platforms/powernv/smp.c

DEFINITIONS

1. pnv_smp_setup_cpu
2. pnv_smp_kick_cpu
3. pnv_smp_cpu_disable
4. pnv_flush_interrupts
5. pnv_smp_cpu_kill_self
6. pnv_cpu_bootable
7. pnv_smp_prepare_cpu
8. pnv_cause_ipi
9. pnv_smp_probe
10. pnv_system_reset_exception
11. pnv_cause_nmi_ipi
12. pnv_smp_init

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * SMP support for PowerNV machines.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7 
   8 #include <linux/kernel.h>
   9 #include <linux/module.h>
  10 #include <linux/sched.h>
  11 #include <linux/sched/hotplug.h>
  12 #include <linux/smp.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/delay.h>
  15 #include <linux/init.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/cpu.h>
  18 
  19 #include <asm/irq.h>
  20 #include <asm/smp.h>
  21 #include <asm/paca.h>
  22 #include <asm/machdep.h>
  23 #include <asm/cputable.h>
  24 #include <asm/firmware.h>
  25 #include <asm/vdso_datapage.h>
  26 #include <asm/cputhreads.h>
  27 #include <asm/xics.h>
  28 #include <asm/xive.h>
  29 #include <asm/opal.h>
  30 #include <asm/runlatch.h>
  31 #include <asm/code-patching.h>
  32 #include <asm/dbell.h>
  33 #include <asm/kvm_ppc.h>
  34 #include <asm/ppc-opcode.h>
  35 #include <asm/cpuidle.h>
  36 #include <asm/kexec.h>
  37 #include <asm/reg.h>
  38 #include <asm/powernv.h>
  39 
  40 #include "powernv.h"
  41 
  42 #ifdef DEBUG
  43 #include <asm/udbg.h>
  44 #define DBG(fmt...) udbg_printf(fmt)
  45 #else
  46 #define DBG(fmt...)
  47 #endif
  48 
  49 static void pnv_smp_setup_cpu(int cpu)
  50 {
  51         /*
  52          * P9 workaround for CI vector load (see traps.c),
  53          * enable the corresponding HMI interrupt
  54          */
  55         if (pvr_version_is(PVR_POWER9))
  56                 mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17));
  57 
  58         if (xive_enabled())
  59                 xive_smp_setup_cpu();
  60         else if (cpu != boot_cpuid)
  61                 xics_setup_cpu();
  62 }
  63 
  64 static int pnv_smp_kick_cpu(int nr)
  65 {
  66         unsigned int pcpu;
  67         unsigned long start_here =
  68                         __pa(ppc_function_entry(generic_secondary_smp_init));
  69         long rc;
  70         uint8_t status;
  71 
  72         if (nr < 0 || nr >= nr_cpu_ids)
  73                 return -EINVAL;
  74 
  75         pcpu = get_hard_smp_processor_id(nr);
  76         /*
  77          * If we already started or OPAL is not supported, we just
  78          * kick the CPU via the PACA
  79          */
  80         if (paca_ptrs[nr]->cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
  81                 goto kick;
  82 
  83         /*
  84          * At this point, the CPU can either be spinning on the way in
  85          * from kexec or be inside OPAL waiting to be started for the
  86          * first time. OPAL v3 allows us to query OPAL to know if it
  87          * has the CPUs, so we do that
  88          */
  89         rc = opal_query_cpu_status(pcpu, &status);
  90         if (rc != OPAL_SUCCESS) {
  91                 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
  92                 return -ENODEV;
  93         }
  94 
  95         /*
  96          * Already started, just kick it, probably coming from
  97          * kexec and spinning
  98          */
  99         if (status == OPAL_THREAD_STARTED)
 100                 goto kick;
 101 
 102         /*
 103          * Available/inactive, let's kick it
 104          */
 105         if (status == OPAL_THREAD_INACTIVE) {
 106                 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
 107                 rc = opal_start_cpu(pcpu, start_here);
 108                 if (rc != OPAL_SUCCESS) {
 109                         pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
 110                         return -ENODEV;
 111                 }
 112         } else {
 113                 /*
 114                  * An unavailable CPU (or any other unknown status)
 115                  * shouldn't be started. It should also
 116                  * not be in the possible map but currently it can
 117                  * happen
 118                  */
 119                 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
 120                          " (status %d)...\n", nr, pcpu, status);
 121                 return -ENODEV;
 122         }
 123 
 124 kick:
 125         return smp_generic_kick_cpu(nr);
 126 }
 127 
 128 #ifdef CONFIG_HOTPLUG_CPU
 129 
 130 static int pnv_smp_cpu_disable(void)
 131 {
 132         int cpu = smp_processor_id();
 133 
 134         /* This is identical to pSeries... might consolidate by
 135          * moving migrate_irqs_away to a ppc_md with default to
 136          * the generic fixup_irqs. --BenH.
 137          */
 138         set_cpu_online(cpu, false);
 139         vdso_data->processorCount--;
 140         if (cpu == boot_cpuid)
 141                 boot_cpuid = cpumask_any(cpu_online_mask);
 142         if (xive_enabled())
 143                 xive_smp_disable_cpu();
 144         else
 145                 xics_migrate_irqs_away();
 146         return 0;
 147 }
 148 
 149 static void pnv_flush_interrupts(void)
 150 {
 151         if (cpu_has_feature(CPU_FTR_ARCH_300)) {
 152                 if (xive_enabled())
 153                         xive_flush_interrupt();
 154                 else
 155                         icp_opal_flush_interrupt();
 156         } else {
 157                 icp_native_flush_interrupt();
 158         }
 159 }
 160 
 161 static void pnv_smp_cpu_kill_self(void)
 162 {
 163         unsigned long srr1, unexpected_mask, wmask;
 164         unsigned int cpu;
 165         u64 lpcr_val;
 166 
 167         /* Standard hot unplug procedure */
 168 
 169         idle_task_exit();
 170         current->active_mm = NULL; /* for sanity */
 171         cpu = smp_processor_id();
 172         DBG("CPU%d offline\n", cpu);
 173         generic_set_cpu_dead(cpu);
 174         smp_wmb();
 175 
 176         wmask = SRR1_WAKEMASK;
 177         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 178                 wmask = SRR1_WAKEMASK_P8;
 179 
 180         /*
 181          * This turns the irq soft-disabled state we're called with, into a
 182          * hard-disabled state with pending irq_happened interrupts cleared.
 183          *
 184          * PACA_IRQ_DEC   - Decrementer should be ignored.
 185          * PACA_IRQ_HMI   - Can be ignored, processing is done in real mode.
 186          * PACA_IRQ_DBELL, EE, PMI - Unexpected.
 187          */
 188         hard_irq_disable();
 189         if (generic_check_cpu_restart(cpu))
 190                 goto out;
 191 
 192         unexpected_mask = ~(PACA_IRQ_DEC | PACA_IRQ_HMI | PACA_IRQ_HARD_DIS);
 193         if (local_paca->irq_happened & unexpected_mask) {
 194                 if (local_paca->irq_happened & PACA_IRQ_EE)
 195                         pnv_flush_interrupts();
 196                 DBG("CPU%d Unexpected exit while offline irq_happened=%lx!\n",
 197                                 cpu, local_paca->irq_happened);
 198         }
 199         local_paca->irq_happened = PACA_IRQ_HARD_DIS;
 200 
 201         /*
 202          * We don't want to take decrementer interrupts while we are
 203          * offline, so clear LPCR:PECE1. We keep PECE2 (and
 204          * LPCR_PECE_HVEE on P9) enabled so as to let IPIs in.
 205          *
 206          * If the CPU gets woken up by a special wakeup, ensure that
 207          * the SLW engine sets LPCR with decrementer bit cleared, else
 208          * the CPU will come back to the kernel due to a spurious
 209          * wakeup.
 210          */
 211         lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
 212         pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
 213 
 214         while (!generic_check_cpu_restart(cpu)) {
 215                 /*
 216                  * Clear IPI flag, since we don't handle IPIs while
 217                  * offline, except for those when changing micro-threading
 218                  * mode, which are handled explicitly below, and those
 219                  * for coming online, which are handled via
 220                  * generic_check_cpu_restart() calls.
 221                  */
 222                 kvmppc_clear_host_ipi(cpu);
 223 
 224                 srr1 = pnv_cpu_offline(cpu);
 225 
 226                 WARN_ON_ONCE(!irqs_disabled());
 227                 WARN_ON(lazy_irq_pending());
 228 
 229                 /*
 230                  * If the SRR1 value indicates that we woke up due to
 231                  * an external interrupt, then clear the interrupt.
 232                  * We clear the interrupt before checking for the
 233                  * reason, so as to avoid a race where we wake up for
 234                  * some other reason, find nothing and clear the interrupt
 235                  * just as some other cpu is sending us an interrupt.
 236                  * If we returned from power7_nap as a result of
 237                  * having finished executing in a KVM guest, then srr1
 238                  * contains 0.
 239                  */
 240                 if (((srr1 & wmask) == SRR1_WAKEEE) ||
 241                     ((srr1 & wmask) == SRR1_WAKEHVI)) {
 242                         pnv_flush_interrupts();
 243                 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
 244                         unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
 245                         asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
 246                 } else if ((srr1 & wmask) == SRR1_WAKERESET) {
 247                         irq_set_pending_from_srr1(srr1);
 248                         /* Does not return */
 249                 }
 250 
 251                 smp_mb();
 252 
 253                 /*
 254                  * For kdump kernels, we process the ipi and jump to
 255                  * crash_ipi_callback
 256                  */
 257                 if (kdump_in_progress()) {
 258                         /*
 259                          * If we got to this point, we've not used
 260                          * NMI's, otherwise we would have gone
 261                          * via the SRR1_WAKERESET path. We are
 262                          * using regular IPI's for waking up offline
 263                          * threads.
 264                          */
 265                         struct pt_regs regs;
 266 
 267                         ppc_save_regs(&regs);
 268                         crash_ipi_callback(&regs);
 269                         /* Does not return */
 270                 }
 271 
 272                 if (cpu_core_split_required())
 273                         continue;
 274 
 275                 if (srr1 && !generic_check_cpu_restart(cpu))
 276                         DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
 277                                         cpu, srr1);
 278 
 279         }
 280 
 281         /*
 282          * Re-enable decrementer interrupts in LPCR.
 283          *
 284          * Further, we want stop states to be woken up by decrementer
 285          * for non-hotplug cases. So program the LPCR via stop api as
 286          * well.
 287          */
 288         lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
 289         pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
 290 out:
 291         DBG("CPU%d coming online...\n", cpu);
 292 }
 293 
 294 #endif /* CONFIG_HOTPLUG_CPU */
 295 
 296 static int pnv_cpu_bootable(unsigned int nr)
 297 {
 298         /*
 299          * Starting with POWER8, the subcore logic relies on all threads of a
 300          * core being booted so that they can participate in split mode
 301          * switches. So on those machines we ignore the smt_enabled_at_boot
 302          * setting (smt-enabled on the kernel command line).
 303          */
 304         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 305                 return 1;
 306 
 307         return smp_generic_cpu_bootable(nr);
 308 }
 309 
 310 static int pnv_smp_prepare_cpu(int cpu)
 311 {
 312         if (xive_enabled())
 313                 return xive_smp_prepare_cpu(cpu);
 314         return 0;
 315 }
 316 
 317 /* Cause IPI as setup by the interrupt controller (xics or xive) */
 318 static void (*ic_cause_ipi)(int cpu);
 319 
 320 static void pnv_cause_ipi(int cpu)
 321 {
 322         if (doorbell_try_core_ipi(cpu))
 323                 return;
 324 
 325         ic_cause_ipi(cpu);
 326 }
 327 
 328 static void __init pnv_smp_probe(void)
 329 {
 330         if (xive_enabled())
 331                 xive_smp_probe();
 332         else
 333                 xics_smp_probe();
 334 
 335         if (cpu_has_feature(CPU_FTR_DBELL)) {
 336                 ic_cause_ipi = smp_ops->cause_ipi;
 337                 WARN_ON(!ic_cause_ipi);
 338 
 339                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 340                         smp_ops->cause_ipi = doorbell_global_ipi;
 341                 else
 342                         smp_ops->cause_ipi = pnv_cause_ipi;
 343         }
 344 }
 345 
 346 static int pnv_system_reset_exception(struct pt_regs *regs)
 347 {
 348         if (smp_handle_nmi_ipi(regs))
 349                 return 1;
 350         return 0;
 351 }
 352 
 353 static int pnv_cause_nmi_ipi(int cpu)
 354 {
 355         int64_t rc;
 356 
 357         if (cpu >= 0) {
 358                 int h = get_hard_smp_processor_id(cpu);
 359 
 360                 if (opal_check_token(OPAL_QUIESCE))
 361                         opal_quiesce(QUIESCE_HOLD, h);
 362 
 363                 rc = opal_signal_system_reset(h);
 364 
 365                 if (opal_check_token(OPAL_QUIESCE))
 366                         opal_quiesce(QUIESCE_RESUME, h);
 367 
 368                 if (rc != OPAL_SUCCESS)
 369                         return 0;
 370                 return 1;
 371 
 372         } else if (cpu == NMI_IPI_ALL_OTHERS) {
 373                 bool success = true;
 374                 int c;
 375 
 376                 if (opal_check_token(OPAL_QUIESCE))
 377                         opal_quiesce(QUIESCE_HOLD, -1);
 378 
 379                 /*
 380                  * We do not use broadcasts (yet), because it's not clear
 381                  * exactly what semantics Linux wants or the firmware should
 382                  * provide.
 383                  */
 384                 for_each_online_cpu(c) {
 385                         if (c == smp_processor_id())
 386                                 continue;
 387 
 388                         rc = opal_signal_system_reset(
 389                                                 get_hard_smp_processor_id(c));
 390                         if (rc != OPAL_SUCCESS)
 391                                 success = false;
 392                 }
 393 
 394                 if (opal_check_token(OPAL_QUIESCE))
 395                         opal_quiesce(QUIESCE_RESUME, -1);
 396 
 397                 if (success)
 398                         return 1;
 399 
 400                 /*
 401                  * Caller will fall back to doorbells, which may pick
 402                  * up the remainders.
 403                  */
 404         }
 405 
 406         return 0;
 407 }
 408 
 409 static struct smp_ops_t pnv_smp_ops = {
 410         .message_pass   = NULL, /* Use smp_muxed_ipi_message_pass */
 411         .cause_ipi      = NULL, /* Filled at runtime by pnv_smp_probe() */
 412         .cause_nmi_ipi  = NULL,
 413         .probe          = pnv_smp_probe,
 414         .prepare_cpu    = pnv_smp_prepare_cpu,
 415         .kick_cpu       = pnv_smp_kick_cpu,
 416         .setup_cpu      = pnv_smp_setup_cpu,
 417         .cpu_bootable   = pnv_cpu_bootable,
 418 #ifdef CONFIG_HOTPLUG_CPU
 419         .cpu_disable    = pnv_smp_cpu_disable,
 420         .cpu_die        = generic_cpu_die,
 421 #endif /* CONFIG_HOTPLUG_CPU */
 422 };
 423 
 424 /* This is called very early during platform setup_arch */
 425 void __init pnv_smp_init(void)
 426 {
 427         if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) {
 428                 ppc_md.system_reset_exception = pnv_system_reset_exception;
 429                 pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi;
 430         }
 431         smp_ops = &pnv_smp_ops;
 432 
 433 #ifdef CONFIG_HOTPLUG_CPU
 434         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
 435 #ifdef CONFIG_KEXEC_CORE
 436         crash_wake_offline = 1;
 437 #endif
 438 #endif
 439 }