This source file includes following definitions.
- qemu_e500_pic_init
- qemu_e500_setup_arch
- qemu_e500_probe
- define_machine
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  14 #include <linux/kernel.h>
  15 #include <linux/of_fdt.h>
  16 #include <asm/machdep.h>
  17 #include <asm/pgtable.h>
  18 #include <asm/time.h>
  19 #include <asm/udbg.h>
  20 #include <asm/mpic.h>
  21 #include <asm/swiotlb.h>
  22 #include <sysdev/fsl_soc.h>
  23 #include <sysdev/fsl_pci.h>
  24 #include "smp.h"
  25 #include "mpc85xx.h"
  26 
  27 void __init qemu_e500_pic_init(void)
  28 {
  29         struct mpic *mpic;
  30         unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
  31                 MPIC_ENABLE_COREINT;
  32 
  33         mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC  ");
  34 
  35         BUG_ON(mpic == NULL);
  36         mpic_init(mpic);
  37 }
  38 
  39 static void __init qemu_e500_setup_arch(void)
  40 {
  41         ppc_md.progress("qemu_e500_setup_arch()", 0);
  42 
  43         fsl_pci_assign_primary();
  44         swiotlb_detect_4g();
  45         mpc85xx_smp_init();
  46 }
  47 
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  50 
  51 static int __init qemu_e500_probe(void)
  52 {
  53         return !!of_machine_is_compatible("fsl,qemu-e500");
  54 }
  55 
  56 machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
  57 
  58 define_machine(qemu_e500) {
  59         .name                   = "QEMU e500",
  60         .probe                  = qemu_e500_probe,
  61         .setup_arch             = qemu_e500_setup_arch,
  62         .init_IRQ               = qemu_e500_pic_init,
  63 #ifdef CONFIG_PCI
  64         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
  65         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
  66 #endif
  67         .get_irq                = mpic_get_coreint_irq,
  68         .calibrate_decr         = generic_calibrate_decr,
  69         .progress               = udbg_progress,
  70 };