ccr               154 arch/arm/mach-mmp/time.c 	uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR);
ccr               158 arch/arm/mach-mmp/time.c 	ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) :
ccr               160 arch/arm/mach-mmp/time.c 	__raw_writel(ccr, mmp_timer_base + TMR_CCR);
ccr               206 arch/arm/plat-omap/dma.c 	u32 ccr;
ccr               208 arch/arm/plat-omap/dma.c 	ccr = p->dma_read(CCR, lch);
ccr               210 arch/arm/plat-omap/dma.c 		ccr |= (1 << 6);
ccr               212 arch/arm/plat-omap/dma.c 		ccr &= ~(1 << 6);
ccr               213 arch/arm/plat-omap/dma.c 	p->dma_write(ccr, CCR, lch);
ccr               230 arch/arm/plat-omap/dma.c 		u16 ccr;
ccr               232 arch/arm/plat-omap/dma.c 		ccr = p->dma_read(CCR, lch);
ccr               233 arch/arm/plat-omap/dma.c 		ccr &= ~(1 << 5);
ccr               235 arch/arm/plat-omap/dma.c 			ccr |= 1 << 5;
ccr               236 arch/arm/plat-omap/dma.c 		p->dma_write(ccr, CCR, lch);
ccr               238 arch/arm/plat-omap/dma.c 		ccr = p->dma_read(CCR2, lch);
ccr               239 arch/arm/plat-omap/dma.c 		ccr &= ~(1 << 2);
ccr               241 arch/arm/plat-omap/dma.c 			ccr |= 1 << 2;
ccr               242 arch/arm/plat-omap/dma.c 		p->dma_write(ccr, CCR2, lch);
ccr              1164 arch/arm/plat-omap/dma.c 			u32 ccr;
ccr              1166 arch/arm/plat-omap/dma.c 			ccr = p->dma_read(CCR, ch);
ccr              1167 arch/arm/plat-omap/dma.c 			ccr &= ~OMAP_DMA_CCR_EN;
ccr              1168 arch/arm/plat-omap/dma.c 			p->dma_write(ccr, CCR, ch);
ccr                54 arch/h8300/include/asm/processor.h 	unsigned long  ccr;		/* saved status register */
ccr                65 arch/h8300/include/asm/processor.h 	.ccr  = PS_S,						\
ccr                83 arch/h8300/include/asm/processor.h 	(_regs)->ccr = 0x00;	   /* clear all flags */	\
ccr                92 arch/h8300/include/asm/processor.h 	(_regs)->ccr = 0x00;	   /* clear kernel flag */	\
ccr                23 arch/h8300/include/asm/ptrace.h #define user_mode(regs) (!((regs)->ccr & PS_S))
ccr                42 arch/h8300/include/asm/user.h 	long ccr;
ccr                33 arch/h8300/include/uapi/asm/ptrace.h 	unsigned short	 ccr;
ccr                40 arch/h8300/kernel/asm-offsets.c 	OFFSET(THREAD_CCR, thread_struct, ccr);
ccr                52 arch/h8300/kernel/asm-offsets.c 	DEFINE(LCCR,  offsetof(struct pt_regs, ccr)      - sizeof(long));
ccr                25 arch/h8300/kernel/kgdb.c 	{ "ccr", GDB_SIZEOF_REG, offsetof(struct pt_regs, ccr) },
ccr                86 arch/h8300/kernel/kgdb.c 	regs->pc |= regs->ccr << 24;
ccr                93 arch/h8300/kernel/process.c 	       regs->pc, regs->ccr);
ccr                32 arch/h8300/kernel/ptrace.c 	PT_REG(orig_er0), PT_REG(ccr), PT_REG(pc),
ccr                78 arch/h8300/kernel/signal.c 	unsigned int ccr;
ccr                92 arch/h8300/kernel/signal.c 	ccr = regs->ccr & 0x10;
ccr                93 arch/h8300/kernel/signal.c 	COPY(ccr);
ccr                95 arch/h8300/kernel/signal.c 	regs->ccr &= 0xef;
ccr                96 arch/h8300/kernel/signal.c 	regs->ccr |= ccr;
ccr               147 arch/h8300/kernel/signal.c 	err |= __put_user(regs->ccr, &sc->sc_ccr);
ccr                44 arch/mips/include/asm/txx9/tx3927.h 		volatile unsigned long ccr;
ccr                82 arch/mips/txx9/generic/setup_tx3927.c 		tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST;
ccr                83 arch/mips/txx9/generic/setup_tx3927.c 		tx3927_dmaptr->ch[i].ccr = 0;
ccr               120 arch/parisc/include/asm/asmregs.h ccr:	.reg	%cr10
ccr               340 arch/powerpc/include/asm/kvm_book3s.h 	vcpu->arch.regs.ccr = val;
ccr               345 arch/powerpc/include/asm/kvm_book3s.h 	return vcpu->arch.regs.ccr;
ccr               590 arch/powerpc/include/asm/kvm_book3s_64.h 	vcpu->arch.regs.ccr  = vcpu->arch.cr_tm;
ccr               607 arch/powerpc/include/asm/kvm_book3s_64.h 	vcpu->arch.cr_tm  = vcpu->arch.regs.ccr;
ccr                38 arch/powerpc/include/asm/kvm_booke.h 	vcpu->arch.regs.ccr = val;
ccr                43 arch/powerpc/include/asm/kvm_booke.h 	return vcpu->arch.regs.ccr;
ccr               195 arch/powerpc/include/asm/mpc52xx_psc.h 	u32		ccr;		/* PSC + 0x20 */
ccr               337 arch/powerpc/include/asm/mpc52xx_psc.h 	u32		ccr;			/* PSC + 0x30 */
ccr                38 arch/powerpc/include/asm/ptrace.h 			unsigned long ccr;
ccr               144 arch/powerpc/include/asm/ptrace.h 	return !(regs->ccr & 0x10000000);
ccr                45 arch/powerpc/include/asm/syscall.h 	return (regs->ccr & 0x10000000UL) ? -regs->gpr[3] : 0;
ccr                65 arch/powerpc/include/asm/syscall.h 		regs->ccr |= 0x10000000L;
ccr                68 arch/powerpc/include/asm/syscall.h 		regs->ccr &= ~0x10000000L;
ccr                45 arch/powerpc/include/uapi/asm/ptrace.h 	unsigned long ccr;
ccr               314 arch/powerpc/kernel/asm-offsets.c 	STACK_PT_REGS_OFFSET(_CCR, ccr);
ccr               449 arch/powerpc/kernel/asm-offsets.c 	OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
ccr               708 arch/powerpc/kernel/asm-offsets.c 	OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
ccr               227 arch/powerpc/kernel/kgdb.c 	PACK32(ptr, regs->ccr);
ccr               315 arch/powerpc/kernel/kgdb.c 	{ "cr", GDB_SIZEOF_REG_U32, offsetof(struct pt_regs, ccr) },
ccr                23 arch/powerpc/kernel/ppc32.h 	unsigned int ccr;
ccr               904 arch/powerpc/kernel/process.c 		 thr->regs->ccr, thr->regs->msr,
ccr              1400 arch/powerpc/kernel/process.c 	pr_cont("  CR: %08lx  XER: %08lx\n", regs->ccr, regs->xer);
ccr              1724 arch/powerpc/kernel/process.c 	regs->ccr = 0;
ccr               115 arch/powerpc/kernel/ptrace.c 	REG_OFFSET_NAME(ccr),
ccr              3382 arch/powerpc/kernel/ptrace.c 	BUILD_BUG_ON(offsetof(struct pt_regs, ccr) !=
ccr              3383 arch/powerpc/kernel/ptrace.c 		     offsetof(struct user_pt_regs, ccr));
ccr                64 arch/powerpc/kernel/signal.c 	if (!(regs->ccr & 0x10000000))
ccr               100 arch/powerpc/kernel/signal.c 		regs->ccr |= 0x10000000;
ccr               352 arch/powerpc/kernel/signal_64.c 	err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
ccr               466 arch/powerpc/kernel/signal_64.c 	err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]);
ccr               473 arch/powerpc/kernel/signal_64.c 	err |= __get_user(tsk->thread.ckpt_regs.ccr,
ccr              1300 arch/powerpc/kernel/traps.c 	bit = (regs->ccr >> (31 - BC)) & 0x1;
ccr              1361 arch/powerpc/kernel/traps.c 		regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
ccr               102 arch/powerpc/kvm/book3s_emulate.c 	vcpu->arch.cr_tm = vcpu->arch.regs.ccr;
ccr               121 arch/powerpc/kvm/book3s_emulate.c 	vcpu->arch.regs.ccr = vcpu->arch.cr_tm;
ccr               133 arch/powerpc/kvm/book3s_emulate.c 	vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & ~(CR0_MASK << CR0_SHIFT)) |
ccr               212 arch/powerpc/kvm/book3s_emulate.c 	vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & ~(CR0_MASK << CR0_SHIFT)) |
ccr               503 arch/powerpc/kvm/book3s_emulate.c 				vcpu->arch.regs.ccr = (CR0_TBEGIN_FAILURE |
ccr               504 arch/powerpc/kvm/book3s_emulate.c 				  (vcpu->arch.regs.ccr & ~(CR0_MASK << CR0_SHIFT)));
ccr               434 arch/powerpc/kvm/book3s_hv.c 	       vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
ccr               130 arch/powerpc/kvm/book3s_hv_tm.c 		vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) |
ccr               174 arch/powerpc/kvm/book3s_hv_tm.c 		vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) |
ccr               204 arch/powerpc/kvm/book3s_hv_tm.c 		vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) |
ccr                89 arch/powerpc/kvm/book3s_hv_tm_builtin.c 		vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) |
ccr               106 arch/powerpc/kvm/book3s_hv_tm_builtin.c 	vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | 0xa0000000;
ccr               167 arch/powerpc/kvm/book3s_pr.c 	svcpu->cr  = vcpu->arch.regs.ccr;
ccr               249 arch/powerpc/kvm/book3s_pr.c 	vcpu->arch.regs.ccr  = svcpu->cr;
ccr                98 arch/powerpc/lib/sstep.c 		if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1))
ccr               950 arch/powerpc/lib/sstep.c 	op->ccval = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000);
ccr              1016 arch/powerpc/lib/sstep.c 	op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift);
ccr              1035 arch/powerpc/lib/sstep.c 	op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift);
ccr              1216 arch/powerpc/lib/sstep.c 			val = (regs->ccr >> ra) & 0xf;
ccr              1217 arch/powerpc/lib/sstep.c 			op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd);
ccr              1253 arch/powerpc/lib/sstep.c 			ra = (regs->ccr >> (31 - ra)) & 1;
ccr              1254 arch/powerpc/lib/sstep.c 			rb = (regs->ccr >> (31 - rb)) & 1;
ccr              1256 arch/powerpc/lib/sstep.c 			op->ccval = (regs->ccr & ~(1UL << (31 - rd))) |
ccr              1498 arch/powerpc/lib/sstep.c 			val = (regs->ccr >> (31 - mb)) & 1;
ccr              1554 arch/powerpc/lib/sstep.c 			op->val = regs->ccr & imm;
ccr              1561 arch/powerpc/lib/sstep.c 			op->ccval = regs->ccr;
ccr              2765 arch/powerpc/lib/sstep.c 			regs->ccr = op->ccval;
ccr              2932 arch/powerpc/lib/sstep.c 			regs->ccr = (regs->ccr & 0x0fffffff) |
ccr               177 arch/powerpc/lib/test_emulate_step.c 	asm volatile("mfcr %0" : "=r"(regs.ccr));
ccr               215 arch/powerpc/lib/test_emulate_step.c 	if (stepped == 1 && ((regs.gpr[5] == a && (regs.ccr & cr0_eq))
ccr               216 arch/powerpc/lib/test_emulate_step.c 			|| (regs.gpr[5] != a && !(regs.ccr & cr0_eq))))
ccr               945 arch/powerpc/lib/test_emulate_step.c 			if (!ignore_ccr && exp.ccr != got.ccr) {
ccr               947 arch/powerpc/lib/test_emulate_step.c 				reg_mismatch("CR", exp.ccr, got.ccr);
ccr                11 arch/powerpc/math-emu/fcmpo.c fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
ccr                20 arch/powerpc/math-emu/fcmpo.c 	printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
ccr                40 arch/powerpc/math-emu/fcmpo.c 	*ccr &= ~(15 << ((7 - crfD) << 2));
ccr                41 arch/powerpc/math-emu/fcmpo.c 	*ccr |= (cmp << ((7 - crfD) << 2));
ccr                44 arch/powerpc/math-emu/fcmpo.c 	printk("CR: %08x\n", *ccr);
ccr                11 arch/powerpc/math-emu/fcmpu.c fcmpu(u32 *ccr, int crfD, void *frA, void *frB)
ccr                20 arch/powerpc/math-emu/fcmpu.c 	printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
ccr                37 arch/powerpc/math-emu/fcmpu.c 	*ccr &= ~(15 << ((7 - crfD) << 2));
ccr                38 arch/powerpc/math-emu/fcmpu.c 	*ccr |= (cmp << ((7 - crfD) << 2));
ccr                41 arch/powerpc/math-emu/fcmpu.c 	printk("CR: %08x\n", *ccr);
ccr               398 arch/powerpc/math-emu/math.c 		op0 = (void *)&regs->ccr;
ccr               405 arch/powerpc/math-emu/math.c 		op0 = (void *)&regs->ccr;
ccr               438 arch/powerpc/math-emu/math.c 		regs->ccr &= ~(0x0f000000);
ccr               439 arch/powerpc/math-emu/math.c 		regs->ccr |= (__FPU_FPSCR >> 4) & 0x0f000000;
ccr               655 arch/powerpc/math-emu/math_efp.c 	regs->ccr &= ~(15 << ((7 - ((speinsn >> 23) & 0x7)) << 2));
ccr               656 arch/powerpc/math-emu/math_efp.c 	regs->ccr |= (IR << ((7 - ((speinsn >> 23) & 0x7)) << 2));
ccr               684 arch/powerpc/math-emu/math_efp.c 	pr_debug("ccr = %08lx\n", regs->ccr);
ccr                10 arch/powerpc/math-emu/mcrfs.c mcrfs(u32 *ccr, u32 crfD, u32 crfS)
ccr                15 arch/powerpc/math-emu/mcrfs.c 	printk("%s: %p (%08x) %d %d\n", __func__, ccr, *ccr, crfD, crfS);
ccr                25 arch/powerpc/math-emu/mcrfs.c 	*ccr &= ~(15 << ((7 - crfD) << 2));
ccr                26 arch/powerpc/math-emu/mcrfs.c 	*ccr |= (value << ((7 - crfD) << 2));
ccr                29 arch/powerpc/math-emu/mcrfs.c 	printk("CR: %08x\n", __func__, *ccr);
ccr                59 arch/powerpc/perf/perf_regs.c 	PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
ccr               119 arch/powerpc/platforms/powernv/opal-fadump.h 		regs->ccr = reg_val;
ccr               268 arch/powerpc/platforms/pseries/rtas-fadump.c 		regs->ccr = (unsigned long)reg_val;
ccr              1775 arch/powerpc/xmon/xmon.c 	printf("msr = "REG"   cr  = %.8lx\n", fp->msr, fp->ccr);
ccr                22 arch/s390/include/asm/sysinfo.h 	unsigned char ccr;
ccr               127 arch/s390/kernel/sysinfo.c 		seq_printf(m, "Capacity Ch. Reason:  %d\n", info->ccr);
ccr                54 arch/sh/include/asm/suspend.h 	unsigned long ccr;
ccr                57 arch/sh/kernel/asm-offsets.c 	DEFINE(SH_SLEEP_REG_CCR, offsetof(struct sh_sleep_regs, ccr));
ccr               109 arch/sh/kernel/cpu/init.c 	unsigned long ccr, flags;
ccr               112 arch/sh/kernel/cpu/init.c 	ccr = __raw_readl(SH_CCR);
ccr               125 arch/sh/kernel/cpu/init.c 	if (ccr & CCR_CACHE_ENABLE) {
ccr               135 arch/sh/kernel/cpu/init.c 		if (ccr & CCR_CACHE_ORA)
ccr               143 arch/sh/kernel/cpu/init.c 		if (!(ccr & CCR_CACHE_EMODE))
ccr                98 arch/sh/kernel/cpu/shmobile/pm.c 	sdp->addr.ccr = 0xff00001c; /* CCR */
ccr                30 arch/sh/mm/cache-debugfs.c 	unsigned long ccr;
ccr                39 arch/sh/mm/cache-debugfs.c 	ccr = __raw_readl(SH_CCR);
ccr                40 arch/sh/mm/cache-debugfs.c 	if ((ccr & CCR_CACHE_ENABLE) == 0) {
ccr                61 arch/sh/mm/cache-debugfs.c 	if ((ccr & CCR_CACHE_ORA) && cache_type == CACHE_TYPE_DCACHE)
ccr                60 arch/sh/mm/cache-sh2.c 	unsigned long ccr;
ccr                65 arch/sh/mm/cache-sh2.c 	ccr = __raw_readl(SH_CCR);
ccr                66 arch/sh/mm/cache-sh2.c 	ccr |= CCR_CACHE_INVALIDATE;
ccr                67 arch/sh/mm/cache-sh2.c 	__raw_writel(ccr, SH_CCR);
ccr               130 arch/sh/mm/cache-sh4.c 	unsigned long flags, ccr;
ccr               136 arch/sh/mm/cache-sh4.c 	ccr = __raw_readl(SH_CCR);
ccr               137 arch/sh/mm/cache-sh4.c 	ccr |= CCR_CACHE_ICI;
ccr               138 arch/sh/mm/cache-sh4.c 	__raw_writel(ccr, SH_CCR);
ccr                20 arch/sh/mm/cache-shx3.c 	unsigned int ccr;
ccr                22 arch/sh/mm/cache-shx3.c 	ccr = __raw_readl(SH_CCR);
ccr                28 arch/sh/mm/cache-shx3.c 		ccr |= CCR_CACHE_SNM;
ccr                40 arch/sh/mm/cache-shx3.c 	ccr |= CCR_CACHE_IBE;
ccr                43 arch/sh/mm/cache-shx3.c 	writel_uncached(ccr, SH_CCR);
ccr                57 arch/sparc/include/asm/backoff.h 88:	rd		%ccr, %g0;		\
ccr                58 arch/sparc/include/asm/backoff.h 	rd		%ccr, %g0;		\
ccr                59 arch/sparc/include/asm/backoff.h 	rd		%ccr, %g0;		\
ccr               211 arch/sparc/include/asm/leon.h 	unsigned long ccr;	/* 0x00 - Cache Control Register  */
ccr               359 arch/sparc/kernel/visemul.c 		unsigned long ccr, tstate;
ccr               363 arch/sparc/kernel/visemul.c 				     : "=r" (ccr)
ccr               367 arch/sparc/kernel/visemul.c 		regs->tstate = tstate | (ccr << 32UL);
ccr               218 arch/sparc/mm/leon_mm.c 	unsigned long ccr, iccr, dccr;
ccr               228 arch/sparc/mm/leon_mm.c 			     : "=r"(ccr), "=r"(iccr), "=r"(dccr)
ccr               233 arch/sparc/mm/leon_mm.c 	regs->ccr = ccr;
ccr               236 drivers/dma/pl330.c #define BRST_LEN(ccr)		((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1)
ccr               237 drivers/dma/pl330.c #define BRST_SIZE(ccr)		(1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7))
ccr               239 drivers/dma/pl330.c #define BYTE_TO_BURST(b, ccr)	((b) / BRST_SIZE(ccr) / BRST_LEN(ccr))
ccr               240 drivers/dma/pl330.c #define BURST_TO_BYTE(c, ccr)	((c) * BRST_SIZE(ccr) * BRST_LEN(ccr))
ccr               543 drivers/dma/pl330.c 	u32 ccr;
ccr              1210 drivers/dma/pl330.c 	enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE;
ccr              1255 drivers/dma/pl330.c 		dregs_ccr = pxs->ccr;
ccr              1362 drivers/dma/pl330.c 	u32 ccr = pxs->ccr;
ccr              1363 drivers/dma/pl330.c 	unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr);
ccr              1364 drivers/dma/pl330.c 	int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) /
ccr              1365 drivers/dma/pl330.c 		BRST_SIZE(ccr);
ccr              1411 drivers/dma/pl330.c 	off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
ccr              1425 drivers/dma/pl330.c 	u32 ccr = 0;
ccr              1428 drivers/dma/pl330.c 		ccr |= CC_SRCINC;
ccr              1431 drivers/dma/pl330.c 		ccr |= CC_DSTINC;
ccr              1435 drivers/dma/pl330.c 		ccr |= CC_SRCPRI | CC_DSTPRI;
ccr              1437 drivers/dma/pl330.c 		ccr |= CC_SRCNS | CC_DSTNS;
ccr              1439 drivers/dma/pl330.c 		ccr |= CC_SRCIA | CC_DSTIA;
ccr              1441 drivers/dma/pl330.c 	ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT);
ccr              1442 drivers/dma/pl330.c 	ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT);
ccr              1444 drivers/dma/pl330.c 	ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
ccr              1445 drivers/dma/pl330.c 	ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
ccr              1447 drivers/dma/pl330.c 	ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
ccr              1448 drivers/dma/pl330.c 	ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
ccr              1450 drivers/dma/pl330.c 	ccr |= (rqc->swap << CC_SWAP_SHFT);
ccr              1452 drivers/dma/pl330.c 	return ccr;
ccr              1467 drivers/dma/pl330.c 	u32 ccr;
ccr              1513 drivers/dma/pl330.c 	ccr = _prepare_ccr(&desc->rqcfg);
ccr              1517 drivers/dma/pl330.c 	xs.ccr = ccr;
ccr               252 drivers/dma/stm32-mdma.c 	u32 ccr;
ccr               430 drivers/dma/stm32-mdma.c 	u32 ccr, cisr, id, reg;
ccr               439 drivers/dma/stm32-mdma.c 	ccr = stm32_mdma_read(dmadev, reg);
ccr               440 drivers/dma/stm32-mdma.c 	if (ccr & STM32_MDMA_CCR_EN) {
ccr               507 drivers/dma/stm32-mdma.c 	u32 ccr, ctcr, ctbr, tlen;
ccr               514 drivers/dma/stm32-mdma.c 	ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id));
ccr               557 drivers/dma/stm32-mdma.c 	ccr &= ~(STM32_MDMA_CCR_SWRQ | STM32_MDMA_CCR_WEX | STM32_MDMA_CCR_HEX |
ccr               559 drivers/dma/stm32-mdma.c 	ccr |= STM32_MDMA_CCR_PL(chan_config->priority_level);
ccr               667 drivers/dma/stm32-mdma.c 	*mdma_ccr = ccr;
ccr               735 drivers/dma/stm32-mdma.c 	u32 ccr, ctcr, ctbr;
ccr               747 drivers/dma/stm32-mdma.c 			ret = stm32_mdma_set_xfer_param(chan, direction, &ccr,
ccr               755 drivers/dma/stm32-mdma.c 			ret = stm32_mdma_set_xfer_param(chan, direction, &ccr,
ccr               771 drivers/dma/stm32-mdma.c 	ccr &= ~STM32_MDMA_CCR_IRQ_MASK;
ccr               772 drivers/dma/stm32-mdma.c 	ccr |= STM32_MDMA_CCR_TEIE | STM32_MDMA_CCR_CTCIE;
ccr               774 drivers/dma/stm32-mdma.c 		ccr |= STM32_MDMA_CCR_BTIE;
ccr               775 drivers/dma/stm32-mdma.c 	desc->ccr = ccr;
ccr               831 drivers/dma/stm32-mdma.c 	u32 ccr, ctcr, ctbr, count;
ccr               864 drivers/dma/stm32-mdma.c 		ret = stm32_mdma_set_xfer_param(chan, direction, &ccr, &ctcr,
ccr               870 drivers/dma/stm32-mdma.c 		ret = stm32_mdma_set_xfer_param(chan, direction, &ccr, &ctcr,
ccr               880 drivers/dma/stm32-mdma.c 	ccr &= ~STM32_MDMA_CCR_IRQ_MASK;
ccr               881 drivers/dma/stm32-mdma.c 	ccr |= STM32_MDMA_CCR_TEIE | STM32_MDMA_CCR_CTCIE | STM32_MDMA_CCR_BTIE;
ccr               882 drivers/dma/stm32-mdma.c 	desc->ccr = ccr;
ccr               920 drivers/dma/stm32-mdma.c 	u32 ccr, ctcr, ctbr, cbndtr, count, max_burst, mdma_burst;
ccr               942 drivers/dma/stm32-mdma.c 	ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id));
ccr               948 drivers/dma/stm32-mdma.c 	ccr &= ~(STM32_MDMA_CCR_WEX | STM32_MDMA_CCR_HEX |
ccr               951 drivers/dma/stm32-mdma.c 	ccr |= STM32_MDMA_CCR_TEIE;
ccr               979 drivers/dma/stm32-mdma.c 			ccr |= STM32_MDMA_CCR_TCIE | STM32_MDMA_CCR_CTCIE;
ccr               983 drivers/dma/stm32-mdma.c 			ccr |= STM32_MDMA_CCR_BTIE | STM32_MDMA_CCR_CTCIE;
ccr              1036 drivers/dma/stm32-mdma.c 		ccr |= STM32_MDMA_CCR_BTIE | STM32_MDMA_CCR_CTCIE;
ccr              1083 drivers/dma/stm32-mdma.c 	desc->ccr = ccr;
ccr              1134 drivers/dma/stm32-mdma.c 	stm32_mdma_write(dmadev, STM32_MDMA_CCR(id), chan->desc->ccr);
ccr              1214 drivers/dma/stm32-mdma.c 	stm32_mdma_write(dmadev, STM32_MDMA_CCR(chan->id), chan->desc->ccr);
ccr                45 drivers/dma/ti/omap-dma.c 	uint32_t ccr;
ccr                99 drivers/dma/ti/omap-dma.c 	uint32_t ccr;		/* CCR value */
ccr               422 drivers/dma/ti/omap-dma.c 	omap_dma_chan_write(c, CCR, d->ccr | CCR_ENABLE);
ccr               473 drivers/dma/ti/omap-dma.c 		if (!(c->ccr & CCR_BUFFERING_DISABLE))
ccr               484 drivers/dma/ti/omap-dma.c 		if (!(c->ccr & CCR_BUFFERING_DISABLE))
ccr               552 drivers/dma/ti/omap-dma.c 	omap_dma_chan_write(c, CCR, d->ccr);
ccr               554 drivers/dma/ti/omap-dma.c 		omap_dma_chan_write(c, CCR2, d->ccr >> 16);
ccr               674 drivers/dma/ti/omap-dma.c 			c->ccr = CCR_OMAP31_DISABLE;
ccr               676 drivers/dma/ti/omap-dma.c 			c->ccr |= c->dma_ch + 1;
ccr               678 drivers/dma/ti/omap-dma.c 			c->ccr = c->dma_sig & 0x1f;
ccr               681 drivers/dma/ti/omap-dma.c 		c->ccr = c->dma_sig & 0x1f;
ccr               682 drivers/dma/ti/omap-dma.c 		c->ccr |= (c->dma_sig & ~0x1f) << 14;
ccr               685 drivers/dma/ti/omap-dma.c 		c->ccr |= CCR_BUFFERING_DISABLE;
ccr               857 drivers/dma/ti/omap-dma.c 		uint32_t ccr = omap_dma_chan_read(c, CCR);
ccr               862 drivers/dma/ti/omap-dma.c 		if (!(ccr & CCR_ENABLE)) {
ccr               954 drivers/dma/ti/omap-dma.c 	d->ccr = c->ccr | CCR_SYNC_FRAME;
ccr               958 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_DST_AMODE_POSTINC;
ccr               960 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_SRC_AMODE_DBLIDX;
ccr               970 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_SRC_AMODE_CONSTANT;
ccr               975 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_SRC_AMODE_POSTINC;
ccr               977 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_DST_AMODE_DBLIDX;
ccr               986 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_DST_AMODE_CONSTANT;
ccr              1002 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_TRIGGER_SRC;
ccr              1121 drivers/dma/ti/omap-dma.c 	d->ccr = c->ccr;
ccr              1123 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
ccr              1125 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
ccr              1142 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_SYNC_PACKET;
ccr              1144 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_SYNC_ELEMENT;
ccr              1147 drivers/dma/ti/omap-dma.c 			d->ccr |= CCR_TRIGGER_SRC;
ccr              1159 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_AUTO_INIT | CCR_REPEAT;
ccr              1192 drivers/dma/ti/omap-dma.c 	d->ccr = c->ccr;
ccr              1193 drivers/dma/ti/omap-dma.c 	d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC;
ccr              1247 drivers/dma/ti/omap-dma.c 	d->ccr = c->ccr;
ccr              1252 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_SRC_AMODE_DBLIDX;
ccr              1256 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_SRC_AMODE_POSTINC;
ccr              1267 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_DST_AMODE_DBLIDX;
ccr              1271 drivers/dma/ti/omap-dma.c 		d->ccr |= CCR_DST_AMODE_POSTINC;
ccr               365 drivers/dma/txx9dmac.c 		channel64_writel(dc, CCR, dc->ccr);
ccr               386 drivers/dma/txx9dmac.c 			channel32_writel(dc, CCR, dc->ccr);
ccr               391 drivers/dma/txx9dmac.c 			channel32_writel(dc, CCR, dc->ccr);
ccr               759 drivers/dma/txx9dmac.c 					dc->ccr | TXX9_DMA_CCR_XFACT);
ccr               765 drivers/dma/txx9dmac.c 					dc->ccr | TXX9_DMA_CCR_XFACT);
ccr               867 drivers/dma/txx9dmac.c 					dc->ccr | TXX9_DMA_CCR_XFACT);
ccr              1001 drivers/dma/txx9dmac.c 	dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE;
ccr              1003 drivers/dma/txx9dmac.c 	if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN))
ccr              1004 drivers/dma/txx9dmac.c 		dc->ccr |= TXX9_DMA_CCR_INTENC;
ccr              1008 drivers/dma/txx9dmac.c 		dc->ccr |= TXX9_DMA_CCR_XFSZ_X8;
ccr              1013 drivers/dma/txx9dmac.c 		dc->ccr |= TXX9_DMA_CCR_EXTRQ |
ccr               167 drivers/dma/txx9dmac.h 	u32			ccr;
ccr               239 drivers/dma/txx9dmac.h 	return (dc->ccr & TXX9_DMA_CCR_INTENT) != 0;
ccr               244 drivers/dma/txx9dmac.h 	dc->ccr |= TXX9_DMA_CCR_INTENT;
ccr               254 drivers/dma/txx9dmac.h 	dc->ccr |= TXX9_DMA_CCR_SMPCHN;
ccr               259 drivers/dma/txx9dmac.h 					      u32 sair, u32 dair, u32 ccr)
ccr               289 drivers/dma/txx9dmac.h 					      u32 sai, u32 dai, u32 ccr)
ccr               294 drivers/dma/txx9dmac.h 		desc->hwdesc.CCR = ccr;
ccr               298 drivers/dma/txx9dmac.h 		desc->hwdesc32.CCR = ccr;
ccr               216 drivers/hsi/controllers/omap_ssi_port.c 	u16 ccr;
ccr               241 drivers/hsi/controllers/omap_ssi_port.c 		ccr = msg->channel + 0x10 + (port->num * 8); /* Sync */
ccr               242 drivers/hsi/controllers/omap_ssi_port.c 		ccr |= SSI_DST_AMODE_POSTINC | SSI_SRC_AMODE_CONST |
ccr               258 drivers/hsi/controllers/omap_ssi_port.c 		ccr = (msg->channel + 1 + (port->num * 8)) & 0xf; /* Sync */
ccr               259 drivers/hsi/controllers/omap_ssi_port.c 		ccr |= SSI_SRC_AMODE_POSTINC | SSI_DST_AMODE_CONST |
ccr               266 drivers/hsi/controllers/omap_ssi_port.c 		lch, csdp, ccr, s_addr, d_addr);
ccr               280 drivers/hsi/controllers/omap_ssi_port.c 	writew(ccr, gdd + SSI_GDD_CCR_REG(lch));
ccr               228 drivers/i2c/busses/i2c-stm32f4.c 	u32 ccr = 0;
ccr               269 drivers/i2c/busses/i2c-stm32f4.c 		ccr |= STM32F4_I2C_CCR_FS;
ccr               272 drivers/i2c/busses/i2c-stm32f4.c 	ccr |= STM32F4_I2C_CCR_CCR(val);
ccr               273 drivers/i2c/busses/i2c-stm32f4.c 	writel_relaxed(ccr, i2c_dev->base + STM32F4_I2C_CCR);
ccr                52 drivers/iio/adc/stm32-adc-core.c 	u32 ccr;
ccr               281 drivers/iio/adc/stm32-adc-core.c 	.ccr = STM32F4_ADC_CCR,
ccr               292 drivers/iio/adc/stm32-adc-core.c 	.ccr = STM32H7_ADC_CCR,
ccr               539 drivers/iio/adc/stm32-adc-core.c 	writel_relaxed(priv->ccr_bak, priv->common.base + priv->cfg->regs->ccr);
ccr               562 drivers/iio/adc/stm32-adc-core.c 	priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr);
ccr                99 drivers/mfd/tc6393xb.c 		u16		ccr;
ccr               222 drivers/mfd/tc6393xb.c 	u16 ccr;
ccr               227 drivers/mfd/tc6393xb.c 	ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
ccr               228 drivers/mfd/tc6393xb.c 	ccr |= SCR_CCR_USBCK;
ccr               229 drivers/mfd/tc6393xb.c 	tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
ccr               244 drivers/mfd/tc6393xb.c 	u16 ccr;
ccr               253 drivers/mfd/tc6393xb.c 	ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
ccr               254 drivers/mfd/tc6393xb.c 	ccr &= ~SCR_CCR_USBCK;
ccr               255 drivers/mfd/tc6393xb.c 	tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
ccr               277 drivers/mfd/tc6393xb.c 	u16 ccr;
ccr               281 drivers/mfd/tc6393xb.c 	ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
ccr               282 drivers/mfd/tc6393xb.c 	ccr &= ~SCR_CCR_MCLK_MASK;
ccr               283 drivers/mfd/tc6393xb.c 	ccr |= SCR_CCR_MCLK_48;
ccr               284 drivers/mfd/tc6393xb.c 	tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
ccr               295 drivers/mfd/tc6393xb.c 	u16 ccr;
ccr               299 drivers/mfd/tc6393xb.c 	ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
ccr               300 drivers/mfd/tc6393xb.c 	ccr &= ~SCR_CCR_MCLK_MASK;
ccr               301 drivers/mfd/tc6393xb.c 	ccr |= SCR_CCR_MCLK_OFF;
ccr               302 drivers/mfd/tc6393xb.c 	tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
ccr               766 drivers/mfd/tc6393xb.c 	tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
ccr               803 drivers/mfd/tc6393xb.c 	iowrite16(tc6393xb->suspend_state.ccr,	tc6393xb->scr + SCR_CCR);
ccr                44 drivers/mtd/nand/raw/ndfc.c 	uint32_t ccr;
ccr                47 drivers/mtd/nand/raw/ndfc.c 	ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
ccr                49 drivers/mtd/nand/raw/ndfc.c 		ccr &= ~NDFC_CCR_BS_MASK;
ccr                50 drivers/mtd/nand/raw/ndfc.c 		ccr |= NDFC_CCR_BS(chip + ndfc->chip_select);
ccr                52 drivers/mtd/nand/raw/ndfc.c 		ccr |= NDFC_CCR_RESET_CE;
ccr                53 drivers/mtd/nand/raw/ndfc.c 	out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
ccr                78 drivers/mtd/nand/raw/ndfc.c 	uint32_t ccr;
ccr                81 drivers/mtd/nand/raw/ndfc.c 	ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
ccr                82 drivers/mtd/nand/raw/ndfc.c 	ccr |= NDFC_CCR_RESET_ECC;
ccr                83 drivers/mtd/nand/raw/ndfc.c 	out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
ccr               189 drivers/mtd/nand/raw/ndfc.c 	u32 ccr;
ccr               219 drivers/mtd/nand/raw/ndfc.c 	ccr = NDFC_CCR_BS(ndfc->chip_select);
ccr               224 drivers/mtd/nand/raw/ndfc.c 		ccr |= be32_to_cpup(reg);
ccr               226 drivers/mtd/nand/raw/ndfc.c 	out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
ccr               111 drivers/mtd/nand/raw/tmio_nand.c 	void __iomem *ccr;
ccr               317 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x81, tmio->ccr + CCR_ICC);
ccr               320 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite16(tmio->fcr_base, tmio->ccr + CCR_BASE);
ccr               321 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite16(tmio->fcr_base >> 16, tmio->ccr + CCR_BASE + 2);
ccr               324 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND);
ccr               328 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC);
ccr               331 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC);
ccr               363 drivers/mtd/nand/raw/tmio_nand.c 	struct resource *ccr = platform_get_resource(dev,
ccr               388 drivers/mtd/nand/raw/tmio_nand.c 	tmio->ccr = devm_ioremap(&dev->dev, ccr->start, resource_size(ccr));
ccr               389 drivers/mtd/nand/raw/tmio_nand.c 	if (!tmio->ccr)
ccr               141 drivers/net/can/sja1000/peak_pcmcia.c 	u8 ccr;
ccr               224 drivers/net/can/sja1000/peak_pcmcia.c 		if (card->ccr == v)
ccr               226 drivers/net/can/sja1000/peak_pcmcia.c 		card->ccr = v;
ccr               344 drivers/net/can/sja1000/peak_pcmcia.c 	u8 ccr = card->ccr;
ccr               350 drivers/net/can/sja1000/peak_pcmcia.c 			ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
ccr               352 drivers/net/can/sja1000/peak_pcmcia.c 			ccr |= PCC_CCR_LED_CHAN(state, i);
ccr               356 drivers/net/can/sja1000/peak_pcmcia.c 	pcan_write_reg(card, PCC_CCR, ccr);
ccr               381 drivers/net/can/sja1000/peak_pcmcia.c 	u8 ccr;
ccr               383 drivers/net/can/sja1000/peak_pcmcia.c 	ccr = card->ccr;
ccr               386 drivers/net/can/sja1000/peak_pcmcia.c 		ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
ccr               387 drivers/net/can/sja1000/peak_pcmcia.c 		ccr |= PCC_CCR_LED_ON_CHAN(i);
ccr               396 drivers/net/can/sja1000/peak_pcmcia.c 		ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
ccr               397 drivers/net/can/sja1000/peak_pcmcia.c 		ccr |= PCC_CCR_LED_SLOW_CHAN(i);
ccr               402 drivers/net/can/sja1000/peak_pcmcia.c 			ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
ccr               403 drivers/net/can/sja1000/peak_pcmcia.c 			ccr |= PCC_CCR_LED_FAST_CHAN(i);
ccr               407 drivers/net/can/sja1000/peak_pcmcia.c 			ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
ccr               408 drivers/net/can/sja1000/peak_pcmcia.c 			ccr |= PCC_CCR_LED_FAST_CHAN(i);
ccr               413 drivers/net/can/sja1000/peak_pcmcia.c 	pcan_write_reg(card, PCC_CCR, ccr);
ccr               518 drivers/net/can/sja1000/peak_pcmcia.c 	u8 ccr = PCC_CCR_INIT;
ccr               521 drivers/net/can/sja1000/peak_pcmcia.c 	card->ccr = ~ccr;
ccr               522 drivers/net/can/sja1000/peak_pcmcia.c 	pcan_write_reg(card, PCC_CCR, ccr);
ccr               527 drivers/net/can/sja1000/peak_pcmcia.c 	ccr &= ~PCC_CCR_RST_ALL;
ccr               528 drivers/net/can/sja1000/peak_pcmcia.c 	pcan_write_reg(card, PCC_CCR, ccr);
ccr               581 drivers/net/can/sja1000/peak_pcmcia.c 		ccr &= ~PCC_CCR_LED_OFF_CHAN(i);
ccr               589 drivers/net/can/sja1000/peak_pcmcia.c 	pcan_write_reg(card, PCC_CCR, ccr);
ccr               341 drivers/net/phy/at803x.c 	int ccr;
ccr               351 drivers/net/phy/at803x.c 	ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
ccr               352 drivers/net/phy/at803x.c 	if ((ccr & AT803X_MODE_CFG_MASK) != AT803X_MODE_CFG_SGMII)
ccr               356 drivers/net/phy/at803x.c 	phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr & ~AT803X_BT_BX_REG_SEL);
ccr               364 drivers/net/phy/at803x.c 	phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL);
ccr               111 drivers/pcmcia/pxa2xx_sharpsl.c 	unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr;
ccr               131 drivers/pcmcia/pxa2xx_sharpsl.c 	nccr = (ccr = read_scoop_reg(scoop, SCOOP_CCR)) & ~0x0080;
ccr               168 drivers/pcmcia/pxa2xx_sharpsl.c 	if (ccr != nccr)
ccr               111 drivers/pwm/pwm-stm32.c 	u32 ccen, ccr;
ccr               121 drivers/pwm/pwm-stm32.c 	ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
ccr               130 drivers/pwm/pwm-stm32.c 	ret = stm32_timers_dma_burst_read(parent, priv->capture, dma_id, ccr, 2,
ccr               401 drivers/rtc/rtc-armada38x.c 	unsigned long ccr, flags;
ccr               405 drivers/rtc/rtc-armada38x.c 	ccr = rtc->data->read_rtc_reg(rtc, RTC_CCR);
ccr               408 drivers/rtc/rtc-armada38x.c 	ppb_cor = (ccr & RTC_CCR_MODE ? 3815 : 954) * (s8)ccr;
ccr               418 drivers/rtc/rtc-armada38x.c 	unsigned long ccr = 0;
ccr               437 drivers/rtc/rtc-armada38x.c 		ccr = RTC_CCR_MODE;
ccr               445 drivers/rtc/rtc-armada38x.c 	ccr |= (off & 0x3fff) ^ 0x2000;
ccr               446 drivers/rtc/rtc-armada38x.c 	rtc_delayed_write(ccr, rtc, RTC_CCR);
ccr               250 drivers/rtc/rtc-asm9260.c 	u32 ccr;
ccr               275 drivers/rtc/rtc-asm9260.c 	ccr = ioread32(priv->iobase + HW_CCR);
ccr               277 drivers/rtc/rtc-asm9260.c 	if ((ccr & (BM_CLKEN | BM_CTCRST)) != BM_CLKEN) {
ccr               279 drivers/rtc/rtc-asm9260.c 		ccr = 0;
ccr               282 drivers/rtc/rtc-asm9260.c 	iowrite32(BM_CLKEN | ccr, priv->iobase + HW_CCR);
ccr               207 drivers/rtc/rtc-isl12026.c 	u8 ccr[8];
ccr               244 drivers/rtc/rtc-isl12026.c 	msgs[1].len = sizeof(ccr);
ccr               245 drivers/rtc/rtc-isl12026.c 	msgs[1].buf = ccr;
ccr               254 drivers/rtc/rtc-isl12026.c 	tm->tm_sec = bcd2bin(ccr[0] & 0x7F);
ccr               255 drivers/rtc/rtc-isl12026.c 	tm->tm_min = bcd2bin(ccr[1] & 0x7F);
ccr               256 drivers/rtc/rtc-isl12026.c 	if (ccr[2] & ISL12026_REG_HR_MIL)
ccr               257 drivers/rtc/rtc-isl12026.c 		tm->tm_hour = bcd2bin(ccr[2] & 0x3F);
ccr               259 drivers/rtc/rtc-isl12026.c 		tm->tm_hour = bcd2bin(ccr[2] & 0x1F) +
ccr               260 drivers/rtc/rtc-isl12026.c 			((ccr[2] & 0x20) ? 12 : 0);
ccr               261 drivers/rtc/rtc-isl12026.c 	tm->tm_mday = bcd2bin(ccr[3] & 0x3F);
ccr               262 drivers/rtc/rtc-isl12026.c 	tm->tm_mon = bcd2bin(ccr[4] & 0x1F) - 1;
ccr               263 drivers/rtc/rtc-isl12026.c 	tm->tm_year = bcd2bin(ccr[5]);
ccr               264 drivers/rtc/rtc-isl12026.c 	if (bcd2bin(ccr[7]) == 20)
ccr               266 drivers/rtc/rtc-isl12026.c 	tm->tm_wday = ccr[6] & 0x07;
ccr                80 drivers/rtc/rtc-xgene.c 	u32 ccr;
ccr                82 drivers/rtc/rtc-xgene.c 	ccr = readl(pdata->csr_base + RTC_CCR);
ccr                84 drivers/rtc/rtc-xgene.c 		ccr &= ~RTC_CCR_MASK;
ccr                85 drivers/rtc/rtc-xgene.c 		ccr |= RTC_CCR_IE;
ccr                87 drivers/rtc/rtc-xgene.c 		ccr &= ~RTC_CCR_IE;
ccr                88 drivers/rtc/rtc-xgene.c 		ccr |= RTC_CCR_MASK;
ccr                90 drivers/rtc/rtc-xgene.c 	writel(ccr, pdata->csr_base + RTC_CCR);
ccr                97 drivers/spi/spi-mpc512x-psc.c 	u32 ccr;
ccr               120 drivers/spi/spi-mpc512x-psc.c 	ccr = in_be32(psc_addr(mps, ccr));
ccr               121 drivers/spi/spi-mpc512x-psc.c 	ccr &= 0xFF000000;
ccr               127 drivers/spi/spi-mpc512x-psc.c 	ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
ccr               128 drivers/spi/spi-mpc512x-psc.c 	out_be32(psc_addr(mps, ccr), ccr);
ccr               410 drivers/spi/spi-mpc512x-psc.c 	u32 ccr;
ccr               438 drivers/spi/spi-mpc512x-psc.c 	ccr = in_be32(psc_addr(mps, ccr));
ccr               439 drivers/spi/spi-mpc512x-psc.c 	ccr &= 0xFF000000;
ccr               442 drivers/spi/spi-mpc512x-psc.c 	ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
ccr               443 drivers/spi/spi-mpc512x-psc.c 	out_be32(psc_addr(mps, ccr), ccr);
ccr                77 drivers/spi/spi-mpc52xx-psc.c 	u16 ccr;
ccr               101 drivers/spi/spi-mpc52xx-psc.c 	ccr = in_be16((u16 __iomem *)&psc->ccr);
ccr               102 drivers/spi/spi-mpc52xx-psc.c 	ccr &= 0xFF00;
ccr               104 drivers/spi/spi-mpc52xx-psc.c 		ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
ccr               106 drivers/spi/spi-mpc52xx-psc.c 		ccr |= (MCLK / 1000000 - 1) & 0xFF;
ccr               107 drivers/spi/spi-mpc52xx-psc.c 	out_be16((u16 __iomem *)&psc->ccr, ccr);
ccr               335 drivers/spi/spi-mpc52xx-psc.c 	out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */
ccr               331 drivers/spi/spi-stm32-qspi.c 	u32 ccr, cr, addr_max;
ccr               367 drivers/spi/spi-stm32-qspi.c 	ccr = qspi->fmode;
ccr               368 drivers/spi/spi-stm32-qspi.c 	ccr |= FIELD_PREP(CCR_INST_MASK, op->cmd.opcode);
ccr               369 drivers/spi/spi-stm32-qspi.c 	ccr |= FIELD_PREP(CCR_IMODE_MASK,
ccr               373 drivers/spi/spi-stm32-qspi.c 		ccr |= FIELD_PREP(CCR_ADMODE_MASK,
ccr               375 drivers/spi/spi-stm32-qspi.c 		ccr |= FIELD_PREP(CCR_ADSIZE_MASK, op->addr.nbytes - 1);
ccr               379 drivers/spi/spi-stm32-qspi.c 		ccr |= FIELD_PREP(CCR_DCYC_MASK,
ccr               383 drivers/spi/spi-stm32-qspi.c 		ccr |= FIELD_PREP(CCR_DMODE_MASK,
ccr               387 drivers/spi/spi-stm32-qspi.c 	writel_relaxed(ccr, qspi->io_base + QSPI_CCR);
ccr               361 drivers/tty/cyclades.c 	void __iomem *ccr = base_addr + (CyCCR << index);
ccr               366 drivers/tty/cyclades.c 		if (readb(ccr) == 0)
ccr               376 drivers/tty/cyclades.c 	cy_writeb(ccr, cmd);
ccr                65 drivers/usb/host/ohci-tmio.c 	void __iomem		*ccr;
ccr                85 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
ccr               110 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(0, tmio->ccr + CCR_INTC);
ccr               111 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(0, tmio->ccr + CCR_ILME);
ccr               112 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(0, tmio->ccr + CCR_BASE);
ccr               113 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
ccr               114 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
ccr               124 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(base, tmio->ccr + CCR_BASE);
ccr               125 drivers/usb/host/ohci-tmio.c 	tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
ccr               126 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(1, tmio->ccr + CCR_ILME);
ccr               127 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(2, tmio->ccr + CCR_INTC);
ccr               130 drivers/usb/host/ohci-tmio.c 			tmio_ioread8(tmio->ccr + CCR_REVID),
ccr               218 drivers/usb/host/ohci-tmio.c 	tmio->ccr = ioremap(config->start, resource_size(config));
ccr               219 drivers/usb/host/ohci-tmio.c 	if (!tmio->ccr) {
ccr               262 drivers/usb/host/ohci-tmio.c 	iounmap(tmio->ccr);
ccr               281 drivers/usb/host/ohci-tmio.c 	iounmap(tmio->ccr);
ccr               304 drivers/usb/host/ohci-tmio.c 	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
ccr               306 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
ccr               342 drivers/usb/host/ohci-tmio.c 	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
ccr               344 drivers/usb/host/ohci-tmio.c 	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
ccr               108 drivers/video/fbdev/cg14.c 	u8 ccr;	/* Clock Control Reg */
ccr               142 drivers/video/fbdev/cg14.c 	u8 ccr;	/* Cursor Control Reg */
ccr               196 drivers/video/fbdev/tmiofb.c 	void __iomem			*ccr;
ccr               249 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0, par->ccr + CCR_UGCC);
ccr               274 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x003a, par->ccr + CCR_UGCC);
ccr               275 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x003a, par->ccr + CCR_GCC);
ccr               276 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x3f00, par->ccr + CCR_USC);
ccr               280 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x0000, par->ccr + CCR_USC);
ccr               281 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH);
ccr               282 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(base, par->ccr + CCR_BASEL);
ccr               283 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */
ccr               284 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */
ccr               285 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x0018, par->ccr + CCR_VRAMSAC); /* VRAMSTS, VRAMAC */
ccr               286 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x0002, par->ccr + CCR_VRAMBC);
ccr               288 drivers/video/fbdev/tmiofb.c 	tmio_iowrite16(0x000b, par->ccr + CCR_VRAMBC);
ccr               674 drivers/video/fbdev/tmiofb.c 	struct resource *ccr = platform_get_resource(dev, IORESOURCE_MEM, 1);
ccr               689 drivers/video/fbdev/tmiofb.c 	if (ccr == NULL || lcr == NULL || vram == NULL || irq < 0) {
ccr               725 drivers/video/fbdev/tmiofb.c 	par->ccr = ioremap(ccr->start, resource_size(ccr));
ccr               726 drivers/video/fbdev/tmiofb.c 	if (!par->ccr) {
ccr               794 drivers/video/fbdev/tmiofb.c 	iounmap(par->ccr);
ccr               820 drivers/video/fbdev/tmiofb.c 		iounmap(par->ccr);
ccr               836 drivers/video/fbdev/tmiofb.c 		tmio_ioread16(par->ccr + CCR_ ## n));
ccr                83 sound/pci/ctxfi/cthw20k1.c 		u16 ccr:1;
ccr                96 sound/pci/ctxfi/cthw20k1.c 	unsigned int 	ccr;
ccr               288 sound/pci/ctxfi/cthw20k1.c 	set_field(&ctl->ccr, SRCCCR_CISZ, cisz);
ccr               289 sound/pci/ctxfi/cthw20k1.c 	ctl->dirty.bf.ccr = 1;
ccr               404 sound/pci/ctxfi/cthw20k1.c 	if (ctl->dirty.bf.ccr) {
ccr               405 sound/pci/ctxfi/cthw20k1.c 		hw_write_20kx(hw, SRCCCR+idx*0x100, ctl->ccr);
ccr               406 sound/pci/ctxfi/cthw20k1.c 		ctl->dirty.bf.ccr = 0;
ccr                83 sound/pci/ctxfi/cthw20k2.c 		u16 ccr:1;
ccr                96 sound/pci/ctxfi/cthw20k2.c 	unsigned int 	ccr;
ccr               288 sound/pci/ctxfi/cthw20k2.c 	set_field(&ctl->ccr, SRCCCR_CISZ, cisz);
ccr               289 sound/pci/ctxfi/cthw20k2.c 	ctl->dirty.bf.ccr = 1;
ccr               404 sound/pci/ctxfi/cthw20k2.c 	if (ctl->dirty.bf.ccr) {
ccr               405 sound/pci/ctxfi/cthw20k2.c 		hw_write_20kx(hw, SRC_CCR+idx*0x100, ctl->ccr);
ccr               406 sound/pci/ctxfi/cthw20k2.c 		ctl->dirty.bf.ccr = 0;
ccr               246 sound/soc/dwc/dwc-i2s.c 		dev->ccr = 0x00;
ccr               252 sound/soc/dwc/dwc-i2s.c 		dev->ccr = 0x08;
ccr               258 sound/soc/dwc/dwc-i2s.c 		dev->ccr = 0x10;
ccr               282 sound/soc/dwc/dwc-i2s.c 	i2s_write_reg(dev->i2s_base, CCR, dev->ccr);
ccr                98 sound/soc/dwc/local.h 	u32 ccr;
ccr                51 tools/perf/arch/powerpc/util/perf_regs.c 	SMPL_REG(ccr, PERF_REG_POWERPC_CCR),