config_reg         63 drivers/clk/qcom/a53-pll.c 	pll->config_reg = 0x14;
config_reg         31 drivers/clk/qcom/clk-hfpll.c 		regmap_write(regmap, hd->config_reg, hd->config_val);
config_reg         17 drivers/clk/qcom/clk-hfpll.h 	u32 config_reg;
config_reg        103 drivers/clk/qcom/clk-pll.c 		regmap_read(pll->clkr.regmap, pll->config_reg, &config);
config_reg        162 drivers/clk/qcom/clk-pll.c 	regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits);
config_reg        242 drivers/clk/qcom/clk-pll.c 	regmap_update_bits(regmap, pll->config_reg, mask, val);
config_reg         43 drivers/clk/qcom/clk-pll.h 	u32	config_reg;
config_reg        105 drivers/clk/qcom/gcc-apq8084.c 	.config_reg = 0x0014,
config_reg        168 drivers/clk/qcom/gcc-apq8084.c 	.config_reg = 0x0054,
config_reg        195 drivers/clk/qcom/gcc-apq8084.c 	.config_reg = 0x1dd4,
config_reg         32 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x30d4,
config_reg         59 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x3174,
config_reg         86 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x3154,
config_reg        114 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x3204,
config_reg        140 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x3244,
config_reg        166 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x3304,
config_reg        191 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x31d4,
config_reg        232 drivers/clk/qcom/gcc-ipq806x.c 	.config_reg = 0x31b4,
config_reg         44 drivers/clk/qcom/gcc-mdm9615.c 	.config_reg = 0x30d4,
config_reg         82 drivers/clk/qcom/gcc-mdm9615.c 	.config_reg = 0x3154,
config_reg        109 drivers/clk/qcom/gcc-mdm9615.c 	.config_reg = 0x31d4,
config_reg         31 drivers/clk/qcom/gcc-msm8660.c 	.config_reg = 0x3154,
config_reg        263 drivers/clk/qcom/gcc-msm8916.c 	.config_reg = 0x21014,
config_reg        290 drivers/clk/qcom/gcc-msm8916.c 	.config_reg = 0x20014,
config_reg        317 drivers/clk/qcom/gcc-msm8916.c 	.config_reg = 0x4a014,
config_reg        344 drivers/clk/qcom/gcc-msm8916.c 	.config_reg = 0x23014,
config_reg         32 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3174,
config_reg         59 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3154,
config_reg         87 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3204,
config_reg        113 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3244,
config_reg        127 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3304,
config_reg        153 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3284,
config_reg        179 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x32c4,
config_reg        205 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3304,
config_reg        219 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x3404,
config_reg        244 drivers/clk/qcom/gcc-msm8960.c 	.config_reg = 0x31d4,
config_reg         61 drivers/clk/qcom/gcc-msm8974.c 	.config_reg = 0x0014,
config_reg        124 drivers/clk/qcom/gcc-msm8974.c 	.config_reg = 0x0054,
config_reg        151 drivers/clk/qcom/gcc-msm8974.c 	.config_reg = 0x1dd4,
config_reg        403 drivers/clk/qcom/gcc-qcs404.c 	.config_reg = 0x37014,
config_reg         22 drivers/clk/qcom/hfpll.c 	.config_reg = 0x14,
config_reg         30 drivers/clk/qcom/lcc-ipq806x.c 	.config_reg = 0x14,
config_reg         32 drivers/clk/qcom/lcc-mdm9615.c 	.config_reg = 0x14,
config_reg         30 drivers/clk/qcom/lcc-msm8960.c 	.config_reg = 0x14,
config_reg        218 drivers/clk/qcom/mmcc-apq8084.c 	.config_reg = 0x0014,
config_reg        245 drivers/clk/qcom/mmcc-apq8084.c 	.config_reg = 0x0050,
config_reg        272 drivers/clk/qcom/mmcc-apq8084.c 	.config_reg = 0x4110,
config_reg        287 drivers/clk/qcom/mmcc-apq8084.c 	.config_reg = 0x0090,
config_reg        303 drivers/clk/qcom/mmcc-apq8084.c 	.config_reg = 0x00b0,
config_reg        112 drivers/clk/qcom/mmcc-msm8960.c 	.config_reg = 0x32c,
config_reg        128 drivers/clk/qcom/mmcc-msm8960.c 	.config_reg = 0x348,
config_reg        183 drivers/clk/qcom/mmcc-msm8974.c 	.config_reg = 0x0014,
config_reg        210 drivers/clk/qcom/mmcc-msm8974.c 	.config_reg = 0x0050,
config_reg        237 drivers/clk/qcom/mmcc-msm8974.c 	.config_reg = 0x4110,
config_reg        252 drivers/clk/qcom/mmcc-msm8974.c 	.config_reg = 0x0090,
config_reg        254 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 				      u8 *config_reg)
config_reg        264 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	ret = i2c_master_recv(client, config_reg, 1);
config_reg        269 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	dev_dbg(&client->dev, "Config register :%x\n", *config_reg);
config_reg        288 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	u8 config_reg;
config_reg        291 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
config_reg        295 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	config_reg &= 0x7E;
config_reg        296 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	config_reg |= ((i & 1) << 7) + ((i & 2) >> 1);
config_reg        300 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 					 config_reg);
config_reg        319 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	u8 config_reg;
config_reg        322 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
config_reg        327 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	return sprintf(buf, "%d\n", (config_reg & 0x40) >> 6);
config_reg        345 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	u8 config_reg;
config_reg        349 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
config_reg        354 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	return sprintf(buf, "%d\n", (config_reg & 0x4) >> 2);
config_reg        373 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	u8 val, config_reg;
config_reg        384 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
config_reg        390 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	config_reg &= 0xFB;
config_reg        391 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 	config_reg |= val << 2;
config_reg        395 drivers/iio/common/ms_sensors/ms_sensors_i2c.c 					config_reg);
config_reg        107 drivers/input/misc/max77693-haptic.c 	unsigned int value, config_reg;
config_reg        116 drivers/input/misc/max77693-haptic.c 		config_reg = MAX77693_HAPTIC_REG_CONFIG2;
config_reg        122 drivers/input/misc/max77693-haptic.c 		config_reg = MAX77843_HAP_REG_MCONFIG;
config_reg        129 drivers/input/misc/max77693-haptic.c 			     config_reg, value);
config_reg        244 drivers/pinctrl/sh-pfc/core.c 		const struct pinmux_cfg_reg *config_reg =
config_reg        246 drivers/pinctrl/sh-pfc/core.c 		unsigned int r_width = config_reg->reg_width;
config_reg        247 drivers/pinctrl/sh-pfc/core.c 		unsigned int f_width = config_reg->field_width;
config_reg        263 drivers/pinctrl/sh-pfc/core.c 				curr_width = config_reg->var_field_width[m];
config_reg        267 drivers/pinctrl/sh-pfc/core.c 				if (config_reg->enum_ids[pos + n] == enum_id) {
config_reg        268 drivers/pinctrl/sh-pfc/core.c 					*crp = config_reg;
config_reg       3866 drivers/scsi/qla1280.c 	uint16_t config_reg, scsi_control;
config_reg       3871 drivers/scsi/qla1280.c 		config_reg = RD_REG_WORD(&reg->cfg_1);
config_reg       3874 drivers/scsi/qla1280.c 		WRT_REG_WORD(&reg->cfg_1, config_reg);
config_reg        183 drivers/spi/spi-zynq-qspi.c 	u32 config_reg;
config_reg        197 drivers/spi/spi-zynq-qspi.c 	config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
config_reg        198 drivers/spi/spi-zynq-qspi.c 	config_reg &= ~(ZYNQ_QSPI_CONFIG_MSTREN_MASK |
config_reg        205 drivers/spi/spi-zynq-qspi.c 	config_reg |= (ZYNQ_QSPI_CONFIG_MSTREN_MASK |
config_reg        209 drivers/spi/spi-zynq-qspi.c 	zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
config_reg        289 drivers/spi/spi-zynq-qspi.c 	u32 config_reg;
config_reg        291 drivers/spi/spi-zynq-qspi.c 	config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
config_reg        294 drivers/spi/spi-zynq-qspi.c 		config_reg &= ~ZYNQ_QSPI_CONFIG_SSCTRL_MASK;
config_reg        295 drivers/spi/spi-zynq-qspi.c 		config_reg |= (((~(BIT(spi->chip_select))) <<
config_reg        299 drivers/spi/spi-zynq-qspi.c 		config_reg |= ZYNQ_QSPI_CONFIG_SSCTRL_MASK;
config_reg        302 drivers/spi/spi-zynq-qspi.c 	zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
config_reg        324 drivers/spi/spi-zynq-qspi.c 	u32 config_reg, baud_rate_val = 0;
config_reg        340 drivers/spi/spi-zynq-qspi.c 	config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
config_reg        343 drivers/spi/spi-zynq-qspi.c 	config_reg &= (~ZYNQ_QSPI_CONFIG_CPHA_MASK) &
config_reg        346 drivers/spi/spi-zynq-qspi.c 		config_reg |= ZYNQ_QSPI_CONFIG_CPHA_MASK;
config_reg        348 drivers/spi/spi-zynq-qspi.c 		config_reg |= ZYNQ_QSPI_CONFIG_CPOL_MASK;
config_reg        350 drivers/spi/spi-zynq-qspi.c 	config_reg &= ~ZYNQ_QSPI_CONFIG_BDRATE_MASK;
config_reg        351 drivers/spi/spi-zynq-qspi.c 	config_reg |= (baud_rate_val << ZYNQ_QSPI_BAUD_DIV_SHIFT);
config_reg        352 drivers/spi/spi-zynq-qspi.c 	zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
config_reg        265 drivers/spi/spi-zynqmp-gqspi.c 	u32 config_reg;
config_reg        287 drivers/spi/spi-zynqmp-gqspi.c 	config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
config_reg        288 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_MODE_EN_MASK;
config_reg        290 drivers/spi/spi-zynqmp-gqspi.c 	config_reg |= GQSPI_CFG_GEN_FIFO_START_MODE_MASK;
config_reg        292 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_ENDIAN_MASK;
config_reg        294 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK;
config_reg        296 drivers/spi/spi-zynqmp-gqspi.c 	config_reg |= GQSPI_CFG_WP_HOLD_MASK;
config_reg        298 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK;
config_reg        300 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_CLK_PHA_MASK;
config_reg        302 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_CLK_POL_MASK;
config_reg        303 drivers/spi/spi-zynqmp-gqspi.c 	zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
config_reg        453 drivers/spi/spi-zynqmp-gqspi.c 	u32 config_reg, req_hz, baud_rate_val = 0;
config_reg        469 drivers/spi/spi-zynqmp-gqspi.c 	config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
config_reg        472 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= (~GQSPI_CFG_CLK_PHA_MASK) & (~GQSPI_CFG_CLK_POL_MASK);
config_reg        475 drivers/spi/spi-zynqmp-gqspi.c 		config_reg |= GQSPI_CFG_CLK_PHA_MASK;
config_reg        477 drivers/spi/spi-zynqmp-gqspi.c 		config_reg |= GQSPI_CFG_CLK_POL_MASK;
config_reg        479 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK;
config_reg        480 drivers/spi/spi-zynqmp-gqspi.c 	config_reg |= (baud_rate_val << GQSPI_CFG_BAUD_RATE_DIV_SHIFT);
config_reg        481 drivers/spi/spi-zynqmp-gqspi.c 	zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
config_reg        564 drivers/spi/spi-zynqmp-gqspi.c 	u32 config_reg, genfifoentry;
config_reg        578 drivers/spi/spi-zynqmp-gqspi.c 		config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
config_reg        579 drivers/spi/spi-zynqmp-gqspi.c 		config_reg &= ~GQSPI_CFG_MODE_EN_MASK;
config_reg        580 drivers/spi/spi-zynqmp-gqspi.c 		zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
config_reg        691 drivers/spi/spi-zynqmp-gqspi.c 	u32 rx_bytes, rx_rem, config_reg;
config_reg        698 drivers/spi/spi-zynqmp-gqspi.c 		config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
config_reg        699 drivers/spi/spi-zynqmp-gqspi.c 		config_reg &= ~GQSPI_CFG_MODE_EN_MASK;
config_reg        700 drivers/spi/spi-zynqmp-gqspi.c 		zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
config_reg        723 drivers/spi/spi-zynqmp-gqspi.c 	config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
config_reg        724 drivers/spi/spi-zynqmp-gqspi.c 	config_reg &= ~GQSPI_CFG_MODE_EN_MASK;
config_reg        725 drivers/spi/spi-zynqmp-gqspi.c 	config_reg |= GQSPI_CFG_MODE_EN_DMA_MASK;
config_reg        726 drivers/spi/spi-zynqmp-gqspi.c 	zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
config_reg        748 drivers/spi/spi-zynqmp-gqspi.c 	u32 config_reg;
config_reg        760 drivers/spi/spi-zynqmp-gqspi.c 			config_reg = zynqmp_gqspi_read(xqspi,
config_reg        762 drivers/spi/spi-zynqmp-gqspi.c 			config_reg &= ~GQSPI_CFG_MODE_EN_MASK;
config_reg        764 drivers/spi/spi-zynqmp-gqspi.c 								config_reg);
config_reg        700 drivers/tty/serial/sirfsoc_uart.c 	unsigned long	config_reg = 0;
config_reg        717 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_DATA_BIT_LEN_8;
config_reg        721 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_DATA_BIT_LEN_7;
config_reg        725 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_DATA_BIT_LEN_6;
config_reg        729 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_DATA_BIT_LEN_5;
config_reg        733 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_STOP_BIT_LEN_2;
config_reg        759 drivers/tty/serial/sirfsoc_uart.c 					config_reg |= SIRFUART_STICK_BIT_MARK;
config_reg        761 drivers/tty/serial/sirfsoc_uart.c 					config_reg |= SIRFUART_STICK_BIT_SPACE;
config_reg        764 drivers/tty/serial/sirfsoc_uart.c 					config_reg |= SIRFUART_STICK_BIT_ODD;
config_reg        766 drivers/tty/serial/sirfsoc_uart.c 					config_reg |= SIRFUART_STICK_BIT_EVEN;
config_reg        828 drivers/tty/serial/sirfsoc_uart.c 		config_reg |= SIRFUART_UART_RECV_TIMEOUT(rx_time_out);
config_reg        829 drivers/tty/serial/sirfsoc_uart.c 		wr_regl(port, ureg->sirfsoc_line_ctrl, config_reg);
config_reg       2413 drivers/usb/host/xhci-mem.c 	val2 = readl(&xhci->op_regs->config_reg);
config_reg       2417 drivers/usb/host/xhci-mem.c 	writel(val, &xhci->op_regs->config_reg);
config_reg        801 drivers/usb/host/xhci.c 	xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
config_reg        814 drivers/usb/host/xhci.c 	writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
config_reg        187 drivers/usb/host/xhci.h 	__le32	config_reg;
config_reg       1668 drivers/usb/host/xhci.h 	u32	config_reg;