ctxvals_pos 545 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c ctx->ctxvals_pos += len; ctxvals_pos 577 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c offset = ctx->ctxvals_pos; ctxvals_pos 578 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); ctxvals_pos 645 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c cp_pos (ctx, ctx->ctxvals_pos); ctxvals_pos 689 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c *size = ctx.ctxvals_pos * 4; ctxvals_pos 20 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h u32 ctxvals_pos; ctxvals_pos 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h ctx->ctxvals_base = ctx->ctxvals_pos; ctxvals_pos 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h ctx->ctxvals_pos = ctx->ctxvals_base + length; ctxvals_pos 113 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h ctx->ctxvals_pos = offset; ctxvals_pos 114 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h ctx->ctxvals_base = ctx->ctxvals_pos; ctxvals_pos 116 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h cp_lsr(ctx, ctx->ctxvals_pos); ctxvals_pos 250 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */ ctxvals_pos 283 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c *size = ctx.ctxvals_pos * 4; ctxvals_pos 789 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + i), val); ctxvals_pos 791 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos += num; ctxvals_pos 799 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c base = ctx->ctxvals_pos; ctxvals_pos 1107 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c num = ctx->ctxvals_pos - base; ctxvals_pos 1108 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = base; ctxvals_pos 1162 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + (i << 3)), val); ctxvals_pos 1164 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos += num << 3; ctxvals_pos 1197 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c offset = (ctx->ctxvals_pos+0x3f)&~0x3f; ctxvals_pos 1202 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset; ctxvals_pos 1208 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1209 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1212 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 0x1; ctxvals_pos 1218 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1219 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1222 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 0x2; ctxvals_pos 1229 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1230 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1233 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 3; ctxvals_pos 1237 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1238 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1242 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 4 + i; ctxvals_pos 1247 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1248 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1252 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset; ctxvals_pos 1259 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1260 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1263 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 1; ctxvals_pos 1265 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1266 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1269 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 2; ctxvals_pos 1273 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1274 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1277 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 3; ctxvals_pos 1279 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1280 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1283 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 4; ctxvals_pos 1285 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1286 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1289 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 5; ctxvals_pos 1296 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1297 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1300 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 6; ctxvals_pos 1312 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1313 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1316 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 7; ctxvals_pos 1333 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 1334 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 1337 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + size * 8; ctxvals_pos 1338 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = (ctx->ctxvals_pos+0x3f)&~0x3f; ctxvals_pos 3281 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c offset = (ctx->ctxvals_pos+0x3f)&~0x3f; ctxvals_pos 3285 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + i; ctxvals_pos 3292 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 3293 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 3297 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset; ctxvals_pos 3305 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 3306 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 3309 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 1; ctxvals_pos 3314 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 3315 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 3318 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 2; ctxvals_pos 3325 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 3326 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 3329 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + 3; ctxvals_pos 3336 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c if ((ctx->ctxvals_pos-offset)/8 > size) ctxvals_pos 3337 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c size = (ctx->ctxvals_pos-offset)/8; ctxvals_pos 3339 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = offset + size * 8; ctxvals_pos 3340 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c ctx->ctxvals_pos = (ctx->ctxvals_pos+0x3f)&~0x3f;