en 148 arch/arm/mach-imx/iomux-imx31.c void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en) en 154 arch/arm/mach-imx/iomux-imx31.c if (en) en 127 arch/arm/mach-imx/iomux-mx3.h void mxc_iomux_set_gpr(enum iomux_gp_func, bool en); en 135 arch/arm/mach-omap1/lcd_dma.c unsigned long en, fn; en 182 arch/arm/mach-omap1/lcd_dma.c en = lcd_dma.xres; en 197 arch/arm/mach-omap1/lcd_dma.c en = lcd_dma.yres; en 212 arch/arm/mach-omap1/lcd_dma.c en = lcd_dma.xres; en 227 arch/arm/mach-omap1/lcd_dma.c en = lcd_dma.yres; en 250 arch/arm/mach-omap1/lcd_dma.c omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1); en 267 arch/arm/vfp/vfpmodule.c #define RAISE(stat,en,sig) \ en 268 arch/arm/vfp/vfpmodule.c if (exceptions & stat && fpscr & en) \ en 179 arch/mips/alchemy/devboards/db1000.c static int db1100_mmc_cd_setup(void *mmc_host, int en) en 188 arch/mips/alchemy/devboards/db1000.c if (en) { en 197 arch/mips/alchemy/devboards/db1000.c static int db1100_mmc1_cd_setup(void *mmc_host, int en) en 206 arch/mips/alchemy/devboards/db1000.c if (en) { en 361 arch/mips/alchemy/devboards/db1200.c static int db1200_mmc_cd_setup(void *mmc_host, int en) en 365 arch/mips/alchemy/devboards/db1200.c if (en) { en 452 arch/mips/alchemy/devboards/db1200.c static int pb1200_mmc1_cd_setup(void *mmc_host, int en) en 456 arch/mips/alchemy/devboards/db1200.c if (en) { en 491 arch/mips/alchemy/devboards/db1300.c static int db1300_mmc_cd_setup(void *mmc_host, int en) en 495 arch/mips/alchemy/devboards/db1300.c if (en) { en 119 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c gmx_cfg.s.en = 1; en 170 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c if (mode.s.en == 0) en 244 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c gmx_cfg.s.en = 1; en 339 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c gmx_tx_ovr_bp.s.en |= 1 << index; en 358 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c new_gmx_cfg.s.en = 0; en 447 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c new_gmx_cfg.s.en = original_gmx_cfg.s.en; en 61 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c gmxx_prtx_cfg.s.en = 0; en 212 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c is_enabled = gmxx_prtx_cfg.s.en; en 213 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c gmxx_prtx_cfg.s.en = 0; en 291 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c gmxx_prtx_cfg.s.en = is_enabled; en 352 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c mode.s.en = 1; en 377 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c gmxx_prtx_cfg.s.en = 1; en 77 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c mode.s.en = 1; en 184 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c gmx_cfg.s.en = 0; en 239 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c gmx_cfg.s.en = 1; en 230 arch/mips/cavium-octeon/executive/cvmx-helper.c if (!mode.s.en) en 343 arch/mips/cavium-octeon/executive/cvmx-helper.c if (!mode.s.en) en 895 arch/mips/cavium-octeon/executive/cvmx-helper.c gmx_cfg.s.en = 1; en 86 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c if (mode.s.en) { en 102 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c if (mode.s.en) { en 86 arch/mips/cavium-octeon/flash_setup.c if (region_cfg.s.en) { en 2120 arch/mips/cavium-octeon/octeon-irq.c u64 en; en 2125 arch/mips/cavium-octeon/octeon-irq.c en = cvmx_read_csr(host_data->en_reg); en 2126 arch/mips/cavium-octeon/octeon-irq.c en |= 1ull << cd->bit; en 2127 arch/mips/cavium-octeon/octeon-irq.c cvmx_write_csr(host_data->en_reg, en); en 2134 arch/mips/cavium-octeon/octeon-irq.c u64 en; en 2139 arch/mips/cavium-octeon/octeon-irq.c en = cvmx_read_csr(host_data->en_reg); en 2140 arch/mips/cavium-octeon/octeon-irq.c en &= ~(1ull << cd->bit); en 2141 arch/mips/cavium-octeon/octeon-irq.c cvmx_write_csr(host_data->en_reg, en); en 2223 arch/mips/cavium-octeon/octeon-irq.c u64 en; en 2231 arch/mips/cavium-octeon/octeon-irq.c en = cvmx_read_csr(host_data->en_reg); en 2234 arch/mips/cavium-octeon/octeon-irq.c bits = en & raw; en 2246 arch/mips/cavium-octeon/octeon-irq.c en = cvmx_read_csr(host_data->en_reg); en 2247 arch/mips/cavium-octeon/octeon-irq.c en &= ~(1ull << i); en 2248 arch/mips/cavium-octeon/octeon-irq.c cvmx_write_csr(host_data->en_reg, en); en 2395 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2400 arch/mips/cavium-octeon/octeon-irq.c isc_ctl.s.en = 1; en 2416 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2457 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2474 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2512 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2517 arch/mips/cavium-octeon/octeon-irq.c isc_ctl.s.en = 1; en 2603 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2658 arch/mips/cavium-octeon/octeon-irq.c isc_w1c.s.en = 1; en 2689 arch/mips/cavium-octeon/octeon-irq.c static void octeon_irq_ciu3_mbox_set_enable(struct irq_data *data, int cpu, bool en) en 2703 arch/mips/cavium-octeon/octeon-irq.c isc_ctl.s.en = 1; en 2707 arch/mips/cavium-octeon/octeon-irq.c if (en) { en 2711 arch/mips/cavium-octeon/octeon-irq.c isc_ctl.s.en = 1; en 105 arch/mips/cavium-octeon/octeon-platform.c if_ena.s.en = 1; en 954 arch/mips/cavium-octeon/octeon-platform.c if (mio_boot_reg_cfg.s.en && base_ptr >= region_base en 977 arch/mips/cavium-octeon/octeon-platform.c if (!mio_boot_reg_cfg.s.en) en 1044 arch/mips/cavium-octeon/octeon-platform.c if (mio_boot_reg_cfg.s.en && base_ptr >= region_base en 359 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline void __alchemy_gpio2_mod_int(int gpio2, int en) en 363 arch/mips/include/asm/mach-au1x00/gpio-au1000.h if (en) en 228 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_9xx_pic_write_irt(uint64_t base, int irt_num, int en, int nmi, en 233 arch/mips/include/asm/netlogic/xlp-hal/pic.h val = (((uint64_t)en & 0x1) << 22) | ((nmi & 0x1) << 23) | en 242 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_pic_write_irt(uint64_t base, int irt_num, int en, int nmi, en 247 arch/mips/include/asm/netlogic/xlp-hal/pic.h val = (((uint64_t)en & 0x1) << 31) | ((nmi & 0x1) << 29) | en 256 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_pic_write_irt_direct(uint64_t base, int irt_num, int en, int nmi, en 260 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_9xx_pic_write_irt(base, irt_num, en, nmi, sch, vec, en 263 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_pic_write_irt(base, irt_num, en, nmi, sch, vec, 1, en 290 arch/mips/include/asm/netlogic/xlp-hal/pic.h int en; en 292 arch/mips/include/asm/netlogic/xlp-hal/pic.h en = (irq > 0); en 295 arch/mips/include/asm/netlogic/xlp-hal/pic.h en, 0, 0, irq, cpu); en 358 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_pic_init_irt(uint64_t base, int irt, int irq, int hwt, int en) en 360 arch/mips/include/asm/netlogic/xlp-hal/pic.h nlm_pic_write_irt_direct(base, irt, en, 0, 0, irq, hwt); en 258 arch/mips/include/asm/netlogic/xlr/pic.h nlm_pic_init_irt(uint64_t base, int irt, int irq, int hwt, int en) en 263 arch/mips/include/asm/netlogic/xlr/pic.h (en << 30) | (1 << 6) | irq); en 292 arch/mips/include/asm/netlogic/xlr/pic.h int en; en 294 arch/mips/include/asm/netlogic/xlr/pic.h en = (irq > 0); en 280 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 284 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 306 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 308 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 331 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 333 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 415 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:8; en 417 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:8; en 1645 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:2; en 1655 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:2; en 1662 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 1672 arch/mips/include/asm/octeon/cvmx-agl-defs.h uint64_t en:1; en 271 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 275 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 289 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 293 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 304 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 308 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 1; en 331 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 64; en 333 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h uint64_t en : 64; en 118 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:1; en 120 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:1; en 128 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:1; en 130 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:1; en 708 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:8; en 710 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:8; en 734 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:8; en 736 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t en:8; en 374 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 378 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 393 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 397 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 405 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 409 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 420 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 424 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 439 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 443 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 460 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 464 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 481 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 485 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 510 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 512 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 532 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 534 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 552 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 554 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:1; en 2098 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:4; en 2104 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:4; en 2113 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:3; en 2123 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:3; en 2130 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:4; en 2136 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:4; en 2145 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:2; en 2155 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h uint64_t en:2; en 222 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t en:1; en 224 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t en:1; en 102 arch/mips/include/asm/octeon/cvmx-led-defs.h uint64_t en:1; en 104 arch/mips/include/asm/octeon/cvmx-led-defs.h uint64_t en:1; en 243 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t en:1; en 251 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t en:1; en 260 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t en:1; en 268 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t en:1; en 321 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 341 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 465 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 473 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 599 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 611 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 627 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 639 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 649 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 659 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 671 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 683 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 2500 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 2520 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 3615 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 3617 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 4030 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 4032 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t en:1; en 93 arch/mips/include/asm/octeon/cvmx-mixx-defs.h uint64_t en:1; en 103 arch/mips/include/asm/octeon/cvmx-mixx-defs.h uint64_t en:1; en 115 arch/mips/include/asm/octeon/cvmx-mixx-defs.h uint64_t en:1; en 125 arch/mips/include/asm/octeon/cvmx-mixx-defs.h uint64_t en:1; en 2016 arch/mips/include/asm/octeon/cvmx-npi-defs.h uint64_t en:1; en 2022 arch/mips/include/asm/octeon/cvmx-npi-defs.h uint64_t en:1; en 2032 arch/mips/include/asm/octeon/cvmx-npi-defs.h uint64_t en:1; en 2038 arch/mips/include/asm/octeon/cvmx-npi-defs.h uint64_t en:1; en 2510 arch/mips/include/asm/octeon/cvmx-pip-defs.h uint64_t en:8; en 2512 arch/mips/include/asm/octeon/cvmx-pip-defs.h uint64_t en:8; en 491 arch/mips/include/asm/octeon/cvmx-pip.h pip_tag_incx.s.en = 0; en 518 arch/mips/include/asm/octeon/cvmx-pip.h pip_tag_incx.s.en |= 0x80 >> (offset & 0x7); en 185 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h uint64_t en:1; en 187 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h uint64_t en:1; en 328 arch/mips/paravirt/paravirt-irq.c u32 en; en 330 arch/mips/paravirt/paravirt-irq.c en = __raw_readl(mips_irq_chip + mips_irq_chip_reg_src + en 333 arch/mips/paravirt/paravirt-irq.c if (!en) { en 334 arch/mips/paravirt/paravirt-irq.c en = __raw_readl(mips_irq_chip + mips_irq_chip_reg_src + (cpuid * mips_irq_cpu_stride) + sizeof(u32)); en 335 arch/mips/paravirt/paravirt-irq.c en = (en >> (2 * cpuid)) & 3; en 337 arch/mips/paravirt/paravirt-irq.c if (!en) en 340 arch/mips/paravirt/paravirt-irq.c do_IRQ(__ffs(en) + MIPS_IRQ_MBOX0); /* MBOX type */ en 342 arch/mips/paravirt/paravirt-irq.c do_IRQ(__ffs(en)); en 269 arch/mips/pci/msi-octeon.c u64 en; en 276 arch/mips/pci/msi-octeon.c en = cvmx_read_csr(mis_ena_reg[irq_index]); en 277 arch/mips/pci/msi-octeon.c en |= 1ull << irq_bit; en 278 arch/mips/pci/msi-octeon.c cvmx_write_csr(mis_ena_reg[irq_index], en); en 285 arch/mips/pci/msi-octeon.c u64 en; en 292 arch/mips/pci/msi-octeon.c en = cvmx_read_csr(mis_ena_reg[irq_index]); en 293 arch/mips/pci/msi-octeon.c en &= ~(1ull << irq_bit); en 294 arch/mips/pci/msi-octeon.c cvmx_write_csr(mis_ena_reg[irq_index], en); en 497 arch/mips/pci/pci-octeon.c pci_int_arb_cfg.s.en = 1; /* Internal arbiter enable */ en 126 arch/powerpc/platforms/cell/spufs/coredump.c struct elf_note en; en 137 arch/powerpc/platforms/cell/spufs/coredump.c en.n_namesz = strlen(fullname) + 1; en 138 arch/powerpc/platforms/cell/spufs/coredump.c en.n_descsz = sz; en 139 arch/powerpc/platforms/cell/spufs/coredump.c en.n_type = NT_SPU; en 141 arch/powerpc/platforms/cell/spufs/coredump.c if (!dump_emit(cprm, &en, sizeof(en))) en 144 arch/powerpc/platforms/cell/spufs/coredump.c if (!dump_emit(cprm, fullname, en.n_namesz)) en 543 arch/x86/events/perf_event.h en:1, en 115 drivers/ata/pata_octeon_cf.c reg_cfg.s.en = 1; /* Enable this region */ en 587 drivers/ata/pata_octeon_cf.c mio_boot_dma_cfg.s.en = 1; en 700 drivers/ata/pata_octeon_cf.c if (dma_int.s.done && !dma_cfg.s.en) { en 127 drivers/bus/fsl-mc/dprc.c u8 en) en 136 drivers/bus/fsl-mc/dprc.c cmd_params->enable = en & DPRC_ENABLE; en 286 drivers/bus/fsl-mc/fsl-mc-private.h u8 en); en 27 drivers/clk/meson/axg.c .en = { en 91 drivers/clk/meson/axg.c .en = { en 188 drivers/clk/meson/axg.c .en = { en 260 drivers/clk/meson/axg.c .en = { en 713 drivers/clk/meson/axg.c .en = { en 308 drivers/clk/meson/clk-pll.c !meson_parm_read(clk->map, &pll->en) || en 338 drivers/clk/meson/clk-pll.c meson_parm_write(clk->map, &pll->en, 1); en 358 drivers/clk/meson/clk-pll.c meson_parm_write(clk->map, &pll->en, 0); en 378 drivers/clk/meson/clk-pll.c enabled = meson_parm_read(clk->map, &pll->en); en 33 drivers/clk/meson/clk-pll.h struct parm en; en 31 drivers/clk/meson/g12a.c .en = { en 100 drivers/clk/meson/g12a.c .en = { en 159 drivers/clk/meson/g12a.c .en = { en 1612 drivers/clk/meson/g12a.c .en = { en 1677 drivers/clk/meson/g12a.c .en = { en 1752 drivers/clk/meson/g12a.c .en = { en 1844 drivers/clk/meson/g12a.c .en = { en 1938 drivers/clk/meson/g12a.c .en = { en 87 drivers/clk/meson/gxbb.c .en = { en 164 drivers/clk/meson/gxbb.c .en = { en 212 drivers/clk/meson/gxbb.c .en = { en 374 drivers/clk/meson/gxbb.c .en = { en 436 drivers/clk/meson/gxbb.c .en = { en 485 drivers/clk/meson/gxbb.c .en = { en 66 drivers/clk/meson/meson8b.c .en = { en 130 drivers/clk/meson/meson8b.c .en = { en 210 drivers/clk/meson/meson8b.c .en = { en 1920 drivers/clk/meson/meson8b.c .en = { en 98 drivers/clk/qcom/clk-branch.c static int clk_branch_toggle(struct clk_hw *hw, bool en, en 104 drivers/clk/qcom/clk-branch.c if (en) { en 112 drivers/clk/qcom/clk-branch.c return clk_branch_wait(br, en, check_halt); en 87 drivers/clk/qcom/gdsc.c static int gdsc_hwctrl(struct gdsc *sc, bool en) en 89 drivers/clk/qcom/gdsc.c u32 val = en ? HW_CONTROL_MASK : 0; en 13 drivers/clk/sprd/gate.c static void clk_gate_toggle(const struct sprd_gate *sg, bool en) en 19 drivers/clk/sprd/gate.c set ^= en; en 31 drivers/clk/sprd/gate.c static void clk_sc_gate_toggle(const struct sprd_gate *sg, bool en) en 37 drivers/clk/sprd/gate.c set ^= en; en 57 drivers/clk/st/clkgen-fsyn.c struct clkgen_field en[QUADFS_MAX_CHAN]; en 96 drivers/clk/st/clkgen-fsyn.c .en = { CLKGEN_FIELD(0x2fc, 0x1, 0), en 147 drivers/clk/st/clkgen-fsyn.c .en = { CLKGEN_FIELD(0x2ac, 0x1, 0), en 477 drivers/clk/st/clkgen-fsyn.c CLKGEN_WRITE(fs, en[fs->chan], 1); en 478 drivers/clk/st/clkgen-fsyn.c CLKGEN_WRITE(fs, en[fs->chan], 0); en 490 drivers/clk/st/clkgen-fsyn.c CLKGEN_WRITE(fs, en[fs->chan], 0); en 116 drivers/crypto/caam/dpseci.c int *en) en 130 drivers/crypto/caam/dpseci.c *en = dpseci_get_field(rsp_params->is_enabled, ENABLE); en 63 drivers/crypto/caam/dpseci.h int *en); en 488 drivers/crypto/hisilicon/sec/sec_drv.c static void sec_saa_getqm_en(struct sec_dev_info *info, u32 saa_indx, u32 en) en 495 drivers/crypto/hisilicon/sec/sec_drv.c if (en) en 67 drivers/dma/ti/omap-dma.c uint32_t en; en 79 drivers/dma/ti/omap-dma.c uint32_t en; /* number of elements (24-bit) */ en 255 drivers/dma/ti/omap-dma.c t2_desc->en = sg->en; en 269 drivers/dma/ti/omap-dma.c t2_desc->en |= DESC_NXT_DV_REFRESH; en 270 drivers/dma/ti/omap-dma.c t2_desc->en |= DESC_NXT_SV_REUSE; en 278 drivers/dma/ti/omap-dma.c t2_desc->en |= DESC_NXT_SV_REFRESH; en 279 drivers/dma/ti/omap-dma.c t2_desc->en |= DESC_NXT_DV_REUSE; en 285 drivers/dma/ti/omap-dma.c t2_desc->en |= DESC_NTYPE_TYPE2; en 522 drivers/dma/ti/omap-dma.c omap_dma_chan_write(c, CEN, sg->en); en 714 drivers/dma/ti/omap-dma.c return sg->en * sg->fn; en 895 drivers/dma/ti/omap-dma.c unsigned i, es, en, frame_bytes; en 1021 drivers/dma/ti/omap-dma.c en = burst; en 1022 drivers/dma/ti/omap-dma.c frame_bytes = es_bytes[es] * en; en 1031 drivers/dma/ti/omap-dma.c osg->en = en; en 1117 drivers/dma/ti/omap-dma.c d->sg[0].en = period_len / es_bytes[es]; en 1188 drivers/dma/ti/omap-dma.c d->sg[0].en = len / BIT(data_type); en 1243 drivers/dma/ti/omap-dma.c sg->en = xt->sgl[0].size / BIT(data_type); en 269 drivers/edac/octeon_edac-lmc.c union cvmx_lmcx_int_en en; en 295 drivers/edac/octeon_edac-lmc.c en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc)); en 296 drivers/edac/octeon_edac-lmc.c en.s.intr_ded_ena = 0; /* We poll */ en 297 drivers/edac/octeon_edac-lmc.c en.s.intr_sec_ena = 0; en 298 drivers/edac/octeon_edac-lmc.c cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), en.u64); en 350 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_switch_power_profile(adev, type, en) \ en 352 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, type, en)) en 218 drivers/gpu/drm/amd/amdgpu/nv.c struct soc15_allowed_register_entry *en; en 222 drivers/gpu/drm/amd/amdgpu/nv.c en = &nv_allowed_read_registers[i]; en 224 drivers/gpu/drm/amd/amdgpu/nv.c (adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset)) en 52 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c static void smu_v11_0_i2c_set_clock_gating(struct i2c_adapter *control, bool en) en 57 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c reg = REG_SET_FIELD(reg, SMUIO_PWRMGT, i2c_clk_gate_en, en ? 1 : 0); en 407 drivers/gpu/drm/amd/amdgpu/soc15.c struct soc15_allowed_register_entry *en; en 411 drivers/gpu/drm/amd/amdgpu/soc15.c en = &soc15_allowed_read_registers[i]; en 412 drivers/gpu/drm/amd/amdgpu/soc15.c if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg] en 413 drivers/gpu/drm/amd/amdgpu/soc15.c + en->reg_offset)) en 256 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c EVENT_LOG_AUX_REQ(engine->ddc->pin_data->en, EVENT_LOG_AUX_ORIGIN_NATIVE, en 466 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; en 490 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c EVENT_LOG_AUX_REP(aux_engine->ddc->pin_data->en, en 118 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c uint32_t en) en 124 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c ddc->regs = &ddc_data_regs[en]; en 125 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c ddc->base.regs = &ddc_data_regs[en].gpio; en 128 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c ddc->regs = &ddc_clk_regs[en]; en 129 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c ddc->base.regs = &ddc_clk_regs[en].gpio; en 141 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 145 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->regs = &hpd_regs[en]; en 148 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->base.regs = &hpd_regs[en].gpio; en 43 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c uint32_t *en) en 51 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_A; en 54 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_B; en 57 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_C; en 60 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_D; en 63 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_E; en 66 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_F; en 69 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GENERIC_G; en 81 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_1; en 84 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_2; en 87 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_3; en 90 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_4; en 93 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_5; en 96 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_HPD_6; en 108 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_SYNC_HSYNC_A; en 111 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_SYNC_VSYNC_A; en 123 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GSL_GENLOCK_CLOCK; en 126 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GSL_GENLOCK_VSYNC; en 129 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GSL_SWAPLOCK_A; en 132 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_GSL_SWAPLOCK_B; en 144 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC1; en 147 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC2; en 150 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC3; en 153 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC4; en 156 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC5; en 159 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC6; en 162 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_DDC_VGA; en 166 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c *en = GPIO_DDC_LINE_I2C_PAD; en 183 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c uint32_t en, en 191 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 223 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 255 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 284 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 309 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 326 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c switch (en) { en 131 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c uint32_t en) en 137 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c ddc->regs = &ddc_data_regs[en]; en 138 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c ddc->base.regs = &ddc_data_regs[en].gpio; en 141 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c ddc->regs = &ddc_clk_regs[en]; en 142 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c ddc->base.regs = &ddc_clk_regs[en].gpio; en 154 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 158 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->regs = &hpd_regs[en]; en 161 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->base.regs = &hpd_regs[en].gpio; en 65 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c uint32_t *en) en 73 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_A; en 76 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_B; en 79 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_C; en 82 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_D; en 85 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_E; en 88 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_F; en 91 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GENERIC_G; en 103 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_1; en 106 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_2; en 109 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_3; en 112 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_4; en 115 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_5; en 118 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_HPD_6; en 130 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_SYNC_HSYNC_A; en 133 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_SYNC_VSYNC_A; en 145 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GSL_GENLOCK_CLOCK; en 148 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GSL_GENLOCK_VSYNC; en 151 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GSL_SWAPLOCK_A; en 154 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_GSL_SWAPLOCK_B; en 166 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC1; en 169 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC2; en 172 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC3; en 175 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC4; en 178 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC5; en 181 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC6; en 184 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_DDC_VGA; en 188 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c *en = GPIO_DDC_LINE_I2C_PAD; en 205 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c uint32_t en, en 213 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 245 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 277 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 306 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 331 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 348 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c switch (en) { en 118 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c uint32_t en) en 124 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c ddc->regs = &ddc_data_regs[en]; en 125 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c ddc->base.regs = &ddc_data_regs[en].gpio; en 128 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c ddc->regs = &ddc_clk_regs[en]; en 129 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c ddc->base.regs = &ddc_clk_regs[en].gpio; en 141 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 145 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->regs = &hpd_regs[en]; en 148 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->base.regs = &hpd_regs[en].gpio; en 67 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c uint32_t *en) en 75 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_A; en 78 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_B; en 81 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_C; en 84 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_D; en 87 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_E; en 90 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_F; en 93 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GENERIC_G; en 105 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_1; en 108 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_2; en 111 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_3; en 114 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_4; en 117 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_5; en 120 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_HPD_6; en 132 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_SYNC_HSYNC_A; en 135 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_SYNC_VSYNC_A; en 147 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GSL_GENLOCK_CLOCK; en 150 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GSL_GENLOCK_VSYNC; en 153 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GSL_SWAPLOCK_A; en 156 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_GSL_SWAPLOCK_B; en 166 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = index_from_vector(mask); en 167 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c return (*en <= GPIO_GPIO_PAD_MAX); en 173 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC1; en 176 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC2; en 179 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC3; en 182 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC4; en 185 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC5; en 188 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC6; en 191 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_DDC_VGA; en 195 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c *en = GPIO_DDC_LINE_I2C_PAD; en 212 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c uint32_t en, en 220 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 252 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 284 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 313 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 338 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 355 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c switch (en) { en 380 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c info->mask = (1 << en); en 151 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) en 155 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c generic->regs = &generic_regs[en]; en 156 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c generic->shifts = &generic_shift[en]; en 157 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c generic->masks = &generic_mask[en]; en 158 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c generic->base.regs = &generic_regs[en].gpio; en 163 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c uint32_t en) en 169 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c ddc->regs = &ddc_data_regs[en]; en 170 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c ddc->base.regs = &ddc_data_regs[en].gpio; en 173 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c ddc->regs = &ddc_clk_regs[en]; en 174 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c ddc->base.regs = &ddc_clk_regs[en].gpio; en 186 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 190 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->regs = &hpd_regs[en]; en 193 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->base.regs = &hpd_regs[en].gpio; en 65 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c uint32_t *en) en 73 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_A; en 76 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_B; en 79 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_C; en 82 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_D; en 85 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_E; en 88 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_F; en 91 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GENERIC_G; en 103 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_1; en 106 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_2; en 109 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_3; en 112 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_4; en 115 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_5; en 118 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_HPD_6; en 130 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_SYNC_HSYNC_A; en 133 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_SYNC_VSYNC_A; en 145 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GSL_GENLOCK_CLOCK; en 148 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GSL_GENLOCK_VSYNC; en 151 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GSL_SWAPLOCK_A; en 154 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_GSL_SWAPLOCK_B; en 166 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC1; en 169 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC2; en 172 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC3; en 175 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC4; en 178 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC5; en 181 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC6; en 184 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_DDC_VGA; en 188 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c *en = GPIO_DDC_LINE_I2C_PAD; en 205 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c uint32_t en, en 213 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 245 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 277 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 306 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 331 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 348 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c switch (en) { en 170 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c uint32_t en) en 176 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->regs = &ddc_data_regs_dcn[en]; en 177 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->base.regs = &ddc_data_regs_dcn[en].gpio; en 180 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->regs = &ddc_clk_regs_dcn[en]; en 181 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; en 188 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->shifts = &ddc_shift[en]; en 189 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ddc->masks = &ddc_mask[en]; en 193 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 197 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->regs = &hpd_regs[en]; en 200 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->base.regs = &hpd_regs[en].gpio; en 203 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) en 207 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c generic->regs = &generic_regs[en]; en 208 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c generic->shifts = &generic_shift[en]; en 209 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c generic->masks = &generic_mask[en]; en 210 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c generic->base.regs = &generic_regs[en].gpio; en 70 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c uint32_t *en) en 78 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_A; en 81 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_B; en 84 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_C; en 87 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_D; en 90 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_E; en 93 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_F; en 96 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GENERIC_G; en 108 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_1; en 111 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_2; en 114 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_3; en 117 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_4; en 120 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_5; en 123 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_HPD_6; en 135 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GSL_GENLOCK_CLOCK; en 138 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GSL_GENLOCK_VSYNC; en 141 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GSL_SWAPLOCK_A; en 144 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_GSL_SWAPLOCK_B; en 156 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC1; en 159 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC2; en 162 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC3; en 165 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC4; en 168 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC5; en 171 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC6; en 174 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c *en = GPIO_DDC_LINE_DDC_VGA; en 192 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c uint32_t en, en 200 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c switch (en) { en 230 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c switch (en) { en 260 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c switch (en) { en 289 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c switch (en) { en 314 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c switch (en) { en 160 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) en 164 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c generic->regs = &generic_regs[en]; en 165 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c generic->shifts = &generic_shift[en]; en 166 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c generic->masks = &generic_mask[en]; en 167 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c generic->base.regs = &generic_regs[en].gpio; en 172 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c uint32_t en) en 178 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->regs = &ddc_data_regs_dcn[en]; en 179 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->base.regs = &ddc_data_regs_dcn[en].gpio; en 182 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->regs = &ddc_clk_regs_dcn[en]; en 183 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; en 190 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->shifts = &ddc_shift[en]; en 191 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c ddc->masks = &ddc_mask[en]; en 195 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) en 199 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->regs = &hpd_regs[en]; en 202 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->base.regs = &hpd_regs[en].gpio; en 69 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c uint32_t *en) en 77 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_A; en 80 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_B; en 83 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_C; en 86 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_D; en 89 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_E; en 92 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_F; en 95 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GENERIC_G; en 100 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC1; en 111 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_1; en 114 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_2; en 117 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_3; en 120 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_4; en 123 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_5; en 126 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_HPD_6; en 138 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GSL_GENLOCK_CLOCK; en 141 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GSL_GENLOCK_VSYNC; en 144 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GSL_SWAPLOCK_A; en 147 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_GSL_SWAPLOCK_B; en 159 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC1; en 162 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC2; en 165 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC3; en 168 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC4; en 171 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC5; en 174 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC_VGA; en 187 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c *en = GPIO_DDC_LINE_DDC1; en 197 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c uint32_t en, en 205 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c switch (en) { en 232 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c switch (en) { en 259 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c switch (en) { en 288 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c switch (en) { en 317 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c switch (en) { en 113 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c return dal_gpio_service_lock(gpio->service, gpio->id, gpio->en); en 119 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c return dal_gpio_service_unlock(gpio->service, gpio->id, gpio->en); en 143 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c return gpio->en; en 163 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->id, gpio->en, pin_info) ? en 172 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c switch (gpio->en) { en 190 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c switch (gpio->en) { en 204 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c switch (gpio->en) { en 214 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c switch (gpio->en) { en 272 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c uint32_t en, en 285 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->en = en; en 292 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); en 295 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); en 298 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->service->factory.funcs->init_generic(&gpio->hw_container.generic, service->ctx, id, en); en 301 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->service->factory.funcs->init_hpd(&gpio->hw_container.hpd, service->ctx, id, en); en 134 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en; en 136 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) { en 141 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c return dal_gpio_create_irq(service, id, en); en 150 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en; en 153 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) { en 159 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT); en 182 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 187 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->translate.funcs->id_to_offset(id, en, &pin); en 243 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 245 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c return service->busyness[id][en]; en 251 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 253 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->busyness[id][en] = true; en 259 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 261 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->busyness[id][en] = false; en 267 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 274 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c set_pin_busy(service, id, en); en 281 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 288 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c set_pin_free(service, id, en); en 297 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en = gpio->en; en 308 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c if (is_pin_busy(service, id, en)) { en 316 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->factory.funcs->define_ddc_registers(*pin, en); en 320 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->factory.funcs->define_ddc_registers(*pin, en); en 324 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->factory.funcs->define_generic_registers(*pin, en); en 328 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service->factory.funcs->define_hpd_registers(*pin, en); en 351 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c set_pin_busy(service, id, en); en 369 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c set_pin_free(service, pin->id, pin->en); en 431 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en) en 446 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT); en 477 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c uint32_t en; en 480 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) en 491 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service, GPIO_ID_DDC_DATA, en, GPIO_PIN_OUTPUT_STATE_DEFAULT); en 499 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c service, GPIO_ID_DDC_CLOCK, en, GPIO_PIN_OUTPUT_STATE_DEFAULT); en 578 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c config_data.config.ddc.data_en_bit_present = hw_data->store.en != 0; en 579 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c config_data.config.ddc.clock_en_bit_present = hw_clock->store.en != 0; en 54 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.h uint32_t en); en 59 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.h uint32_t en); en 98 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) { en 178 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && en 179 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { en 188 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && en 189 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { en 198 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && en 199 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { en 226 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c uint32_t en, en 229 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c dal_hw_gpio_construct(&ddc->base, id, en, ctx); en 237 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c uint32_t en) en 239 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) { en 250 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c construct(*hw_ddc, id, en, ctx); en 45 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.h uint32_t en); en 43 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 48 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 53 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 62 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 65 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 68 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h uint32_t en); en 52 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c uint32_t en, en 55 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c dal_hw_gpio_construct(&pin->base, id, en, ctx); en 105 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c uint32_t en, en 108 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c dal_hw_generic_construct(generic, id, en, ctx); en 116 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c uint32_t en) en 118 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) { en 129 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c construct(*hw_generic, id, en, ctx); en 46 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h uint32_t en); en 47 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c REG_GET(EN_reg, EN, &gpio->store.en); en 56 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c REG_UPDATE(EN_reg, EN, gpio->store.en); en 182 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c uint32_t en, en 187 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c pin->base.en = en; en 193 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c pin->store.en = 0; en 42 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h uint32_t en; en 100 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h uint32_t en; en 115 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h uint32_t en, en 52 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c uint32_t en, en 55 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c dal_hw_gpio_construct(&pin->base, id, en, ctx); en 135 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c uint32_t en, en 138 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c dal_hw_hpd_construct(hpd, id, en, ctx); en 146 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c uint32_t en) en 148 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) { en 159 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c construct(*hw_hpd, id, en, ctx); en 45 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.h uint32_t en); en 34 drivers/gpu/drm/amd/display/dc/gpio/hw_translate.h uint32_t *en); en 37 drivers/gpu/drm/amd/display/dc/gpio/hw_translate.h uint32_t en, en 42 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en; en 57 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 61 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 65 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 69 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 73 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 77 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 81 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en); en 88 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t *en); en 91 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h uint32_t en, en 38 drivers/gpu/drm/amd/display/include/gpio_service_interface.h uint32_t en, en 69 drivers/gpu/drm/amd/display/include/gpio_service_interface.h uint32_t en); en 96 drivers/gpu/drm/amd/display/include/gpio_service_interface.h uint32_t en); en 262 drivers/gpu/drm/amd/include/kgd_pp_interface.h int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en); en 941 drivers/gpu/drm/amd/powerplay/amd_powerplay.c enum PP_SMC_POWER_PROFILE type, bool en) en 960 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (!en) { en 1695 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c bool en) en 1709 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (!en) { en 855 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c uint32_t en = enable ? 1 : 0; en 865 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c block_en = PP_CAP(PHM_PlatformCaps_SQRamping) ? en : 0; en 871 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c block_en = PP_CAP(PHM_PlatformCaps_DBRamping) ? en : 0; en 877 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c block_en = PP_CAP(PHM_PlatformCaps_TDRamping) ? en : 0; en 883 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c block_en = PP_CAP(PHM_PlatformCaps_TCPRamping) ? en : 0; en 853 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c uint32_t en = (enable ? 1 : 0); en 858 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c DIDT_SQ_CTRL0, DIDT_CTRL_EN, en); en 860 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c didt_block_info |= en << SQ_Enable_SHIFT; en 865 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c DIDT_DB_CTRL0, DIDT_CTRL_EN, en); en 867 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c didt_block_info |= en << DB_Enable_SHIFT; en 872 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c DIDT_TD_CTRL0, DIDT_CTRL_EN, en); en 874 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c didt_block_info |= en << TD_Enable_SHIFT; en 879 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c DIDT_TCP_CTRL0, DIDT_CTRL_EN, en); en 881 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c didt_block_info |= en << TCP_Enable_SHIFT; en 886 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c DIDT_DBR_CTRL0, DIDT_CTRL_EN, en); en 892 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_SQ_EDC_CTRL, EDC_EN, en); en 893 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_SQ_EDC_CTRL, EDC_SW_RST, ~en); en 899 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_DB_EDC_CTRL, EDC_EN, en); en 900 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_DB_EDC_CTRL, EDC_SW_RST, ~en); en 906 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_TD_EDC_CTRL, EDC_EN, en); en 907 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_TD_EDC_CTRL, EDC_SW_RST, ~en); en 913 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_TCP_EDC_CTRL, EDC_EN, en); en 914 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_TCP_EDC_CTRL, EDC_SW_RST, ~en); en 920 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_DBR_EDC_CTRL, EDC_EN, en); en 921 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = REG_SET_FIELD(data, DIDT_DBR_EDC_CTRL, EDC_SW_RST, ~en); en 491 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*system_features_control)(struct smu_context *smu, bool en); en 594 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h #define smu_system_features_control(smu, en) \ en 595 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ((smu)->funcs->system_features_control ? (smu)->funcs->system_features_control((smu), (en)) : 0) en 816 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool en); en 903 drivers/gpu/drm/amd/powerplay/smu_v11_0.c bool en) en 910 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = smu_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures : en 1043 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c int dpu_crtc_vblank(struct drm_crtc *crtc, bool en) en 1048 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_vblank(DRMID(&dpu_crtc->base), en, dpu_crtc); en 1066 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_vblank_enable(DRMID(crtc), DRMID(enc), en, en 1069 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_encoder_toggle_vblank_for_crtc(enc, crtc, en); en 230 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); en 268 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct drm_crtc *crtc_drm, u32 event, bool en); en 491 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cfg.en = true; en 495 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (cfg.en && phys_enc->ops.needs_single_flush && en 500 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c DPU_DEBUG_ENC(dpu_enc, "enable %d\n", cfg.en); en 195 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c u32 mask, u8 en) en 207 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c if (en) en 216 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c u32 mask, u8 en) en 225 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c if (en) en 66 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c if (cfg->en) { en 89 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c DPU_REG_WRITE(c, SPLIT_DISPLAY_EN, cfg->en & 0x1); en 24 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h bool en; en 40 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h bool en; en 2312 drivers/gpu/drm/msm/dsi/dsi_host.c enum sfpb_ahb_arb_master_port_en en; en 2317 drivers/gpu/drm/msm/dsi/dsi_host.c en = enable ? SFPB_MASTER_PORT_ENABLE : SFPB_MASTER_PORT_DISABLE; en 2321 drivers/gpu/drm/msm/dsi/dsi_host.c SFPB_GPREG_MASTER_PORT_EN(en)); en 30 drivers/gpu/drm/nouveau/nvkm/core/enum.c nvkm_enum_find(const struct nvkm_enum *en, u32 value) en 32 drivers/gpu/drm/nouveau/nvkm/core/enum.c while (en->name) { en 33 drivers/gpu/drm/nouveau/nvkm/core/enum.c if (en->value == value) en 34 drivers/gpu/drm/nouveau/nvkm/core/enum.c return en; en 35 drivers/gpu/drm/nouveau/nvkm/core/enum.c en++; en 52 drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c const struct nvkm_enum *en = en 54 drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); en 54 drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c const struct nvkm_enum *en = en 56 drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); en 53 drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c const struct nvkm_enum *en = en 58 drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c en ? en->name : "", chan ? chan->chid : -1, en 52 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en) en 56 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c if (!en) { en 168 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en) en 172 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c const u32 data = en ? 0x00010000 << chan->chid.user : 0x00000000; en 29 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void (*intr)(struct nv50_disp_chan *, bool en); en 155 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_intr(struct nv50_disp_chan *chan, bool en) en 159 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c const u32 data = en ? mask : 0; en 40 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c gv100_disp_curs_intr(struct nv50_disp_chan *chan, bool en) en 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c const u32 data = en ? mask : 0; en 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c gv100_disp_wimm_intr(struct nv50_disp_chan *chan, bool en) en 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c const u32 data = en ? mask : 0; en 131 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c gv100_disp_wndw_intr(struct nv50_disp_chan *chan, bool en) en 135 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c const u32 data = en ? mask : 0; en 357 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c const struct nvkm_enum *en; en 359 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c en = nvkm_enum_find(gf100_fifo_sched_reason, code); en 361 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : ""); en 427 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c const struct nvkm_enum *en = fifo->func->fault.engine; en 428 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c for (; en && en->name; en++) { en 429 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c if (en->data2 == engine->subdev.index) { en 430 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c mmui = en->value; en 474 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c char ct[8] = "HUB/", en[16] = ""; en 508 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c char *dst = en; en 515 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c snprintf(en, sizeof(en), "%s", ee->name); en 525 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c info->engine, ee ? ee->name : en, en 566 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c const struct nvkm_enum *en = en 569 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c nvkm_error(subdev, "BIND_ERROR %02x [%s]\n", code, en ? en->name : ""); en 616 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c const struct nvkm_enum *en = en 619 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : ""); en 1604 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c const struct nvkm_enum *en = en 1608 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c code, en ? en->name : "", chid, inst << 12, en 634 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c const struct nvkm_enum *en; en 648 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c en = nvkm_enum_find(nv50_data_error_names, ecode); en 650 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c ecode, en ? en->name : ""); en 52 drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c const struct nvkm_enum *en = en 57 drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c en ? en->name : "UNKNOWN", chan ? chan->chid : -1, en 142 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c const struct nvkm_enum *en, *re, *cl, *sc; en 174 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c en = nvkm_enum_find(vm_engine, st0); en 178 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c else if (en && en->data) sc = nvkm_enum_find(en->data, st3); en 189 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c st0, en ? en->name : "", en 38 drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c nvkm_mc_intr_mask(struct nvkm_device *device, enum nvkm_devidx devidx, bool en) en 48 drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c mc->func->intr_mask(mc, mask, en ? mask : 0); en 153 drivers/gpu/drm/panfrost/panfrost_mmu.c int en = atomic_inc_return(&mmu->as_count); en 159 drivers/gpu/drm/panfrost/panfrost_mmu.c WARN_ON(en >= (NUM_JOB_SLOTS + 1)); en 1194 drivers/gpu/drm/selftests/test-drm_mm.c struct evict_node *e, *en; en 1203 drivers/gpu/drm/selftests/test-drm_mm.c list_for_each_entry_safe(e, en, evict_list, link) { en 421 drivers/hwmon/dme1737.c static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; en 423 drivers/hwmon/dme1737.c return en[(reg >> 5) & 0x07]; en 428 drivers/hwmon/dme1737.c int en = (val == 1) ? 7 : 3; en 430 drivers/hwmon/dme1737.c return (reg & 0x1f) | ((en & 0x07) << 5); en 523 drivers/hwmon/dme1737.c int en = (ix == 1) ? 0x80 : 0x08; en 525 drivers/hwmon/dme1737.c return val ? reg | en : reg & ~en; en 165 drivers/iio/adc/qcom-spmi-iadc.c u8 mode, sta1, chan, dig, en, req; en 188 drivers/iio/adc/qcom-spmi-iadc.c ret = iadc_read(iadc, IADC_EN_CTL1, &en); en 194 drivers/iio/adc/qcom-spmi-iadc.c mode, en, chan, dig, req, sta1); en 176 drivers/iio/adc/qcom-spmi-vadc.c u8 mode, sta1, chan, dig, en, req; en 199 drivers/iio/adc/qcom-spmi-vadc.c ret = vadc_read(vadc, VADC_EN_CTL1, &en); en 205 drivers/iio/adc/qcom-spmi-vadc.c mode, en, chan, dig, req, sta1); en 34 drivers/iio/dac/stm32-dac.c u32 en, val; en 41 drivers/iio/dac/stm32-dac.c en = FIELD_GET(STM32_DAC_CR_EN1, val); en 43 drivers/iio/dac/stm32-dac.c en = FIELD_GET(STM32_DAC_CR_EN2, val); en 45 drivers/iio/dac/stm32-dac.c return !!en; en 53 drivers/iio/dac/stm32-dac.c u32 en = enable ? msk : 0; en 56 drivers/iio/dac/stm32-dac.c ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en); en 58 drivers/iio/dac/stm32-dac.c dev_err(&indio_dev->dev, "%s failed\n", en ? en 68 drivers/iio/dac/stm32-dac.c if (en && dac->common->hfsel) en 170 drivers/iio/health/max30102.c static int max30102_set_power(struct max30102_data *data, bool en) en 174 drivers/iio/health/max30102.c en ? 0 : MAX30102_REG_MODE_CONFIG_PWR); en 177 drivers/iio/health/max30102.c static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en) en 181 drivers/iio/health/max30102.c if (!en) en 441 drivers/iio/health/max30102.c static int max30102_get_temp(struct max30102_data *data, int *val, bool en) en 445 drivers/iio/health/max30102.c if (en) { en 462 drivers/iio/health/max30102.c if (en) en 320 drivers/iio/imu/adis16400.c .en = true, en 74 drivers/iio/imu/adis_buffer.c if (adis->burst && adis->burst->en) en 186 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask) en 203 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) { en 217 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c if (en) en 225 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c if (en) { en 347 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask); en 974 drivers/infiniband/ulp/opa_vnic/opa_vnic_vema.c static void opa_vnic_ctrl_config_dev(struct opa_vnic_ctrl_port *cport, bool en) en 979 drivers/infiniband/ulp/opa_vnic/opa_vnic_vema.c if (en) en 190 drivers/irqchip/irq-bcm7120-l2.c void __iomem *en = of_iomap(dn, map_idx + 0); en 192 drivers/irqchip/irq-bcm7120-l2.c void __iomem *base = min(en, stat); en 194 drivers/irqchip/irq-bcm7120-l2.c data->map_base[map_idx + 0] = en; en 201 drivers/irqchip/irq-bcm7120-l2.c data->en_offset[gc_idx] = en - base; en 36 drivers/media/dvb-frontends/cxd2099.c struct dvb_ca_en50221 en; en 220 drivers/media/dvb-frontends/cxd2099.c if (!ci->en.read_data) en 649 drivers/media/dvb-frontends/cxd2099.c ci->en = en_templ; en 650 drivers/media/dvb-frontends/cxd2099.c ci->en.data = ci; en 654 drivers/media/dvb-frontends/cxd2099.c *cfg->en = &ci->en; en 657 drivers/media/dvb-frontends/cxd2099.c ci->en.read_data = NULL; en 658 drivers/media/dvb-frontends/cxd2099.c ci->en.write_data = NULL; en 30 drivers/media/dvb-frontends/cxd2099.h struct dvb_ca_en50221 **en; en 2990 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c u8 en, en 3035 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c en ? 0 : (1 << id), en 3041 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c u8 en, en 3051 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c return cxd2880_tnrdmd_gpio_set_cfg(tnr_dmd->diver_sub, id, en, mode, en 3385 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c *tnr_dmd, u8 en, u8 value) en 3407 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c if (en) { en 3432 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c u8 en) en 3448 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c if (en) { en 279 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h u8 en, en 285 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h u8 en, en 358 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h *tnr_dmd, u8 en, u8 value); en 361 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h u8 en); en 263 drivers/media/mc/mc-entity.c #define link_top(en) ((en)->stack[(en)->top].link) en 264 drivers/media/mc/mc-entity.c #define stack_top(en) ((en)->stack[(en)->top].entity) en 170 drivers/media/pci/ddbridge/ddbridge-ci.c memcpy(&ci->en, &en_templ, sizeof(en_templ)); en 171 drivers/media/pci/ddbridge/ddbridge-ci.c ci->en.data = ci; en 172 drivers/media/pci/ddbridge/ddbridge-ci.c port->en = &ci->en; en 303 drivers/media/pci/ddbridge/ddbridge-ci.c memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ)); en 304 drivers/media/pci/ddbridge/ddbridge-ci.c ci->en.data = ci; en 305 drivers/media/pci/ddbridge/ddbridge-ci.c port->en = &ci->en; en 327 drivers/media/pci/ddbridge/ddbridge-ci.c cxd_cfg.en = &port->en; en 364 drivers/media/pci/ddbridge/ddbridge-ci.c if (!port->en) en 366 drivers/media/pci/ddbridge/ddbridge-ci.c dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1); en 374 drivers/media/pci/ddbridge/ddbridge-ci.c if (port->en) { en 375 drivers/media/pci/ddbridge/ddbridge-ci.c dvb_ca_en50221_release(port->en); en 382 drivers/media/pci/ddbridge/ddbridge-ci.c kfree(port->en->data); en 384 drivers/media/pci/ddbridge/ddbridge-ci.c port->en = NULL; en 191 drivers/media/pci/ddbridge/ddbridge.h struct dvb_ca_en50221 en; en 267 drivers/media/pci/ddbridge/ddbridge.h struct dvb_ca_en50221 *en; en 1294 drivers/media/pci/ngene/ngene-core.c dev->ci.en) en 1468 drivers/media/pci/ngene/ngene-core.c if (!dev->ci.en && (io & NGENE_IO_TSOUT)) en 1490 drivers/media/pci/ngene/ngene-core.c if (dev->ci.en && (io & NGENE_IO_TSOUT)) { en 1491 drivers/media/pci/ngene/ngene-core.c dvb_ca_en50221_init(adapter, dev->ci.en, 0, 1); en 1581 drivers/media/pci/ngene/ngene-core.c cxd_cfg.en = &ci->en; en 1601 drivers/media/pci/ngene/ngene-core.c dvb_ca_en50221_release(ci->en); en 1605 drivers/media/pci/ngene/ngene-core.c ci->en = NULL; en 1653 drivers/media/pci/ngene/ngene-core.c if (dev->ci.en) en 169 drivers/media/pci/ngene/ngene-dvb.c if (dev->ci.en && chan->number == 2) { en 734 drivers/media/pci/ngene/ngene.h struct dvb_ca_en50221 *en; en 27 drivers/media/platform/davinci/ccdc_hw_device.h void (*enable) (int en); en 31 drivers/media/platform/davinci/ccdc_hw_device.h void (*enable_out_to_sdram) (int en); en 119 drivers/media/platform/davinci/dm355_ccdc.c static void ccdc_enable(int en) en 124 drivers/media/platform/davinci/dm355_ccdc.c temp |= (en & CCDC_SYNCEN_VDHDEN_MASK); en 128 drivers/media/platform/davinci/dm355_ccdc.c static void ccdc_enable_output_to_sdram(int en) en 133 drivers/media/platform/davinci/dm355_ccdc.c temp |= ((en << CCDC_SYNCEN_WEN_SHIFT) & CCDC_SYNCEN_WEN_MASK); en 34 drivers/media/platform/davinci/isif.c .en = 0, en 41 drivers/media/platform/davinci/isif.c .en = 0, en 45 drivers/media/platform/davinci/isif.c .en = 0, en 48 drivers/media/platform/davinci/isif.c .en = 0, en 176 drivers/media/platform/davinci/isif.c static void isif_enable(int en) en 178 drivers/media/platform/davinci/isif.c if (!en) { en 187 drivers/media/platform/davinci/isif.c reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN); en 190 drivers/media/platform/davinci/isif.c static void isif_enable_output_to_sdram(int en) en 192 drivers/media/platform/davinci/isif.c reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN); en 319 drivers/media/platform/davinci/isif.c if (bc->en) { en 375 drivers/media/platform/davinci/isif.c if (!linearize->en) { en 404 drivers/media/platform/davinci/isif.c if (!vdfc->en) en 486 drivers/media/platform/davinci/isif.c if (!df_csc->csc.en) { en 93 drivers/media/platform/davinci/vpss.c int (*enable_clock)(enum vpss_clock_sel clock_sel, int en); en 226 drivers/media/platform/davinci/vpss.c static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en) en 258 drivers/media/platform/davinci/vpss.c if (!en) en 268 drivers/media/platform/davinci/vpss.c static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en) en 342 drivers/media/platform/davinci/vpss.c if (!en) { en 354 drivers/media/platform/davinci/vpss.c int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en) en 359 drivers/media/platform/davinci/vpss.c return oper_cfg.hw_ops.enable_clock(clock_sel, en); en 253 drivers/media/platform/omap3isp/isph3a_aewb.c unsigned long *en = arg; en 254 drivers/media/platform/omap3isp/isph3a_aewb.c return omap3isp_stat_enable(stat, !!*en); en 317 drivers/media/platform/omap3isp/isph3a_af.c int *en = arg; en 318 drivers/media/platform/omap3isp/isph3a_af.c return omap3isp_stat_enable(stat, !!*en); en 438 drivers/media/platform/omap3isp/isphist.c int *en = arg; en 439 drivers/media/platform/omap3isp/isphist.c return omap3isp_stat_enable(stat, !!*en); en 445 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 447 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 501 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable_picture *in = pdata, *en = prop_data; en 503 drivers/media/platform/qcom/venus/hfi_cmds.c en->picture_type = in->picture_type; en 504 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 508 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 510 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 511 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 516 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *en = prop_data; en 518 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 519 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 559 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 561 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 562 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 566 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 568 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 569 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 573 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 575 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 576 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 580 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 582 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 583 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 837 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 839 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 840 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 853 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 855 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 856 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 860 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 862 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 863 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 875 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 877 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 878 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 882 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 884 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 885 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 889 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 891 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 892 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 972 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 974 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 975 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 1000 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 1002 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 1003 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 1007 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 1009 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 1010 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 1028 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_enable *in = pdata, *en = prop_data; en 1030 drivers/media/platform/qcom/venus/hfi_cmds.c en->enable = in->enable; en 1031 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); en 550 drivers/media/platform/qcom/venus/vdec.c struct hfi_enable en = { .enable = 1 }; en 556 drivers/media/platform/qcom/venus/vdec.c ret = hfi_session_set_property(inst, ptype, &en); en 569 drivers/media/platform/qcom/venus/vdec.c struct hfi_enable en = { .enable = 1 }; en 587 drivers/media/platform/qcom/venus/vdec.c ret = hfi_session_set_property(inst, ptype, &en); en 73 drivers/media/platform/qcom/venus/venc_ctrls.c struct hfi_enable en = { .enable = 1 }; en 193 drivers/media/platform/qcom/venus/venc_ctrls.c ret = hfi_session_set_property(inst, ptype, &en); en 521 drivers/mfd/db8500-prcmu.c u32 en; en 528 drivers/mfd/db8500-prcmu.c .en = PRCM_DSITVCLK_DIV_DSI0_ESC_CLK_EN, en 533 drivers/mfd/db8500-prcmu.c .en = PRCM_DSITVCLK_DIV_DSI1_ESC_CLK_EN, en 538 drivers/mfd/db8500-prcmu.c .en = PRCM_DSITVCLK_DIV_DSI2_ESC_CLK_EN, en 1435 drivers/mfd/db8500-prcmu.c enable ? (val |= dsiescclk[n].en) : (val &= ~dsiescclk[n].en); en 930 drivers/mmc/host/au1xmmc.c static void au1xmmc_enable_sdio_irq(struct mmc_host *mmc, int en) en 934 drivers/mmc/host/au1xmmc.c if (en) en 178 drivers/mmc/host/sdhci-sprd.c sdhci_sprd_set_dll_invert(struct sdhci_host *host, u32 mask, bool en) en 183 drivers/mmc/host/sdhci-sprd.c if (en) en 262 drivers/mmc/host/sdhci-sprd.c bool en = false, clk_changed = false; en 271 drivers/mmc/host/sdhci-sprd.c en = true; en 273 drivers/mmc/host/sdhci-sprd.c SDHCI_SPRD_BIT_POSRD_DLY_INV, en); en 44 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) en 51 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c if (en) en 68 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) en 78 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c if (en) en 804 drivers/mtd/nand/raw/brcmnand/brcmnand.c static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en) en 811 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (en) { en 899 drivers/mtd/nand/raw/brcmnand/brcmnand.c static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en) en 901 drivers/mtd/nand/raw/brcmnand/brcmnand.c u32 val = en ? CS_SELECT_NAND_WP : 0; en 17 drivers/mtd/nand/raw/brcmnand/brcmnand.h void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); en 47 drivers/mtd/nand/raw/brcmnand/iproc_nand.c static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en) en 59 drivers/mtd/nand/raw/brcmnand/iproc_nand.c if (en) en 368 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c static void bnx2x_get_epio(struct bnx2x *bp, u32 epio_pin, u32 *en) en 371 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c *en = 0; en 383 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c *en = (REG_RD(bp, MCP_REG_MCPR_GP_INPUTS) & epio_mask) >> epio_pin; en 385 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c static void bnx2x_set_epio(struct bnx2x *bp, u32 epio_pin, u32 en) en 394 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c DP(NETIF_MSG_LINK, "Setting EPIO pin %d to %d\n", epio_pin, en); en 398 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c if (en) en 1526 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c static void bnx2x_set_umac_rxtx(struct link_params *params, u8 en) en 1535 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c if (en) en 1706 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c static void bnx2x_set_xmac_rxtx(struct link_params *params, u8 en) en 1726 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c if (en) en 2442 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c static void bnx2x_set_bmac_rx(struct bnx2x *bp, u32 chip_id, u8 port, u8 en) en 2459 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c if (en) en 12802 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c void bnx2x_set_rx_filter(struct link_params *params, u8 en) en 12805 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c u8 val = en * 0x1F; en 12809 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c val |= en * 0x20; en 12814 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c en*0x3); en 12818 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c NIG_REG_LLH0_BRB1_NOT_MCP), en); en 455 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h void bnx2x_set_rx_filter(struct link_params *params, u8 en); en 605 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c prev_packet_enable = agl_gmx_prtx.s.en; en 606 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c agl_gmx_prtx.s.en = 0; en 625 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c agl_gmx_prtx.s.en = prev_packet_enable; en 805 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c prtx_cfg.s.en = 0; en 830 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c prtx_cfg.s.en = 1; en 1022 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c agl_gmx_inf_mode.s.en = 1; en 1065 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c mix_ctl.s.en = 1; /* Enable the port */ en 916 drivers/net/ethernet/chelsio/cxgb/sge.c u32 en = SGE_INT_ENABLE; en 920 drivers/net/ethernet/chelsio/cxgb/sge.c en &= ~F_PACKET_TOO_BIG; en 921 drivers/net/ethernet/chelsio/cxgb/sge.c writel(en, sge->adapter->regs + A_SG_INT_ENABLE); en 1051 drivers/net/ethernet/cortina/gemini.c u32 en; en 1085 drivers/net/ethernet/cortina/gemini.c en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); en 1086 drivers/net/ethernet/cortina/gemini.c en &= ~SWFQ_EMPTY_INT_BIT; en 1087 drivers/net/ethernet/cortina/gemini.c writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); en 1103 drivers/net/ethernet/cortina/gemini.c en |= SWFQ_EMPTY_INT_BIT; en 1104 drivers/net/ethernet/cortina/gemini.c writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); en 1111 drivers/net/ethernet/cortina/gemini.c unsigned int txq, int en) en 1121 drivers/net/ethernet/cortina/gemini.c if (en) en 1125 drivers/net/ethernet/cortina/gemini.c val = en ? val | mask : val & ~mask; en 2271 drivers/net/ethernet/cortina/gemini.c u32 val, en; en 2277 drivers/net/ethernet/cortina/gemini.c en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); en 2279 drivers/net/ethernet/cortina/gemini.c if (val & en & SWFQ_EMPTY_INT_BIT) { en 2284 drivers/net/ethernet/cortina/gemini.c en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT en 2286 drivers/net/ethernet/cortina/gemini.c writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); en 243 drivers/net/ethernet/freescale/dpaa2/dpni.c int *en) en 261 drivers/net/ethernet/freescale/dpaa2/dpni.c *en = dpni_get_field(rsp_params->enabled, ENABLE); en 308 drivers/net/ethernet/freescale/dpaa2/dpni.c u8 en) en 318 drivers/net/ethernet/freescale/dpaa2/dpni.c dpni_set_field(cmd_params->enable, ENABLE, en); en 339 drivers/net/ethernet/freescale/dpaa2/dpni.c u8 *en) en 361 drivers/net/ethernet/freescale/dpaa2/dpni.c *en = dpni_get_field(rsp_params->enabled, ENABLE); en 1007 drivers/net/ethernet/freescale/dpaa2/dpni.c int en) en 1017 drivers/net/ethernet/freescale/dpaa2/dpni.c dpni_set_field(cmd_params->enable, ENABLE, en); en 1035 drivers/net/ethernet/freescale/dpaa2/dpni.c int *en) en 1053 drivers/net/ethernet/freescale/dpaa2/dpni.c *en = dpni_get_field(rsp_params->enabled, ENABLE); en 1070 drivers/net/ethernet/freescale/dpaa2/dpni.c int en) en 1080 drivers/net/ethernet/freescale/dpaa2/dpni.c dpni_set_field(cmd_params->enable, ENABLE, en); en 1098 drivers/net/ethernet/freescale/dpaa2/dpni.c int *en) en 1116 drivers/net/ethernet/freescale/dpaa2/dpni.c *en = dpni_get_field(rsp_params->enabled, ENABLE); en 121 drivers/net/ethernet/freescale/dpaa2/dpni.h int *en); en 147 drivers/net/ethernet/freescale/dpaa2/dpni.h u8 en); en 153 drivers/net/ethernet/freescale/dpaa2/dpni.h u8 *en); en 566 drivers/net/ethernet/freescale/dpaa2/dpni.h int en); en 571 drivers/net/ethernet/freescale/dpaa2/dpni.h int *en); en 576 drivers/net/ethernet/freescale/dpaa2/dpni.h int en); en 581 drivers/net/ethernet/freescale/dpaa2/dpni.h int *en); en 38 drivers/net/ethernet/freescale/dpaa2/dprtc-cmd.h u8 en; en 44 drivers/net/ethernet/freescale/dpaa2/dprtc-cmd.h u8 en; en 95 drivers/net/ethernet/freescale/dpaa2/dprtc.c u8 en) en 105 drivers/net/ethernet/freescale/dpaa2/dprtc.c cmd_params->en = en; en 124 drivers/net/ethernet/freescale/dpaa2/dprtc.c u8 *en) en 142 drivers/net/ethernet/freescale/dpaa2/dprtc.c *en = rsp_params->en; en 37 drivers/net/ethernet/freescale/dpaa2/dprtc.h u8 en); en 43 drivers/net/ethernet/freescale/dpaa2/dprtc.h u8 *en); en 1514 drivers/net/ethernet/freescale/enetc/enetc.c static int enetc_set_rss(struct net_device *ndev, int en) en 1524 drivers/net/ethernet/freescale/enetc/enetc.c reg |= (en) ? ENETC_SIMR_RSSE : 0; en 310 drivers/net/ethernet/freescale/enetc/enetc_ethtool.c struct ethtool_rx_flow_spec *fs, bool en) en 317 drivers/net/ethernet/freescale/enetc/enetc_ethtool.c if (!en) en 531 drivers/net/ethernet/freescale/enetc/enetc_hw.h bool en) en 535 drivers/net/ethernet/freescale/enetc/enetc_hw.h val = (val & ~ENETC_RBMR_VTE) | (en ? ENETC_RBMR_VTE : 0); en 540 drivers/net/ethernet/freescale/enetc/enetc_hw.h bool en) en 544 drivers/net/ethernet/freescale/enetc/enetc_hw.h val = (val & ~ENETC_TBMR_VIH) | (en ? ENETC_TBMR_VIH : 0); en 341 drivers/net/ethernet/freescale/enetc/enetc_pf.c static void enetc_set_loopback(struct net_device *ndev, bool en) en 351 drivers/net/ethernet/freescale/enetc/enetc_pf.c (en ? ENETC_PM0_IFM_RLP : 0); en 357 drivers/net/ethernet/freescale/enetc/enetc_pf.c (en ? ENETC_PM0_CMD_XGLP : 0); en 359 drivers/net/ethernet/freescale/enetc/enetc_pf.c (en ? ENETC_PM0_CMD_PHY_TX_EN : 0); en 403 drivers/net/ethernet/freescale/enetc/enetc_pf.c static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en) en 413 drivers/net/ethernet/freescale/enetc/enetc_pf.c cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); en 1002 drivers/net/ethernet/freescale/fman/fman_dtsec.c int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en) en 1019 drivers/net/ethernet/freescale/fman/fman_dtsec.c if (en) en 50 drivers/net/ethernet/freescale/fman/fman_dtsec.h int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en); en 882 drivers/net/ethernet/freescale/fman/fman_memac.c int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en) en 891 drivers/net/ethernet/freescale/fman/fman_memac.c if (en) en 53 drivers/net/ethernet/freescale/fman/fman_memac.h int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en); en 503 drivers/net/ethernet/freescale/fman/fman_tgec.c int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en) en 512 drivers/net/ethernet/freescale/fman/fman_tgec.c if (!en) en 46 drivers/net/ethernet/freescale/fman/fman_tgec.h int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en); en 74 drivers/net/ethernet/freescale/fman/mac.h int (*set_rx_pause)(struct fman_mac *mac_dev, bool en); en 485 drivers/net/ethernet/hisilicon/hns/hnae.h enum hnae_loop loop_mode, int en); en 506 drivers/net/ethernet/hisilicon/hns/hnae.h void (*set_promisc_mode)(struct hnae_handle *handle, u32 en); en 499 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c static void hns_ae_set_promisc_mode(struct hnae_handle *handle, u32 en) en 503 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c hns_dsaf_set_promisc_mode(hns_ae_get_dsaf_dev(handle->dev), en); en 504 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c hns_mac_set_promisc(mac_cb, (u8)!!en); en 810 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c enum hnae_loop loop, int en) en 823 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c !!en); en 826 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c ret = hns_mac_config_mac_loopback(vf_cb->mac_cb, loop, en); en 306 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c static void hns_gmac_set_uc_match(void *mac_drv, u16 en) en 311 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c GMAC_UC_MATCH_EN_B, !en); en 313 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c GMAC_ADDR_EN_B, !en); en 316 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c static void hns_gmac_set_promisc(void *mac_drv, u8 en) en 321 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c hns_gmac_set_uc_match(mac_drv, en); en 1137 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c enum hnae_loop loop, int en) en 1143 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c ret = drv->config_loopback(drv, loop, en); en 1179 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c void hns_mac_set_promisc(struct hns_mac_cb *mac_cb, u8 en) en 1183 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c hns_dsaf_set_promisc_tcam(mac_cb->dsaf_dev, mac_cb->mac_id, !!en); en 1186 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c mac_ctrl_drv->set_promiscuous(mac_ctrl_drv, en); en 449 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h enum hnae_loop loop, int en); en 459 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h void hns_mac_set_promisc(struct hns_mac_cb *mac_cb, u8 en); en 762 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en) en 766 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c DSAF_CFG_MIX_MODE_S, !!en); en 1184 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c u32 en) en 1187 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c if (!en) { en 1194 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c DSAF_MAC_PAUSE_RX_EN_B, !!en); en 1200 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c u32 *en) en 1203 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c *en = 1; en 1205 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c *en = dsaf_get_dev_bit(dsaf_dev, en 317 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h int (*cfg_serdes_loopback)(struct hns_mac_cb *mac_cb, bool en); en 450 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en); en 455 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h u32 *en); en 457 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h u32 en); en 617 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en) en 666 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_set_field(origin, 1ull << 10, 10, en); en 671 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en); en 678 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c hns_mac_config_sds_loopback_acpi(struct hns_mac_cb *mac_cb, bool en) en 686 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c obj_args[1].integer.value = !!en; en 139 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c static void hns_ppe_set_vlan_strip(struct hns_ppe_cb *ppe_cb, int en) en 141 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c dsaf_write_dev(ppe_cb, PPEV2_VLAN_STRIP_EN_REG, en); en 257 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c static void hns_ppe_exc_irq_en(struct hns_ppe_cb *ppe_cb, int en) en 260 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/ en 339 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c struct rcb_common_cb *rcb_common, int en) en 342 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c u32 msk_vlue = en ? 0 : 0xfffffffful; en 193 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en) en 196 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/ en 258 drivers/net/ethernet/hisilicon/hns/hns_ethtool.c static int hns_nic_config_phy_loopback(struct phy_device *phy_dev, u8 en) en 262 drivers/net/ethernet/hisilicon/hns/hns_ethtool.c if (en) { en 398 drivers/net/ethernet/hisilicon/hns3/hnae3.h enum hnae3_loop loop_mode, bool en); en 73 drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop, bool en) en 88 drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c ret = h->ae_algo->ops->set_loopback(h, loop, en); en 98 drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c if (en) { en 689 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_common_hw_err_int(struct hclge_dev *hdev, bool en) en 700 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 726 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_ncsi_hw_err_int(struct hclge_dev *hdev, bool en) en 737 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 748 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_igu_egu_hw_err_int(struct hclge_dev *hdev, bool en) en 756 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 769 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 781 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c ret = hclge_config_ncsi_hw_err_int(hdev, en); en 787 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c bool en) en 799 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 815 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 835 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_ppp_hw_err_int(struct hclge_dev *hdev, bool en) en 840 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c en); en 845 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c en); en 850 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en) en 858 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 875 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 886 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_mac_err_int(struct hclge_dev *hdev, bool en) en 894 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 907 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c int hclge_config_mac_tnl_int(struct hclge_dev *hdev, bool en) en 912 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 923 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c bool en) en 935 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 957 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 965 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) en 981 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_ppu_hw_err_int(struct hclge_dev *hdev, bool en) en 987 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c en); en 996 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c en); en 1003 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c HCLGE_PPU_PF_OTHER_INT_CMD, en); en 1010 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c static int hclge_config_ssu_hw_err_int(struct hclge_dev *hdev, bool en) en 1020 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 1043 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 1545 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en) en 1555 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c if (en) { en 120 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h int (*config_err_int)(struct hclge_dev *hdev, bool en); en 129 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h int hclge_config_mac_tnl_int(struct hclge_dev *hdev, bool en); en 131 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en); en 1425 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_config_gro(struct hclge_dev *hdev, bool en) en 1437 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c req->gro_en = cpu_to_le16(en ? 1 : 0); en 4490 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c int vector_id, bool en, en 4503 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c op = en ? HCLGE_OPC_ADD_RING_TO_VECTOR : HCLGE_OPC_DEL_RING_TO_VECTOR; en 6340 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_mac_phy_link_status_wait(struct hclge_dev *hdev, bool en, en 6348 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c link_ret = en ? HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN; en 6356 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_set_app_loopback(struct hclge_dev *hdev, bool en) en 6375 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c hnae3_set_bit(loop_en, HCLGE_MAC_APP_LP_B, en ? 1 : 0); en 6376 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c hnae3_set_bit(loop_en, HCLGE_MAC_TX_EN_B, en ? 1 : 0); en 6377 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c hnae3_set_bit(loop_en, HCLGE_MAC_RX_EN_B, en ? 1 : 0); en 6392 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_cfg_serdes_loopback(struct hclge_dev *hdev, bool en, en 6419 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c if (en) { en 6456 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_set_serdes_loopback(struct hclge_dev *hdev, bool en, en 6461 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_cfg_serdes_loopback(hdev, en, loop_mode); en 6465 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c hclge_cfg_mac_mode(hdev, en); en 6467 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_mac_phy_link_status_wait(hdev, en, FALSE); en 6505 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c static int hclge_set_phy_loopback(struct hclge_dev *hdev, bool en) en 6513 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c if (en) en 6523 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c hclge_cfg_mac_mode(hdev, en); en 6525 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_mac_phy_link_status_wait(hdev, en, TRUE); en 6555 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c enum hnae3_loop loop_mode, bool en) en 6568 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c u8 switch_param = en ? 0 : BIT(HCLGE_SWITCH_ALW_LPBK_B); en 6578 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_set_app_loopback(hdev, en); en 6582 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_set_serdes_loopback(hdev, en, loop_mode); en 6585 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_set_phy_loopback(hdev, en); en 6599 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ret = hclge_tqp_enable(hdev, i, 0, en); en 940 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h int vector_id, bool en, en 186 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en, en 198 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain); en 329 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c bool en = msg_cmd->is_kill ? true : false; en 331 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c status = hclge_en_hw_strip_rxvtag(handle, en); en 992 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, en 1005 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c type = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : en 1946 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) en 1948 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c writel(en ? 1 : 0, vector->addr); en 2045 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c static int hclgevf_config_gro(struct hclgevf_dev *hdev, bool en) en 2058 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c req->gro_en = cpu_to_le16(en ? 1 : 0); en 404 drivers/net/ethernet/huawei/hinic/hinic_port.c int hinic_set_rx_csum_offload(struct hinic_dev *nic_dev, u32 en) en 419 drivers/net/ethernet/huawei/hinic/hinic_port.c rx_csum_cfg.rx_csum_offload = en; en 434 drivers/net/ethernet/huawei/hinic/hinic_port.c int hinic_set_rx_vlan_offload(struct hinic_dev *nic_dev, u8 en) en 449 drivers/net/ethernet/huawei/hinic/hinic_port.c vlan_cfg.vlan_rx_offload = en; en 541 drivers/net/ethernet/huawei/hinic/hinic_port.h int hinic_set_rx_csum_offload(struct hinic_dev *nic_dev, u32 en); en 584 drivers/net/ethernet/huawei/hinic/hinic_port.h int hinic_set_rx_vlan_offload(struct hinic_dev *nic_dev, u8 en); en 74 drivers/net/ethernet/marvell/octeontx2/af/cgx.c static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool en); en 479 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en) en 492 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c if (en) { en 535 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en) en 549 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c lmac_id, en); en 995 drivers/net/ethernet/qlogic/qed/qed_int.c u32 aeu_inv_arr[NUM_ATTN_REGS], aeu_mask, aeu_en, en; en 1015 drivers/net/ethernet/qlogic/qed/qed_int.c en = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en); en 1018 drivers/net/ethernet/qlogic/qed/qed_int.c parities = sb_attn_sw->parity_mask[i] & aeu_inv_arr[i] & en; en 1049 drivers/net/ethernet/qlogic/qed/qed_int.c en = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en); en 1050 drivers/net/ethernet/qlogic/qed/qed_int.c bits = aeu_inv_arr[i] & en; en 6236 drivers/net/ethernet/sfc/ef10.c static int efx_ef10_ptp_set_ts_sync_events(struct efx_nic *efx, bool en, en 6242 drivers/net/ethernet/sfc/ef10.c set = en ? en 6249 drivers/net/ethernet/sfc/ef10.c if (en && rc != 0) { en 1384 drivers/net/ethernet/sfc/net_driver.h int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp); en 786 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c static void dwmac4_set_arp_offload(struct mac_device_info *hw, bool en, en 795 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c if (en) en 394 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c static void dwmac4_enable_tso(void __iomem *ioaddr, bool en, u32 chan) en 398 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c if (en) { en 245 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c u32 stat, en; en 248 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c en = readl(ioaddr + XGMAC_INT_EN); en 251 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c stat &= en; en 1211 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c bool en, bool ipv6, bool sa, bool inv, en 1267 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c if (!en) en 1274 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c bool en, bool udp, bool sa, bool inv, en 1325 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c if (!en) en 1331 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c static void dwxgmac2_set_arp_offload(struct mac_device_info *hw, bool en, en 1340 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c if (en) en 458 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c static void dwxgmac2_enable_tso(void __iomem *ioaddr, bool en, u32 chan) en 462 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c if (en) en 497 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c static void dwxgmac2_enable_sph(void __iomem *ioaddr, bool en, u32 chan) en 506 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c if (en) en 207 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan); en 210 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*enable_sph)(void __iomem *ioaddr, bool en, u32 chan); en 368 drivers/net/ethernet/stmicro/stmmac/hwif.h bool en, bool ipv6, bool sa, bool inv, en 371 drivers/net/ethernet/stmicro/stmmac/hwif.h bool en, bool udp, bool sa, bool inv, en 373 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*set_arp_offload)(struct mac_device_info *hw, bool en, u32 addr); en 246 drivers/net/phy/aquantia_main.c bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; en 250 drivers/net/phy/aquantia_main.c en ? MDIO_AN_TX_VEND_INT_MASK2_LINK : 0); en 255 drivers/net/phy/aquantia_main.c en ? VEND1_GLOBAL_INT_STD_MASK_ALL : 0); en 260 drivers/net/phy/aquantia_main.c en ? VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 | en 64 drivers/net/phy/mdio-cavium.h OCT_MDIO_BITFIELD_FIELD(u64 en:1, en 55 drivers/net/phy/mdio-octeon.c smi_en.s.en = 1; en 91 drivers/net/phy/mdio-thunder.c smi_en.s.en = 1; en 1063 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en); en 19575 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) en 19579 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c if (!en) { en 798 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c struct ieee80211_vif *vif, int en) en 814 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c if (en) { en 833 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c if (en) { en 877 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c tx_wlan_idx, en); en 1007 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c struct ieee80211_vif *vif, bool en) en 1029 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c if (en) { en 1043 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c struct ieee80211_sta *sta, bool en) en 1081 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c if (en) { en 1095 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c int en) en 1117 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c .enable = en, en 170 drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h int en); en 181 drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h struct ieee80211_vif *vif, bool en); en 183 drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h struct ieee80211_sta *sta, bool en); en 185 drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h int en); en 63 drivers/net/wireless/mediatek/mt76/mt76x02.h void (*pre_tbtt_enable)(struct mt76x02_dev *dev, bool en); en 64 drivers/net/wireless/mediatek/mt76/mt76x02.h void (*beacon_enable)(struct mt76x02_dev *dev, bool en); en 60 drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c static void mt76x02e_pre_tbtt_enable(struct mt76x02_dev *dev, bool en) en 62 drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c if (en) en 68 drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c static void mt76x02e_beacon_enable(struct mt76x02_dev *dev, bool en) en 70 drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c mt76_rmw_field(dev, MT_INT_TIMER_EN, MT_INT_TIMER_EN_PRE_TBTT_EN, en); en 71 drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c if (en) en 207 drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c static void mt76x02u_pre_tbtt_enable(struct mt76x02_dev *dev, bool en) en 209 drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c if (en && dev->mt76.beacon_mask && en 212 drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c if (!en) en 216 drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c static void mt76x02u_beacon_enable(struct mt76x02_dev *dev, bool en) en 223 drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c if (en) { en 148 drivers/pci/pcie/portdrv.h static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} en 107 drivers/pcmcia/db1xxx_ss.c static inline void set_stschg(struct db1x_pcmcia_sock *sock, int en) en 110 drivers/pcmcia/db1xxx_ss.c if (en) en 231 drivers/phy/rockchip/phy-rockchip-inno-usb2.c const struct usb2phy_reg *reg, bool en) en 235 drivers/phy/rockchip/phy-rockchip-inno-usb2.c tmp = en ? reg->enable : reg->disable; en 654 drivers/phy/rockchip/phy-rockchip-inno-usb2.c bool en) en 658 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en); en 659 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en); en 663 drivers/phy/rockchip/phy-rockchip-inno-usb2.c bool en) en 667 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en); en 668 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en); en 672 drivers/phy/rockchip/phy-rockchip-inno-usb2.c bool en) en 676 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en); en 677 drivers/phy/rockchip/phy-rockchip-inno-usb2.c property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en); en 561 drivers/phy/rockchip/phy-rockchip-typec.c const struct usb3phy_reg *reg, bool en) en 564 drivers/phy/rockchip/phy-rockchip-typec.c u32 val = en << reg->enable_bit; en 682 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int en = arg & 1; en 686 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); en 690 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (!en) en 707 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c u32 en, e0, e1; en 710 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); en 722 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c *val = (en | e0 << 1 | e1 << 2) & 0x7; en 220 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c u32 sts, en, bit; en 228 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c en = ioread32(bank->base + NPCM7XX_GP_N_EVEN); en 230 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c en); en 232 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c sts &= en; en 260 drivers/pinctrl/qcom/pinctrl-spmi-mpp.c unsigned int en; en 292 drivers/pinctrl/qcom/pinctrl-spmi-mpp.c en = !!pad->out_value; en 296 drivers/pinctrl/qcom/pinctrl-spmi-mpp.c en; en 3775 drivers/regulator/core.c suspend_state_t state, bool en) en 3786 drivers/regulator/core.c rstate->enabled = (en) ? ENABLE_IN_SUSPEND : DISABLE_IN_SUSPEND; en 71 drivers/regulator/max77650-regulator.c int val, rv, en; en 80 drivers/regulator/max77650-regulator.c en = MAX77650_REGULATOR_EN_CTRL_BITS(val); en 82 drivers/regulator/max77650-regulator.c return en != MAX77650_REGULATOR_DISABLED; en 95 drivers/regulator/pcap-regulator.c const u8 en; en 106 drivers/regulator/pcap-regulator.c .en = _en, \ en 179 drivers/regulator/pcap-regulator.c if (vreg->en == NA) en 182 drivers/regulator/pcap-regulator.c return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); en 190 drivers/regulator/pcap-regulator.c if (vreg->en == NA) en 193 drivers/regulator/pcap-regulator.c return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0); en 202 drivers/regulator/pcap-regulator.c if (vreg->en == NA) en 206 drivers/regulator/pcap-regulator.c return (tmp >> vreg->en) & 1; en 489 drivers/regulator/rk808-regulator.c unsigned int en) en 507 drivers/regulator/rk808-regulator.c if (en) en 440 drivers/rtc/rtc-ac100.c static int ac100_rtc_alarm_irq_enable(struct device *dev, unsigned int en) en 446 drivers/rtc/rtc-ac100.c val = en ? AC100_ALM_INT_ENABLE : 0; en 106 drivers/rtc/rtc-pcap.c static int pcap_rtc_irq_enable(struct device *dev, int pirq, unsigned int en) en 110 drivers/rtc/rtc-pcap.c if (en) en 118 drivers/rtc/rtc-pcap.c static int pcap_rtc_alarm_irq_enable(struct device *dev, unsigned int en) en 120 drivers/rtc/rtc-pcap.c return pcap_rtc_irq_enable(dev, PCAP_IRQ_TODA, en); en 239 drivers/rtc/rtc-pcf2123.c static int pcf2123_rtc_alarm_irq_enable(struct device *dev, unsigned int en) en 244 drivers/rtc/rtc-pcf2123.c en ? CTRL2_AIE : 0); en 158 drivers/rtc/rtc-pcf8563.c static int pcf8563_get_alarm_mode(struct i2c_client *client, unsigned char *en, en 168 drivers/rtc/rtc-pcf8563.c if (en) en 169 drivers/rtc/rtc-pcf8563.c *en = !!(buf & PCF8563_BIT_AIE); en 265 drivers/rtc/rtc-pic32.c static void pic32_rtc_enable(struct pic32_rtc_dev *pdata, int en) en 273 drivers/rtc/rtc-pic32.c if (!en) { en 155 drivers/rtc/rtc-puv3.c static void puv3_rtc_enable(struct device *dev, int en) en 157 drivers/rtc/rtc-puv3.c if (!en) { en 4402 drivers/scsi/qla2xxx/qla_init.c char *st, *en; en 4413 drivers/scsi/qla2xxx/qla_init.c st = en = ha->model_number; en 4414 drivers/scsi/qla2xxx/qla_init.c en += len - 1; en 4415 drivers/scsi/qla2xxx/qla_init.c while (en > st) { en 4416 drivers/scsi/qla2xxx/qla_init.c if (*en != 0x20 && *en != 0x00) en 4418 drivers/scsi/qla2xxx/qla_init.c *en-- = '\0'; en 300 drivers/soundwire/stream.c bool en) en 315 drivers/soundwire/stream.c if (en) en 330 drivers/soundwire/stream.c bool en) en 339 drivers/soundwire/stream.c enable_ch.enable = en; en 355 drivers/soundwire/stream.c en ? "enable" : "disable"); en 369 drivers/soundwire/stream.c static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en) en 379 drivers/soundwire/stream.c s_port, en); en 387 drivers/soundwire/stream.c ret = sdw_enable_disable_master_ports(m_rt, m_port, en); en 57 drivers/spi/spi-bcm-qspi.h bool en); en 69 drivers/spi/spi-iproc-qspi.c bool en) en 82 drivers/spi/spi-iproc-qspi.c if (en) en 203 drivers/spi/spi-stm32.c const struct stm32_spi_reg en; en 320 drivers/spi/spi-stm32.c .en = { STM32F4_SPI_CR1, STM32F4_SPI_CR1_SPE }, en 338 drivers/spi/spi-stm32.c .en = { STM32H7_SPI_CR1, STM32H7_SPI_CR1_SPE }, en 642 drivers/spi/spi-stm32.c stm32_spi_set_bits(spi, spi->cfg->regs->en.reg, en 643 drivers/spi/spi-stm32.c spi->cfg->regs->en.mask); en 182 drivers/staging/fsl-dpaa2/ethsw/dpsw.c u8 en) en 192 drivers/staging/fsl-dpaa2/ethsw/dpsw.c dpsw_set_field(cmd_params->enable_state, ENABLE, en); en 448 drivers/staging/fsl-dpaa2/ethsw/dpsw.c u8 en) en 459 drivers/staging/fsl-dpaa2/ethsw/dpsw.c dpsw_set_field(cmd_params->enable, ENABLE, en); en 479 drivers/staging/fsl-dpaa2/ethsw/dpsw.c u8 en) en 490 drivers/staging/fsl-dpaa2/ethsw/dpsw.c dpsw_set_field(cmd_params->enable, ENABLE, en); en 118 drivers/staging/fsl-dpaa2/ethsw/dpsw.h u8 en); en 242 drivers/staging/fsl-dpaa2/ethsw/dpsw.h u8 en); en 248 drivers/staging/fsl-dpaa2/ethsw/dpsw.h u8 en); en 92 drivers/staging/media/imx/imx-media-fim.c struct v4l2_ctrl *en = fim->ctrl[FIM_CL_ENABLE]; en 99 drivers/staging/media/imx/imx-media-fim.c fim->enabled = en->cur.val; en 107 drivers/staging/media/imx/imx-media-fim.c fim->enabled = en->val; en 2170 drivers/staging/media/ipu3/include/intel-ipu3.h __u32 en:1; en 2257 drivers/staging/media/ipu3/ipu3-css-params.c acc->tcc.gen_control.en = 1; en 114 drivers/staging/octeon/ethernet-mdio.c gmx_cfg.s.en = 0; en 471 drivers/staging/octeon/ethernet.c gmx_cfg.s.en = 1; en 725 drivers/staging/octeon/octeon-stubs.h uint64_t en:1; en 732 drivers/staging/octeon/octeon-stubs.h uint64_t en:1; en 744 drivers/staging/octeon/octeon-stubs.h uint64_t en:1; en 491 drivers/staging/rtl8712/rtl871x_cmd.h u32 en; en 610 drivers/staging/rtl8723bs/include/rtw_cmd.h u32 en; en 167 drivers/thermal/broadcom/brcmstb_thermal.c enum avs_tmon_trip_type type, int en) en 172 drivers/thermal/broadcom/brcmstb_thermal.c dev_dbg(priv->dev, "%sable trip, type %d\n", en ? "en" : "dis", type); en 174 drivers/thermal/broadcom/brcmstb_thermal.c if (en) en 118 drivers/tty/serial/pic32_uart.c static inline void pic32_uart_irqtxen(struct pic32_sport *sport, u8 en) en 120 drivers/tty/serial/pic32_uart.c if (en && !tx_irq_enabled(sport)) { en 123 drivers/tty/serial/pic32_uart.c } else if (!en && tx_irq_enabled(sport)) { en 191 drivers/usb/dwc2/gadget.c unsigned int en) en 202 drivers/usb/dwc2/gadget.c if (en) en 30 drivers/usb/typec/tcpm/tcpci_rt1711h.c #define RT1711H_RTCTRL11_SET(en, tout) \ en 31 drivers/usb/typec/tcpm/tcpci_rt1711h.c (((en) << 7) | ((tout) & 0x0F)) en 379 drivers/video/fbdev/stifb.c #define StaticReg(en) (en) en 380 drivers/video/fbdev/stifb.c #define BGx(en) (en) en 381 drivers/video/fbdev/stifb.c #define FGx(en) (en) en 1403 fs/binfmt_elf.c static int notesize(struct memelfnote *en) en 1408 fs/binfmt_elf.c sz += roundup(strlen(en->name) + 1, 4); en 1409 fs/binfmt_elf.c sz += roundup(en->datasz, 4); en 1416 fs/binfmt_elf.c struct elf_note en; en 1417 fs/binfmt_elf.c en.n_namesz = strlen(men->name) + 1; en 1418 fs/binfmt_elf.c en.n_descsz = men->datasz; en 1419 fs/binfmt_elf.c en.n_type = men->type; en 1421 fs/binfmt_elf.c return dump_emit(cprm, &en, sizeof(en)) && en 1422 fs/binfmt_elf.c dump_emit(cprm, men->name, en.n_namesz) && dump_align(cprm, 4) && en 1265 fs/binfmt_elf_fdpic.c static int notesize(struct memelfnote *en) en 1270 fs/binfmt_elf_fdpic.c sz += roundup(strlen(en->name) + 1, 4); en 1271 fs/binfmt_elf_fdpic.c sz += roundup(en->datasz, 4); en 1280 fs/binfmt_elf_fdpic.c struct elf_note en; en 1281 fs/binfmt_elf_fdpic.c en.n_namesz = strlen(men->name) + 1; en 1282 fs/binfmt_elf_fdpic.c en.n_descsz = men->datasz; en 1283 fs/binfmt_elf_fdpic.c en.n_type = men->type; en 1285 fs/binfmt_elf_fdpic.c return dump_emit(cprm, &en, sizeof(en)) && en 1286 fs/binfmt_elf_fdpic.c dump_emit(cprm, men->name, en.n_namesz) && dump_align(cprm, 4) && en 207 fs/f2fs/extent_cache.c struct extent_node *en; en 209 fs/f2fs/extent_cache.c en = kmem_cache_alloc(extent_node_slab, GFP_ATOMIC); en 210 fs/f2fs/extent_cache.c if (!en) en 213 fs/f2fs/extent_cache.c en->ei = *ei; en 214 fs/f2fs/extent_cache.c INIT_LIST_HEAD(&en->list); en 215 fs/f2fs/extent_cache.c en->et = et; en 217 fs/f2fs/extent_cache.c rb_link_node(&en->rb_node, parent, p); en 218 fs/f2fs/extent_cache.c rb_insert_color_cached(&en->rb_node, &et->root, leftmost); en 221 fs/f2fs/extent_cache.c return en; en 225 fs/f2fs/extent_cache.c struct extent_tree *et, struct extent_node *en) en 227 fs/f2fs/extent_cache.c rb_erase_cached(&en->rb_node, &et->root); en 231 fs/f2fs/extent_cache.c if (et->cached_en == en) en 233 fs/f2fs/extent_cache.c kmem_cache_free(extent_node_slab, en); en 243 fs/f2fs/extent_cache.c struct extent_tree *et, struct extent_node *en) en 246 fs/f2fs/extent_cache.c f2fs_bug_on(sbi, list_empty(&en->list)); en 247 fs/f2fs/extent_cache.c list_del_init(&en->list); en 250 fs/f2fs/extent_cache.c __detach_extent_node(sbi, et, en); en 288 fs/f2fs/extent_cache.c struct extent_node *en; en 290 fs/f2fs/extent_cache.c en = __attach_extent_node(sbi, et, ei, NULL, p, true); en 291 fs/f2fs/extent_cache.c if (!en) en 294 fs/f2fs/extent_cache.c et->largest = en->ei; en 295 fs/f2fs/extent_cache.c et->cached_en = en; en 296 fs/f2fs/extent_cache.c return en; en 303 fs/f2fs/extent_cache.c struct extent_node *en; en 309 fs/f2fs/extent_cache.c en = rb_entry(node, struct extent_node, rb_node); en 310 fs/f2fs/extent_cache.c __release_extent_node(sbi, et, en); en 332 fs/f2fs/extent_cache.c struct extent_node *en; en 355 fs/f2fs/extent_cache.c en = __init_extent_tree(sbi, et, &ei); en 356 fs/f2fs/extent_cache.c if (en) { en 358 fs/f2fs/extent_cache.c list_add_tail(&en->list, &sbi->extent_list); en 381 fs/f2fs/extent_cache.c struct extent_node *en; en 398 fs/f2fs/extent_cache.c en = (struct extent_node *)f2fs_lookup_rb_tree(&et->root, en 400 fs/f2fs/extent_cache.c if (!en) en 403 fs/f2fs/extent_cache.c if (en == et->cached_en) en 408 fs/f2fs/extent_cache.c *ei = en->ei; en 410 fs/f2fs/extent_cache.c if (!list_empty(&en->list)) { en 411 fs/f2fs/extent_cache.c list_move_tail(&en->list, &sbi->extent_list); en 412 fs/f2fs/extent_cache.c et->cached_en = en; en 429 fs/f2fs/extent_cache.c struct extent_node *en = NULL; en 434 fs/f2fs/extent_cache.c en = prev_ex; en 441 fs/f2fs/extent_cache.c if (en) en 444 fs/f2fs/extent_cache.c en = next_ex; en 447 fs/f2fs/extent_cache.c if (!en) en 450 fs/f2fs/extent_cache.c __try_update_largest_extent(et, en); en 453 fs/f2fs/extent_cache.c if (!list_empty(&en->list)) { en 454 fs/f2fs/extent_cache.c list_move_tail(&en->list, &sbi->extent_list); en 455 fs/f2fs/extent_cache.c et->cached_en = en; en 458 fs/f2fs/extent_cache.c return en; en 469 fs/f2fs/extent_cache.c struct extent_node *en = NULL; en 482 fs/f2fs/extent_cache.c en = __attach_extent_node(sbi, et, ei, parent, p, leftmost); en 483 fs/f2fs/extent_cache.c if (!en) en 486 fs/f2fs/extent_cache.c __try_update_largest_extent(et, en); en 490 fs/f2fs/extent_cache.c list_add_tail(&en->list, &sbi->extent_list); en 491 fs/f2fs/extent_cache.c et->cached_en = en; en 493 fs/f2fs/extent_cache.c return en; en 501 fs/f2fs/extent_cache.c struct extent_node *en = NULL, *en1 = NULL; en 532 fs/f2fs/extent_cache.c en = (struct extent_node *)f2fs_lookup_rb_tree_ret(&et->root, en 538 fs/f2fs/extent_cache.c if (!en) en 539 fs/f2fs/extent_cache.c en = next_en; en 542 fs/f2fs/extent_cache.c while (en && en->ei.fofs < end) { en 548 fs/f2fs/extent_cache.c dei = en->ei; en 553 fs/f2fs/extent_cache.c en->ei.len = pos - en->ei.fofs; en 554 fs/f2fs/extent_cache.c prev_en = en; en 567 fs/f2fs/extent_cache.c en->ei.fofs = end; en 568 fs/f2fs/extent_cache.c en->ei.blk += end - dei.fofs; en 569 fs/f2fs/extent_cache.c en->ei.len -= end - dei.fofs; en 570 fs/f2fs/extent_cache.c next_en = en; en 576 fs/f2fs/extent_cache.c struct rb_node *node = rb_next(&en->rb_node); en 583 fs/f2fs/extent_cache.c __try_update_largest_extent(et, en); en 585 fs/f2fs/extent_cache.c __release_extent_node(sbi, et, en); en 596 fs/f2fs/extent_cache.c en = next_en; en 634 fs/f2fs/extent_cache.c struct extent_node *en; en 679 fs/f2fs/extent_cache.c en = list_first_entry(&sbi->extent_list, en 681 fs/f2fs/extent_cache.c et = en->et; en 684 fs/f2fs/extent_cache.c list_move_tail(&en->list, &sbi->extent_list); en 688 fs/f2fs/extent_cache.c list_del_init(&en->list); en 691 fs/f2fs/extent_cache.c __detach_extent_node(sbi, et, en); en 782 fs/f2fs/f2fs.h struct extent_node *en) en 784 fs/f2fs/f2fs.h if (en->ei.len > et->largest.len) { en 785 fs/f2fs/f2fs.h et->largest = en->ei; en 245 include/linux/iio/imu/adis.h bool en; en 58 include/media/davinci/isif.h __u8 en; en 173 include/media/davinci/isif.h __u8 en; en 194 include/media/davinci/isif.h __u8 en; en 237 include/media/davinci/isif.h __u8 en; en 325 include/media/davinci/isif.h __u8 en; en 76 include/media/davinci/vpss.h int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en); en 90 include/net/erspan.h en:2, en 98 include/net/erspan.h en:2, en 192 include/net/erspan.h ershdr->en = enc_type; en 286 include/net/erspan.h ershdr->en = bso; en 2127 include/soc/tegra/bpmp-abi.h int32_t en; en 30 net/mpls/mpls_iptunnel.c static unsigned int mpls_encap_size(struct mpls_iptunnel_encap *en) en 33 net/mpls/mpls_iptunnel.c return en->labels * sizeof(struct mpls_shim_hdr); en 132 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en = container_of(head, en 136 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_dest_put_and_free(en->dest); en 137 net/netfilter/ipvs/ip_vs_lblc.c kfree(en); en 140 net/netfilter/ipvs/ip_vs_lblc.c static inline void ip_vs_lblc_del(struct ip_vs_lblc_entry *en) en 142 net/netfilter/ipvs/ip_vs_lblc.c hlist_del_rcu(&en->list); en 143 net/netfilter/ipvs/ip_vs_lblc.c call_rcu(&en->rcu_head, ip_vs_lblc_rcu_free); en 168 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_hash(struct ip_vs_lblc_table *tbl, struct ip_vs_lblc_entry *en) en 170 net/netfilter/ipvs/ip_vs_lblc.c unsigned int hash = ip_vs_lblc_hashkey(en->af, &en->addr); en 172 net/netfilter/ipvs/ip_vs_lblc.c hlist_add_head_rcu(&en->list, &tbl->bucket[hash]); en 183 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 185 net/netfilter/ipvs/ip_vs_lblc.c hlist_for_each_entry_rcu(en, &tbl->bucket[hash], list) en 186 net/netfilter/ipvs/ip_vs_lblc.c if (ip_vs_addr_equal(af, &en->addr, addr)) en 187 net/netfilter/ipvs/ip_vs_lblc.c return en; en 201 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 203 net/netfilter/ipvs/ip_vs_lblc.c en = ip_vs_lblc_get(af, tbl, daddr); en 204 net/netfilter/ipvs/ip_vs_lblc.c if (en) { en 205 net/netfilter/ipvs/ip_vs_lblc.c if (en->dest == dest) en 206 net/netfilter/ipvs/ip_vs_lblc.c return en; en 207 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_del(en); en 209 net/netfilter/ipvs/ip_vs_lblc.c en = kmalloc(sizeof(*en), GFP_ATOMIC); en 210 net/netfilter/ipvs/ip_vs_lblc.c if (!en) en 213 net/netfilter/ipvs/ip_vs_lblc.c en->af = af; en 214 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_addr_copy(af, &en->addr, daddr); en 215 net/netfilter/ipvs/ip_vs_lblc.c en->lastuse = jiffies; en 218 net/netfilter/ipvs/ip_vs_lblc.c en->dest = dest; en 220 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_hash(tbl, en); en 222 net/netfilter/ipvs/ip_vs_lblc.c return en; en 232 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 239 net/netfilter/ipvs/ip_vs_lblc.c hlist_for_each_entry_safe(en, next, &tbl->bucket[i], list) { en 240 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_del(en); en 259 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 268 net/netfilter/ipvs/ip_vs_lblc.c hlist_for_each_entry_safe(en, next, &tbl->bucket[j], list) { en 270 net/netfilter/ipvs/ip_vs_lblc.c en->lastuse + en 274 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_del(en); en 301 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 324 net/netfilter/ipvs/ip_vs_lblc.c hlist_for_each_entry_safe(en, next, &tbl->bucket[j], list) { en 325 net/netfilter/ipvs/ip_vs_lblc.c if (time_before(now, en->lastuse + ENTRY_TIMEOUT)) en 328 net/netfilter/ipvs/ip_vs_lblc.c ip_vs_lblc_del(en); en 486 net/netfilter/ipvs/ip_vs_lblc.c struct ip_vs_lblc_entry *en; en 491 net/netfilter/ipvs/ip_vs_lblc.c en = ip_vs_lblc_get(svc->af, tbl, &iph->daddr); en 492 net/netfilter/ipvs/ip_vs_lblc.c if (en) { en 494 net/netfilter/ipvs/ip_vs_lblc.c en->lastuse = jiffies; en 505 net/netfilter/ipvs/ip_vs_lblc.c dest = en->dest; en 301 net/netfilter/ipvs/ip_vs_lblcr.c static inline void ip_vs_lblcr_free(struct ip_vs_lblcr_entry *en) en 303 net/netfilter/ipvs/ip_vs_lblcr.c hlist_del_rcu(&en->list); en 304 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_dest_set_eraseall(&en->set); en 305 net/netfilter/ipvs/ip_vs_lblcr.c kfree_rcu(en, rcu_head); en 331 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_lblcr_hash(struct ip_vs_lblcr_table *tbl, struct ip_vs_lblcr_entry *en) en 333 net/netfilter/ipvs/ip_vs_lblcr.c unsigned int hash = ip_vs_lblcr_hashkey(en->af, &en->addr); en 335 net/netfilter/ipvs/ip_vs_lblcr.c hlist_add_head_rcu(&en->list, &tbl->bucket[hash]); en 346 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 348 net/netfilter/ipvs/ip_vs_lblcr.c hlist_for_each_entry_rcu(en, &tbl->bucket[hash], list) en 349 net/netfilter/ipvs/ip_vs_lblcr.c if (ip_vs_addr_equal(af, &en->addr, addr)) en 350 net/netfilter/ipvs/ip_vs_lblcr.c return en; en 364 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 366 net/netfilter/ipvs/ip_vs_lblcr.c en = ip_vs_lblcr_get(af, tbl, daddr); en 367 net/netfilter/ipvs/ip_vs_lblcr.c if (!en) { en 368 net/netfilter/ipvs/ip_vs_lblcr.c en = kmalloc(sizeof(*en), GFP_ATOMIC); en 369 net/netfilter/ipvs/ip_vs_lblcr.c if (!en) en 372 net/netfilter/ipvs/ip_vs_lblcr.c en->af = af; en 373 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_addr_copy(af, &en->addr, daddr); en 374 net/netfilter/ipvs/ip_vs_lblcr.c en->lastuse = jiffies; en 377 net/netfilter/ipvs/ip_vs_lblcr.c atomic_set(&(en->set.size), 0); en 378 net/netfilter/ipvs/ip_vs_lblcr.c INIT_LIST_HEAD(&en->set.list); en 380 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_dest_set_insert(&en->set, dest, false); en 382 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_lblcr_hash(tbl, en); en 383 net/netfilter/ipvs/ip_vs_lblcr.c return en; en 386 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_dest_set_insert(&en->set, dest, true); en 388 net/netfilter/ipvs/ip_vs_lblcr.c return en; en 399 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 405 net/netfilter/ipvs/ip_vs_lblcr.c hlist_for_each_entry_safe(en, next, &tbl->bucket[i], list) { en 406 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_lblcr_free(en); en 426 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 433 net/netfilter/ipvs/ip_vs_lblcr.c hlist_for_each_entry_safe(en, next, &tbl->bucket[j], list) { en 434 net/netfilter/ipvs/ip_vs_lblcr.c if (time_after(en->lastuse + en 438 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_lblcr_free(en); en 465 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 488 net/netfilter/ipvs/ip_vs_lblcr.c hlist_for_each_entry_safe(en, next, &tbl->bucket[j], list) { en 489 net/netfilter/ipvs/ip_vs_lblcr.c if (time_before(now, en->lastuse+ENTRY_TIMEOUT)) en 492 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_lblcr_free(en); en 650 net/netfilter/ipvs/ip_vs_lblcr.c struct ip_vs_lblcr_entry *en; en 655 net/netfilter/ipvs/ip_vs_lblcr.c en = ip_vs_lblcr_get(svc->af, tbl, &iph->daddr); en 656 net/netfilter/ipvs/ip_vs_lblcr.c if (en) { en 657 net/netfilter/ipvs/ip_vs_lblcr.c en->lastuse = jiffies; en 660 net/netfilter/ipvs/ip_vs_lblcr.c dest = ip_vs_dest_set_min(&en->set); en 663 net/netfilter/ipvs/ip_vs_lblcr.c if (atomic_read(&en->set.size) > 1 && en 664 net/netfilter/ipvs/ip_vs_lblcr.c time_after(jiffies, en->set.lastmod + en 667 net/netfilter/ipvs/ip_vs_lblcr.c if (atomic_read(&en->set.size) > 1) { en 670 net/netfilter/ipvs/ip_vs_lblcr.c m = ip_vs_dest_set_max(&en->set); en 672 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_dest_set_erase(&en->set, m); en 691 net/netfilter/ipvs/ip_vs_lblcr.c ip_vs_dest_set_insert(&en->set, dest, true); en 230 scripts/dtc/libfdt/fdt_sw.c fdt32_t *en; en 234 scripts/dtc/libfdt/fdt_sw.c en = fdt_grab_space_(fdt, FDT_TAGSIZE); en 235 scripts/dtc/libfdt/fdt_sw.c if (! en) en 238 scripts/dtc/libfdt/fdt_sw.c *en = cpu_to_fdt32(FDT_END_NODE); en 235 sound/pci/au88x0/au88x0.h static void vortex_connect_default(vortex_t * vortex, int en); en 242 sound/pci/au88x0/au88x0.h static void vortex_wt_connect(vortex_t * vortex, int en); en 246 sound/pci/au88x0/au88x0.h static void vortex_route(vortex_t * vortex, int en, unsigned char channel, en 249 sound/pci/au88x0/au88x0.h static void vortex_routes(vortex_t * vortex, int en, unsigned char channel, en 253 sound/pci/au88x0/au88x0.h static void vortex_connection_mixin_mix(vortex_t * vortex, int en, en 266 sound/pci/au88x0/au88x0.h static void vortex_Vort3D_connect(vortex_t * vortex, int en); en 267 sound/pci/au88x0/au88x0.h static void vortex_Vort3D_InitializeSource(a3dsrc_t *a, int en, vortex_t *v); en 606 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_connect(vortex_t * v, int en) en 618 sound/pci/au88x0/au88x0_a3d.c vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); en 625 sound/pci/au88x0/au88x0_a3d.c vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); en 636 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2), ADB_XTALKIN(i)); en 637 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2) + 1, ADB_XTALKIN(5 + i)); en 640 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_EQIN(2)); en 641 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_EQIN(3)); en 644 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_MIXIN(v->mixxtlk[0])); en 645 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_MIXIN(v->mixxtlk[1])); en 646 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[0], v->mixplayb[0], 0); en 647 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[1], v->mixplayb[1], 0); en 649 sound/pci/au88x0/au88x0_a3d.c en ? MIX_DEFIGAIN : VOL_MIN); en 651 sound/pci/au88x0/au88x0_a3d.c en ? MIX_DEFIGAIN : VOL_MIN); en 653 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[0], en 655 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[1], en 659 sound/pci/au88x0/au88x0_a3d.c en ? MIX_DEFIGAIN : VOL_MIN); en 662 sound/pci/au88x0/au88x0_a3d.c en ? MIX_DEFIGAIN : VOL_MIN); en 668 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_InitializeSource(a3dsrc_t *a, int en, vortex_t *v) en 675 sound/pci/au88x0/au88x0_a3d.c if (en) { en 201 sound/pci/au88x0/au88x0_core.c vortex_mix_setenablebit(vortex_t * vortex, unsigned char mix, int mixin, int en) en 211 sound/pci/au88x0/au88x0_core.c if (en) en 462 sound/pci/au88x0/au88x0_core.c vortex_src_set_throttlesource(vortex_t * vortex, unsigned char src, int en) en 467 sound/pci/au88x0/au88x0_core.c if (en) en 788 sound/pci/au88x0/au88x0_core.c static void vortex_fifo_setadbvalid(vortex_t * vortex, int fifo, int en) en 792 sound/pci/au88x0/au88x0_core.c 0xffffffef) | ((1 & en) << 4) | FIFO_U1); en 889 sound/pci/au88x0/au88x0_core.c static void vortex_fifo_setwtvalid(vortex_t * vortex, int fifo, int en) en 893 sound/pci/au88x0/au88x0_core.c 0xffffffef) | ((en & 1) << 4) | FIFO_U1); en 1716 sound/pci/au88x0/au88x0_core.c vortex_route(vortex_t * vortex, int en, unsigned char channel, en 1722 sound/pci/au88x0/au88x0_core.c if (en) { en 1747 sound/pci/au88x0/au88x0_core.c vortex_routes(vortex_t * vortex, int en, unsigned char channel, en 1755 sound/pci/au88x0/au88x0_core.c if (en) { en 1781 sound/pci/au88x0/au88x0_core.c vortex_routeLRT(vortex_t * vortex, int en, unsigned char ch, en 1793 sound/pci/au88x0/au88x0_core.c if (en) { en 1830 sound/pci/au88x0/au88x0_core.c vortex_connection_adbdma_src(vortex_t * vortex, int en, unsigned char ch, en 1833 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, ch, ADB_DMA(adbdma), ADB_SRCIN(src)); en 1838 sound/pci/au88x0/au88x0_core.c vortex_connection_src_mixin(vortex_t * vortex, int en, en 1842 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, channel, ADB_SRCOUT(src), ADB_MIXIN(mixin)); en 1847 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex_t * vortex, int en, unsigned char mixin, en 1850 sound/pci/au88x0/au88x0_core.c if (en) { en 1859 sound/pci/au88x0/au88x0_core.c vortex_connection_adb_mixin(vortex_t * vortex, int en, en 1863 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, channel, source, ADB_MIXIN(mixin)); en 1867 sound/pci/au88x0/au88x0_core.c vortex_connection_src_adbdma(vortex_t * vortex, int en, unsigned char ch, en 1870 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, ch, ADB_SRCOUT(src), ADB_DMA(adbdma)); en 1874 sound/pci/au88x0/au88x0_core.c vortex_connection_src_src_adbdma(vortex_t * vortex, int en, en 1879 sound/pci/au88x0/au88x0_core.c vortex_routeLRT(vortex, en, ch, ADB_SRCOUT(src0), ADB_SRCOUT(src1), en 1885 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex_t * vortex, int en, unsigned char ch, en 1888 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, ch, ADB_MIXOUT(mix), dest); en 1894 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_src(vortex_t * vortex, int en, unsigned char ch, en 1897 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, ch, ADB_MIXOUT(mix), ADB_SRCIN(src)); en 1903 sound/pci/au88x0/au88x0_core.c vortex_connection_adbdma_src_src(vortex_t * vortex, int en, en 1908 sound/pci/au88x0/au88x0_core.c vortex_routes(vortex, en, channel, ADB_DMA(adbdma), en 1914 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_mix_adbdma(vortex_t * vortex, int en, en 1927 sound/pci/au88x0/au88x0_core.c if (en) { en 1942 sound/pci/au88x0/au88x0_core.c vortex_connect_codecplay(vortex_t * vortex, int en, unsigned char mixers[]) en 1945 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[0], ADB_CODECOUT(0)); en 1946 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[1], ADB_CODECOUT(1)); en 1950 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[0], ADB_EQIN(0)); en 1951 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[1], ADB_EQIN(1)); en 1955 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, 0x11, ADB_EQOUT(0), ADB_CODECOUT(0)); en 1956 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, 0x11, ADB_EQOUT(1), ADB_CODECOUT(1)); en 1961 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[2], en 1963 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[3], en 1969 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[0], ADB_CODECOUT(0)); en 1970 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x11, mixers[1], ADB_CODECOUT(1)); en 1976 sound/pci/au88x0/au88x0_core.c vortex_connect_codecrec(vortex_t * vortex, int en, unsigned char mixin0, en 1985 sound/pci/au88x0/au88x0_core.c vortex_connection_adb_mixin(vortex, en, 0x11, ADB_CODECIN(0), mixin0); en 1986 sound/pci/au88x0/au88x0_core.c vortex_connection_adb_mixin(vortex, en, 0x11, ADB_CODECIN(1), mixin1); en 2051 sound/pci/au88x0/au88x0_core.c static void vortex_connect_default(vortex_t * vortex, int en) en 2054 sound/pci/au88x0/au88x0_core.c vortex->mixplayb[0] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2056 sound/pci/au88x0/au88x0_core.c vortex->mixplayb[1] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2059 sound/pci/au88x0/au88x0_core.c vortex->mixplayb[2] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2061 sound/pci/au88x0/au88x0_core.c vortex->mixplayb[3] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2064 sound/pci/au88x0/au88x0_core.c vortex_connect_codecplay(vortex, en, vortex->mixplayb); en 2066 sound/pci/au88x0/au88x0_core.c vortex->mixcapt[0] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2068 sound/pci/au88x0/au88x0_core.c vortex->mixcapt[1] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2070 sound/pci/au88x0/au88x0_core.c vortex_connect_codecrec(vortex, en, MIX_CAPT(0), MIX_CAPT(1)); en 2074 sound/pci/au88x0/au88x0_core.c vortex->mixspdif[0] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2076 sound/pci/au88x0/au88x0_core.c vortex->mixspdif[1] = vortex_adb_checkinout(vortex, vortex->fixed_res, en, en 2078 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x14, vortex->mixspdif[0], en 2080 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_adb(vortex, en, 0x14, vortex->mixspdif[1], en 2085 sound/pci/au88x0/au88x0_core.c vortex_wt_connect(vortex, en); en 2089 sound/pci/au88x0/au88x0_core.c vortex_Vort3D_connect(vortex, en); en 2113 sound/pci/au88x0/au88x0_core.c int i, en; en 2117 sound/pci/au88x0/au88x0_core.c en = 0; en 2119 sound/pci/au88x0/au88x0_core.c vortex->dma_adb[dma].resources, en, en 2122 sound/pci/au88x0/au88x0_core.c en = 1; en 2124 sound/pci/au88x0/au88x0_core.c vortex_adb_checkinout(vortex, NULL, en, en 2144 sound/pci/au88x0/au88x0_core.c stream->resources, en, en 2153 sound/pci/au88x0/au88x0_core.c en, en 2167 sound/pci/au88x0/au88x0_core.c stream->resources, en, en 2176 sound/pci/au88x0/au88x0_core.c vortex_Vort3D_InitializeSource(&vortex->a3d[a3d], en, en 2180 sound/pci/au88x0/au88x0_core.c if ((stream->type == VORTEX_PCM_SPDIF) && (en)) { en 2192 sound/pci/au88x0/au88x0_core.c vortex_connection_adbdma_src(vortex, en, en 2196 sound/pci/au88x0/au88x0_core.c vortex_connection_src_mixin(vortex, en, en 2199 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2203 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2214 sound/pci/au88x0/au88x0_core.c vortex_connection_adbdma_src(vortex, en, en 2218 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, 0x11, ADB_SRCOUT(src[i]), ADB_A3DIN(a3d)); en 2224 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, 0x14, en 2232 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2236 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2246 sound/pci/au88x0/au88x0_core.c if (stream->type == VORTEX_PCM_ADB && en) { en 2258 sound/pci/au88x0/au88x0_core.c vortex_route(vortex, en, 0x14, en 2263 sound/pci/au88x0/au88x0_core.c if ((stream->type == VORTEX_PCM_SPDIF) && (!en)) { en 2283 sound/pci/au88x0/au88x0_core.c stream->resources, en, en 2292 sound/pci/au88x0/au88x0_core.c stream->resources, en, en 2301 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, MIX_CAPT(0), mix[0], 0); en 2302 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_src(vortex, en, 0x11, mix[0], src[0]); en 2304 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2306 sound/pci/au88x0/au88x0_core.c vortex_connection_src_adbdma(vortex, en, en 2310 sound/pci/au88x0/au88x0_core.c vortex_connection_mixin_mix(vortex, en, en 2312 sound/pci/au88x0/au88x0_core.c vortex_connection_mix_src(vortex, en, 0x11, mix[1], en 2314 sound/pci/au88x0/au88x0_core.c vortex_connection_src_src_adbdma(vortex, en, en 13 sound/pci/au88x0/au88x0_synth.c static void vortex_fifo_setwtvalid(vortex_t * vortex, int fifo, int en); en 14 sound/pci/au88x0/au88x0_synth.c static void vortex_connection_adb_mixin(vortex_t * vortex, int en, en 18 sound/pci/au88x0/au88x0_synth.c static void vortex_connection_mixin_mix(vortex_t * vortex, int en, en 40 sound/pci/au88x0/au88x0_synth.c static void vortex_wt_setdsout(vortex_t * vortex, u32 wt, int en) en 46 sound/pci/au88x0/au88x0_synth.c if (en) en 104 sound/pci/au88x0/au88x0_synth.c static void vortex_wt_connect(vortex_t * vortex, int en) en 119 sound/pci/au88x0/au88x0_synth.c vortex->fixed_res, en, en 123 sound/pci/au88x0/au88x0_synth.c vortex_route(vortex, en, 0x11, en 126 sound/pci/au88x0/au88x0_synth.c vortex_connection_mixin_mix(vortex, en, mix, en 129 sound/pci/au88x0/au88x0_synth.c vortex_connection_mixin_mix(vortex, en, en 747 sound/soc/codecs/cs43130.c static int cs43130_pcm_dsd_mix(bool en, struct regmap *regmap) en 749 sound/soc/codecs/cs43130.c if (en) { en 115 sound/soc/sh/rcar/adg.c unsigned int val, en; en 127 sound/soc/sh/rcar/adg.c en = 0; en 140 sound/soc/sh/rcar/adg.c en = 1 << (sel + 1); /* fixme */ en 164 sound/soc/sh/rcar/adg.c *target_en = en; en 171 sound/soc/sh/rcar/adg.c u32 *in, u32 *out, u32 *en) en 204 sound/soc/sh/rcar/adg.c if (en) en 205 sound/soc/sh/rcar/adg.c *en = _en; en 240 sound/soc/sh/rcar/adg.c u32 mask, en; en 248 sound/soc/sh/rcar/adg.c &in, &out, &en); en 257 sound/soc/sh/rcar/adg.c if (en) en 258 sound/soc/sh/rcar/adg.c rsnd_mod_bset(adg_mod, DIV_EN, en, en); en 41 sound/soc/sh/rcar/dma.c struct rsnd_dmaen en; en 54 sound/soc/sh/rcar/dma.c #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en) en 951 tools/perf/builtin-script.c static int ip__fprintf_jump(uint64_t ip, struct branch_entry *en, en 957 tools/perf/builtin-script.c en->flags.predicted ? " PRED" : "", en 958 tools/perf/builtin-script.c en->flags.mispred ? " MISPRED" : "", en 959 tools/perf/builtin-script.c en->flags.in_tx ? " INTX" : "", en 960 tools/perf/builtin-script.c en->flags.abort ? " ABORT" : ""); en 961 tools/perf/builtin-script.c if (en->flags.cycles) { en 962 tools/perf/builtin-script.c *total_cycles += en->flags.cycles; en 963 tools/perf/builtin-script.c printed += fprintf(fp, " %d cycles [%d]", en->flags.cycles, *total_cycles); en 965 tools/perf/builtin-script.c printed += fprintf(fp, " %.2f IPC", (float)insn / en->flags.cycles); en 28 tools/power/cpupower/utils/helpers/amd.c unsigned en:1; en 37 tools/power/cpupower/utils/helpers/amd.c unsigned en:1; en 122 tools/power/cpupower/utils/helpers/amd.c if ((cpu_family == 0x17) && (!pstate.fam17h_bits.en)) en 124 tools/power/cpupower/utils/helpers/amd.c else if (!pstate.bits.en)