hole_start        163 arch/sparc/kernel/adi_64.c 	unsigned long end_addr, hole_start, hole_end;
hole_start        167 arch/sparc/kernel/adi_64.c 	hole_start = 0;
hole_start        198 arch/sparc/kernel/adi_64.c 			    (tag_desc->end > hole_start))
hole_start        199 arch/sparc/kernel/adi_64.c 				hole_start = tag_desc->end;
hole_start        273 arch/sparc/kernel/adi_64.c 		if (tmp_addr < hole_start) {
hole_start        277 arch/sparc/kernel/adi_64.c 			tmp_addr = hole_start + 1;
hole_start        325 drivers/gpu/drm/drm_mm.c 		u64 hole_start;
hole_start        328 drivers/gpu/drm/drm_mm.c 		hole_start = __drm_mm_hole_node_start(node);
hole_start        330 drivers/gpu/drm/drm_mm.c 		if (addr < hole_start)
hole_start        332 drivers/gpu/drm/drm_mm.c 		else if (addr > hole_start + node->hole_size)
hole_start        404 drivers/gpu/drm/drm_mm.c 	u64 hole_start, hole_end;
hole_start        416 drivers/gpu/drm/drm_mm.c 	adj_start = hole_start = __drm_mm_hole_node_start(hole);
hole_start        417 drivers/gpu/drm/drm_mm.c 	adj_end = hole_end = hole_start + hole->hole_size;
hole_start        433 drivers/gpu/drm/drm_mm.c 	if (node->start > hole_start)
hole_start        493 drivers/gpu/drm/drm_mm.c 		u64 hole_start = __drm_mm_hole_node_start(hole);
hole_start        494 drivers/gpu/drm/drm_mm.c 		u64 hole_end = hole_start + hole->hole_size;
hole_start        498 drivers/gpu/drm/drm_mm.c 		if (mode == DRM_MM_INSERT_LOW && hole_start >= range_end)
hole_start        504 drivers/gpu/drm/drm_mm.c 		col_start = hole_start;
hole_start        551 drivers/gpu/drm/drm_mm.c 		if (adj_start > hole_start)
hole_start        729 drivers/gpu/drm/drm_mm.c 	u64 hole_start, hole_end;
hole_start        748 drivers/gpu/drm/drm_mm.c 	hole_start = __drm_mm_hole_node_start(hole);
hole_start        751 drivers/gpu/drm/drm_mm.c 	col_start = hole_start;
hole_start        789 drivers/gpu/drm/drm_mm.c 	DRM_MM_BUG_ON(scan->hit_start < hole_start);
hole_start        860 drivers/gpu/drm/drm_mm.c 	u64 hole_start, hole_end;
hole_start        873 drivers/gpu/drm/drm_mm.c 		hole_start = __drm_mm_hole_node_start(hole);
hole_start        874 drivers/gpu/drm/drm_mm.c 		hole_end = hole_start + hole->hole_size;
hole_start        876 drivers/gpu/drm/drm_mm.c 		if (hole_start <= scan->hit_start &&
hole_start        886 drivers/gpu/drm/drm_mm.c 	DRM_MM_BUG_ON(hole_start > scan->hit_start);
hole_start        889 drivers/gpu/drm/drm_mm.c 	mm->color_adjust(hole, scan->color, &hole_start, &hole_end);
hole_start        890 drivers/gpu/drm/drm_mm.c 	if (hole_start > scan->hit_start)
hole_start        425 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	u64 hole_start, hole_end;
hole_start        434 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
hole_start        435 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		resv.start = hole_start;
hole_start        436 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		resv.size = hole_end - hole_start - 1; /* PAGE_SIZE units */
hole_start       2680 drivers/gpu/drm/i915/i915_gem_gtt.c 	unsigned long hole_start, hole_end;
hole_start       2715 drivers/gpu/drm/i915/i915_gem_gtt.c 	drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
hole_start       2717 drivers/gpu/drm/i915/i915_gem_gtt.c 			      hole_start, hole_end);
hole_start       2718 drivers/gpu/drm/i915/i915_gem_gtt.c 		ggtt->vm.clear_range(&ggtt->vm, hole_start,
hole_start       2719 drivers/gpu/drm/i915/i915_gem_gtt.c 				     hole_end - hole_start);
hole_start        217 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			 u64 hole_start, u64 hole_end,
hole_start        227 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	for (size = 12; (hole_end - hole_start) >> size; size++) {
hole_start        233 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		hole_size = (hole_end - hole_start) >> size;
hole_start        239 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				 __func__, hole_start, hole_end, size, hole_size);
hole_start        253 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		GEM_BUG_ON(hole_start + count * BIT_ULL(size) > hole_end);
hole_start        276 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			u64 addr = hole_start + order[n] * BIT_ULL(size);
hole_start        284 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				hole_end = hole_start; /* quit */
hole_start        304 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			u64 addr = hole_start + order[n] * BIT_ULL(size);
hole_start        344 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		     u64 hole_start, u64 hole_end,
hole_start        347 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	const u64 hole_size = hole_end - hole_start;
hole_start        372 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				{ "bottom-up", hole_start, 1, },
hole_start        396 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 						if (offset < hole_start + obj->base.size)
hole_start        433 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 						if (offset < hole_start + obj->base.size)
hole_start        469 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 						if (offset < hole_start + obj->base.size)
hole_start        506 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 						if (offset < hole_start + obj->base.size)
hole_start        556 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		     u64 hole_start, u64 hole_end,
hole_start        559 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	const u64 hole_size = hole_end - hole_start;
hole_start        587 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		for (addr = hole_start;
hole_start        594 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				       hole_start, hole_end, err);
hole_start        640 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		    u64 hole_start, u64 hole_end,
hole_start        670 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		for (addr = round_up(hole_start + I915_GTT_PAGE_SIZE, step) - I915_GTT_PAGE_SIZE;
hole_start        678 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				       hole_start, hole_end,
hole_start        716 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		      u64 hole_start, u64 hole_end,
hole_start        728 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	for (size = 12; (hole_end - hole_start) >> size; size++) {
hole_start        735 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		hole_size = (hole_end - hole_start) >> size;
hole_start        741 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				 __func__, hole_start, hole_end, size, hole_size);
hole_start        775 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			u64 addr = hole_start + order[n] * BIT_ULL(size);
hole_start        782 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				       hole_start, hole_end,
hole_start        826 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			 u64 hole_start, u64 hole_end,
hole_start        837 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	for (addr = hole_start; addr < hole_end; ) {
hole_start        861 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 			       __func__, addr, size, hole_start, hole_end, err);
hole_start        880 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				__func__, addr, hole_start, hole_end)) {
hole_start        893 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		       u64 hole_start, u64 hole_end,
hole_start        904 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		err = __shrink_hole(i915, vm, hole_start, hole_end, end_time);
hole_start        916 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		       u64 hole_start, u64 hole_end,
hole_start        996 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				      u64 hole_start, u64 hole_end,
hole_start       1079 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				     u64 hole_start, u64 hole_end,
hole_start       1083 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	u64 hole_start, hole_end, last = 0;
hole_start       1091 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	drm_mm_for_each_hole(node, &ggtt->vm.mm, hole_start, hole_end) {
hole_start       1092 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		if (hole_start < last)
hole_start       1097 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 						 &hole_start, &hole_end);
hole_start       1098 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		if (hole_start >= hole_end)
hole_start       1101 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 		err = func(i915, &ggtt->vm, hole_start, hole_end, end_time);
hole_start       1247 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 				     u64 hole_start, u64 hole_end,
hole_start         56 drivers/gpu/drm/selftests/test-drm_mm.c 	u64 hole_start, hole_end;
hole_start         60 drivers/gpu/drm/selftests/test-drm_mm.c 	drm_mm_for_each_hole(hole, mm, hole_start, hole_end)
hole_start         80 drivers/gpu/drm/selftests/test-drm_mm.c 	u64 hole_start, hole_end;
hole_start         88 drivers/gpu/drm/selftests/test-drm_mm.c 	drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
hole_start         89 drivers/gpu/drm/selftests/test-drm_mm.c 		if (start != hole_start || end != hole_end) {
hole_start         92 drivers/gpu/drm/selftests/test-drm_mm.c 				       hole_start, hole_end,
hole_start       1152 drivers/gpu/drm/selftests/test-drm_mm.c 	u64 hole_start, hole_end;
hole_start       1155 drivers/gpu/drm/selftests/test-drm_mm.c 	drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
hole_start       1171 drivers/gpu/drm/selftests/test-drm_mm.c 			hole_start, hole_end, hole_end - hole_start,
hole_start       5209 fs/btrfs/inode.c 	u64 hole_start = ALIGN(oldsize, fs_info->sectorsize);
hole_start       5225 fs/btrfs/inode.c 	if (size <= hole_start)
hole_start       5228 fs/btrfs/inode.c 	btrfs_lock_and_flush_ordered_range(io_tree, BTRFS_I(inode), hole_start,
hole_start       5230 fs/btrfs/inode.c 	cur_offset = hole_start;
hole_start       5290 fs/btrfs/inode.c 	unlock_extent_cached(io_tree, hole_start, block_end - 1, &cached_state);
hole_start       7308 fs/btrfs/inode.c 		u64 hole_start;
hole_start       7331 fs/btrfs/inode.c 		       hole_start = max(hole_em->start, start);
hole_start       7332 fs/btrfs/inode.c 		       hole_len = hole_end - hole_start;
hole_start       7335 fs/btrfs/inode.c 		if (hole_em && delalloc_start > hole_start) {
hole_start       7341 fs/btrfs/inode.c 			em->len = min(hole_len, delalloc_start - hole_start);
hole_start       7342 fs/btrfs/inode.c 			em->start = hole_start;
hole_start       7343 fs/btrfs/inode.c 			em->orig_start = hole_start;
hole_start       2419 fs/ext4/extents.c ext4_ext_put_gap_in_cache(struct inode *inode, ext4_lblk_t hole_start,
hole_start       2424 fs/ext4/extents.c 	ext4_es_find_extent_range(inode, &ext4_es_is_delayed, hole_start,
hole_start       2425 fs/ext4/extents.c 				  hole_start + hole_len - 1, &es);
hole_start       2428 fs/ext4/extents.c 		if (es.es_lblk <= hole_start)
hole_start       2430 fs/ext4/extents.c 		hole_len = min(es.es_lblk - hole_start, hole_len);
hole_start       2432 fs/ext4/extents.c 	ext_debug(" -> %u:%u\n", hole_start, hole_len);
hole_start       2433 fs/ext4/extents.c 	ext4_es_insert_extent(inode, hole_start, hole_len, ~0,
hole_start       4361 fs/ext4/extents.c 		ext4_lblk_t hole_start, hole_len;
hole_start       4363 fs/ext4/extents.c 		hole_start = map->m_lblk;
hole_start       4364 fs/ext4/extents.c 		hole_len = ext4_ext_determine_hole(inode, path, &hole_start);
hole_start       4369 fs/ext4/extents.c 		ext4_ext_put_gap_in_cache(inode, hole_start, hole_len);
hole_start       4372 fs/ext4/extents.c 		if (hole_start != map->m_lblk)
hole_start       4373 fs/ext4/extents.c 			hole_len -= map->m_lblk - hole_start;
hole_start        536 fs/hugetlbfs/inode.c 	loff_t hole_start, hole_end;
hole_start        542 fs/hugetlbfs/inode.c 	hole_start = round_up(offset, hpage_size);
hole_start        545 fs/hugetlbfs/inode.c 	if (hole_end > hole_start) {
hole_start        560 fs/hugetlbfs/inode.c 						hole_start >> PAGE_SHIFT,
hole_start        563 fs/hugetlbfs/inode.c 		remove_inode_hugepages(inode, hole_start, hole_end);
hole_start        390 include/drm/drm_mm.h #define drm_mm_for_each_hole(pos, mm, hole_start, hole_end) \
hole_start        394 include/drm/drm_mm.h 	     hole_start = drm_mm_hole_node_start(pos), \
hole_start        395 include/drm/drm_mm.h 	     hole_end = hole_start + pos->hole_size, \
hole_start        440 kernel/kexec_core.c 	unsigned long hole_start, hole_end, size;
hole_start        445 kernel/kexec_core.c 	hole_start = (image->control_page + (size - 1)) & ~(size - 1);
hole_start        446 kernel/kexec_core.c 	hole_end   = hole_start + size - 1;
hole_start        460 kernel/kexec_core.c 			if ((hole_end >= mstart) && (hole_start <= mend)) {
hole_start        462 kernel/kexec_core.c 				hole_start = (mend + (size - 1)) & ~(size - 1);
hole_start        463 kernel/kexec_core.c 				hole_end   = hole_start + size - 1;
hole_start        469 kernel/kexec_core.c 			pages = pfn_to_page(hole_start >> PAGE_SHIFT);