ipp 525 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; ipp 1216 drivers/gpu/drm/amd/display/dc/core/dc_resource.c split_pipe->plane_res.ipp = pool->ipps[i]; ipp 1619 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.ipp = pool->ipps[i]; ipp 1889 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.ipp = pool->ipps[tg_inst]; ipp 351 drivers/gpu/drm/amd/display/dc/core/dc_stream.c (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp)) ipp 44 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct input_pixel_processor *ipp, ipp 48 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); ipp 70 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct input_pixel_processor *ipp, ipp 73 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); ipp 140 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c static void dce_ipp_program_prescale(struct input_pixel_processor *ipp, ipp 143 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); ipp 172 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct input_pixel_processor *ipp, ipp 176 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); ipp 220 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct input_pixel_processor *ipp, ipp 223 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); ipp 263 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c void dce_ipp_destroy(struct input_pixel_processor **ipp) ipp 265 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c kfree(TO_DCE_IPP(*ipp)); ipp 266 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c *ipp = NULL; ipp 31 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h #define TO_DCE_IPP(ipp)\ ipp 32 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h container_of(ipp, struct dce_ipp, base) ipp 236 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h void dce_ipp_destroy(struct input_pixel_processor **ipp); ipp 550 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); ipp 552 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c if (!ipp) { ipp 557 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c dce_ipp_construct(ipp, ctx, inst, ipp 559 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c return &ipp->base; ipp 274 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; ipp 279 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (ipp == NULL) ipp 286 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_program_prescale(ipp, &prescale_params); ipp 291 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_program_input_lut(ipp, plane_state->gamma_correction); ipp 295 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); ipp 299 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); ipp 302 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC); ipp 305 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); ipp 313 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); ipp 2686 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; ipp 2705 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (ipp->funcs->ipp_cursor_set_position) ipp 2706 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ipp->funcs->ipp_cursor_set_position(ipp, &pos_cpy, ¶m); ipp 2715 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (pipe_ctx->plane_res.ipp && ipp 2716 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes) ipp 2717 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes( ipp 2718 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_res.ipp, attributes); ipp 596 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); ipp 598 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (!ipp) { ipp 603 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c dce_ipp_construct(ipp, ctx, inst, ipp 605 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c return &ipp->base; ipp 594 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); ipp 596 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (!ipp) { ipp 601 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c dce_ipp_construct(ipp, ctx, inst, ipp 603 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c return &ipp->base; ipp 675 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); ipp 677 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c if (!ipp) { ipp 682 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c dce_ipp_construct(ipp, ctx, inst, ipp 684 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c return &ipp->base; ipp 718 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); ipp 720 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (!ipp) { ipp 725 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dce_ipp_construct(ipp, ctx, inst, ipp 727 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c return &ipp->base; ipp 46 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c static void dcn10_ipp_destroy(struct input_pixel_processor **ipp) ipp 48 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c kfree(TO_DCN10_IPP(*ipp)); ipp 49 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c *ipp = NULL; ipp 31 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h #define TO_DCN10_IPP(ipp)\ ipp 32 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h container_of(ipp, struct dcn10_ipp, base) ipp 603 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dcn10_ipp *ipp = ipp 606 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (!ipp) { ipp 611 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dcn10_ipp_construct(ipp, ctx, inst, ipp 613 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c return &ipp->base; ipp 1111 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; ipp 994 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct dcn10_ipp *ipp = ipp 997 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (!ipp) { ipp 1002 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dcn20_ipp_construct(ipp, ctx, inst, ipp 1004 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c return &ipp->base; ipp 1735 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c next_odm_pipe->plane_res.ipp = pool->ipps[next_odm_pipe->pipe_idx]; ipp 1815 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; ipp 2954 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; ipp 643 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c struct dcn10_ipp *ipp = ipp 646 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (!ipp) { ipp 651 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dcn20_ipp_construct(ipp, ctx, inst, ipp 653 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c return &ipp->base; ipp 261 drivers/gpu/drm/amd/display/dc/inc/core_types.h struct input_pixel_processor *ipp; ipp 71 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 76 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 83 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp); ipp 87 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 95 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 99 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 104 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 108 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h struct input_pixel_processor *ipp, ipp 111 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h void (*ipp_destroy)(struct input_pixel_processor **ipp); ipp 98 drivers/gpu/drm/exynos/exynos_drm_fimc.c struct exynos_drm_ipp ipp; ipp 1083 drivers/gpu/drm/exynos/exynos_drm_fimc.c static int fimc_commit(struct exynos_drm_ipp *ipp, ipp 1087 drivers/gpu/drm/exynos/exynos_drm_fimc.c container_of(ipp, struct fimc_context, ipp); ipp 1106 drivers/gpu/drm/exynos/exynos_drm_fimc.c static void fimc_abort(struct exynos_drm_ipp *ipp, ipp 1110 drivers/gpu/drm/exynos/exynos_drm_fimc.c container_of(ipp, struct fimc_context, ipp); ipp 1133 drivers/gpu/drm/exynos/exynos_drm_fimc.c struct exynos_drm_ipp *ipp = &ctx->ipp; ipp 1136 drivers/gpu/drm/exynos/exynos_drm_fimc.c ipp->drm_dev = drm_dev; ipp 1139 drivers/gpu/drm/exynos/exynos_drm_fimc.c exynos_drm_ipp_register(dev, ipp, &ipp_funcs, ipp 1154 drivers/gpu/drm/exynos/exynos_drm_fimc.c struct exynos_drm_ipp *ipp = &ctx->ipp; ipp 1156 drivers/gpu/drm/exynos/exynos_drm_fimc.c exynos_drm_ipp_unregister(dev, ipp); ipp 98 drivers/gpu/drm/exynos/exynos_drm_gsc.c struct exynos_drm_ipp ipp; ipp 1114 drivers/gpu/drm/exynos/exynos_drm_gsc.c static int gsc_commit(struct exynos_drm_ipp *ipp, ipp 1117 drivers/gpu/drm/exynos/exynos_drm_gsc.c struct gsc_context *ctx = container_of(ipp, struct gsc_context, ipp); ipp 1143 drivers/gpu/drm/exynos/exynos_drm_gsc.c static void gsc_abort(struct exynos_drm_ipp *ipp, ipp 1147 drivers/gpu/drm/exynos/exynos_drm_gsc.c container_of(ipp, struct gsc_context, ipp); ipp 1169 drivers/gpu/drm/exynos/exynos_drm_gsc.c struct exynos_drm_ipp *ipp = &ctx->ipp; ipp 1175 drivers/gpu/drm/exynos/exynos_drm_gsc.c exynos_drm_ipp_register(dev, ipp, &ipp_funcs, ipp 1190 drivers/gpu/drm/exynos/exynos_drm_gsc.c struct exynos_drm_ipp *ipp = &ctx->ipp; ipp 1192 drivers/gpu/drm/exynos/exynos_drm_gsc.c exynos_drm_ipp_unregister(dev, ipp); ipp 48 drivers/gpu/drm/exynos/exynos_drm_ipp.c int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp, ipp 53 drivers/gpu/drm/exynos/exynos_drm_ipp.c WARN_ON(!ipp); ipp 58 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_lock_init(&ipp->lock); ipp 59 drivers/gpu/drm/exynos/exynos_drm_ipp.c INIT_LIST_HEAD(&ipp->todo_list); ipp 60 drivers/gpu/drm/exynos/exynos_drm_ipp.c init_waitqueue_head(&ipp->done_wq); ipp 61 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->dev = dev; ipp 62 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->funcs = funcs; ipp 63 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->capabilities = caps; ipp 64 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->name = name; ipp 65 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->formats = formats; ipp 66 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->num_formats = num_formats; ipp 69 drivers/gpu/drm/exynos/exynos_drm_ipp.c list_add_tail(&ipp->head, &ipp_list); ipp 70 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->id = num_ipp++; ipp 72 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(dev, "Registered ipp %d\n", ipp->id); ipp 83 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp) ipp 85 drivers/gpu/drm/exynos/exynos_drm_ipp.c WARN_ON(ipp->task); ipp 86 drivers/gpu/drm/exynos/exynos_drm_ipp.c WARN_ON(!list_empty(&ipp->todo_list)); ipp 87 drivers/gpu/drm/exynos/exynos_drm_ipp.c list_del(&ipp->head); ipp 107 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp; ipp 117 drivers/gpu/drm/exynos/exynos_drm_ipp.c list_for_each_entry(ipp, &ipp_list, head) { ipp 118 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (put_user(ipp->id, ipp_ptr + copied)) ipp 130 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp; ipp 132 drivers/gpu/drm/exynos/exynos_drm_ipp.c list_for_each_entry(ipp, &ipp_list, head) ipp 133 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (ipp->id == id) ipp 134 drivers/gpu/drm/exynos/exynos_drm_ipp.c return ipp; ipp 156 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp; ipp 159 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp = __ipp_get(resp->ipp_id); ipp 160 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (!ipp) ipp 163 drivers/gpu/drm/exynos/exynos_drm_ipp.c resp->ipp_id = ipp->id; ipp 164 drivers/gpu/drm/exynos/exynos_drm_ipp.c resp->capabilities = ipp->capabilities; ipp 170 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (resp->formats_count >= ipp->num_formats) { ipp 171 drivers/gpu/drm/exynos/exynos_drm_ipp.c for (i = 0; i < ipp->num_formats; i++) { ipp 173 drivers/gpu/drm/exynos/exynos_drm_ipp.c .fourcc = ipp->formats[i].fourcc, ipp 174 drivers/gpu/drm/exynos/exynos_drm_ipp.c .type = ipp->formats[i].type, ipp 175 drivers/gpu/drm/exynos/exynos_drm_ipp.c .modifier = ipp->formats[i].modifier, ipp 183 drivers/gpu/drm/exynos/exynos_drm_ipp.c resp->formats_count = ipp->num_formats; ipp 189 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp, uint32_t fourcc, ipp 194 drivers/gpu/drm/exynos/exynos_drm_ipp.c for (i = 0; i < ipp->num_formats; i++) { ipp 195 drivers/gpu/drm/exynos/exynos_drm_ipp.c if ((ipp->formats[i].type & type) && ipp 196 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->formats[i].fourcc == fourcc && ipp 197 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->formats[i].modifier == mod) ipp 198 drivers/gpu/drm/exynos/exynos_drm_ipp.c return &ipp->formats[i]; ipp 223 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp; ipp 229 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp = __ipp_get(resp->ipp_id); ipp 230 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (!ipp) ipp 233 drivers/gpu/drm/exynos/exynos_drm_ipp.c format = __ipp_format_get(ipp, resp->fourcc, resp->modifier, ipp 257 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_task_alloc(struct exynos_drm_ipp *ipp) ipp 265 drivers/gpu/drm/exynos/exynos_drm_ipp.c task->dev = ipp->dev; ipp 266 drivers/gpu/drm/exynos/exynos_drm_ipp.c task->ipp = ipp; ipp 393 drivers/gpu/drm/exynos/exynos_drm_ipp.c static void exynos_drm_ipp_task_free(struct exynos_drm_ipp *ipp, ipp 401 drivers/gpu/drm/exynos/exynos_drm_ipp.c drm_event_cancel_free(ipp->drm_dev, &task->event->base); ipp 556 drivers/gpu/drm/exynos/exynos_drm_ipp.c fmt = __ipp_format_get(task->ipp, buf->buf.fourcc, buf->buf.modifier, ipp 603 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp = task->ipp; ipp 638 drivers/gpu/drm/exynos/exynos_drm_ipp.c if ((!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CROP) && ipp 640 drivers/gpu/drm/exynos/exynos_drm_ipp.c (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_ROTATE) && rotate) || ipp 641 drivers/gpu/drm/exynos/exynos_drm_ipp.c (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_SCALE) && scale) || ipp 642 drivers/gpu/drm/exynos/exynos_drm_ipp.c (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CONVERT) && ipp 657 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(ipp->dev, "Task %pK: all checks done.\n", ipp 708 drivers/gpu/drm/exynos/exynos_drm_ipp.c ret = drm_event_reserve_init(task->ipp->drm_dev, file_priv, &e->base, ipp 727 drivers/gpu/drm/exynos/exynos_drm_ipp.c task->event->event.sequence = atomic_inc_return(&task->ipp->sequence); ipp 729 drivers/gpu/drm/exynos/exynos_drm_ipp.c drm_send_event(task->ipp->drm_dev, &task->event->base); ipp 742 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_task_free(task->ipp, task); ipp 754 drivers/gpu/drm/exynos/exynos_drm_ipp.c static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp); ipp 763 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp = task->ipp; ipp 767 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->id, task, ret); ipp 769 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_lock_irqsave(&ipp->lock, flags); ipp 770 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (ipp->task == task) ipp 771 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->task = NULL; ipp 774 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 776 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_next_task(ipp); ipp 777 drivers/gpu/drm/exynos/exynos_drm_ipp.c wake_up(&ipp->done_wq); ipp 785 drivers/gpu/drm/exynos/exynos_drm_ipp.c static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp) ipp 791 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, try to run new task\n", ipp 792 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->id); ipp 794 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_lock_irqsave(&ipp->lock, flags); ipp 796 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (ipp->task || list_empty(&ipp->todo_list)) { ipp 797 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 801 drivers/gpu/drm/exynos/exynos_drm_ipp.c task = list_first_entry(&ipp->todo_list, struct exynos_drm_ipp_task, ipp 804 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->task = task; ipp 806 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 808 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(ipp->dev, ipp 809 drivers/gpu/drm/exynos/exynos_drm_ipp.c "ipp: %d, selected task %pK to run\n", ipp->id, ipp 812 drivers/gpu/drm/exynos/exynos_drm_ipp.c ret = ipp->funcs->commit(ipp, task); ipp 817 drivers/gpu/drm/exynos/exynos_drm_ipp.c static void exynos_drm_ipp_schedule_task(struct exynos_drm_ipp *ipp, ipp 822 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_lock_irqsave(&ipp->lock, flags); ipp 823 drivers/gpu/drm/exynos/exynos_drm_ipp.c list_add(&task->head, &ipp->todo_list); ipp 824 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 826 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_next_task(ipp); ipp 829 drivers/gpu/drm/exynos/exynos_drm_ipp.c static void exynos_drm_ipp_task_abort(struct exynos_drm_ipp *ipp, ipp 834 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_lock_irqsave(&ipp->lock, flags); ipp 838 drivers/gpu/drm/exynos/exynos_drm_ipp.c } else if (ipp->task != task) { ipp 848 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 849 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (ipp->funcs->abort) ipp 850 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->funcs->abort(ipp, task); ipp 853 drivers/gpu/drm/exynos/exynos_drm_ipp.c spin_unlock_irqrestore(&ipp->lock, flags); ipp 874 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct exynos_drm_ipp *ipp; ipp 886 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp = __ipp_get(arg->ipp_id); ipp 887 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (!ipp) ipp 890 drivers/gpu/drm/exynos/exynos_drm_ipp.c task = exynos_drm_ipp_task_alloc(ipp); ipp 918 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(ipp->dev, ipp 920 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->id, task); ipp 923 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_schedule_task(task->ipp, task); ipp 926 drivers/gpu/drm/exynos/exynos_drm_ipp.c DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, processing task %pK\n", ipp 927 drivers/gpu/drm/exynos/exynos_drm_ipp.c ipp->id, task); ipp 928 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_schedule_task(ipp, task); ipp 929 drivers/gpu/drm/exynos/exynos_drm_ipp.c ret = wait_event_interruptible(ipp->done_wq, ipp 932 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_task_abort(ipp, task); ipp 938 drivers/gpu/drm/exynos/exynos_drm_ipp.c exynos_drm_ipp_task_free(ipp, task); ipp 29 drivers/gpu/drm/exynos/exynos_drm_ipp.h int (*commit)(struct exynos_drm_ipp *ipp, ipp 43 drivers/gpu/drm/exynos/exynos_drm_ipp.h void (*abort)(struct exynos_drm_ipp *ipp, ipp 84 drivers/gpu/drm/exynos/exynos_drm_ipp.h struct exynos_drm_ipp *ipp; ipp 127 drivers/gpu/drm/exynos/exynos_drm_ipp.h int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp, ipp 132 drivers/gpu/drm/exynos/exynos_drm_ipp.h struct exynos_drm_ipp *ipp); ipp 57 drivers/gpu/drm/exynos/exynos_drm_rotator.c struct exynos_drm_ipp ipp; ipp 217 drivers/gpu/drm/exynos/exynos_drm_rotator.c static int rotator_commit(struct exynos_drm_ipp *ipp, ipp 221 drivers/gpu/drm/exynos/exynos_drm_rotator.c container_of(ipp, struct rot_context, ipp); ipp 243 drivers/gpu/drm/exynos/exynos_drm_rotator.c struct exynos_drm_ipp *ipp = &rot->ipp; ipp 246 drivers/gpu/drm/exynos/exynos_drm_rotator.c ipp->drm_dev = drm_dev; ipp 249 drivers/gpu/drm/exynos/exynos_drm_rotator.c exynos_drm_ipp_register(dev, ipp, &ipp_funcs, ipp 262 drivers/gpu/drm/exynos/exynos_drm_rotator.c struct exynos_drm_ipp *ipp = &rot->ipp; ipp 264 drivers/gpu/drm/exynos/exynos_drm_rotator.c exynos_drm_ipp_unregister(dev, ipp); ipp 40 drivers/gpu/drm/exynos/exynos_drm_scaler.c struct exynos_drm_ipp ipp; ipp 356 drivers/gpu/drm/exynos/exynos_drm_scaler.c static int scaler_commit(struct exynos_drm_ipp *ipp, ipp 360 drivers/gpu/drm/exynos/exynos_drm_scaler.c container_of(ipp, struct scaler_context, ipp); ipp 450 drivers/gpu/drm/exynos/exynos_drm_scaler.c struct exynos_drm_ipp *ipp = &scaler->ipp; ipp 453 drivers/gpu/drm/exynos/exynos_drm_scaler.c ipp->drm_dev = drm_dev; ipp 456 drivers/gpu/drm/exynos/exynos_drm_scaler.c exynos_drm_ipp_register(dev, ipp, &ipp_funcs, ipp 471 drivers/gpu/drm/exynos/exynos_drm_scaler.c struct exynos_drm_ipp *ipp = &scaler->ipp; ipp 473 drivers/gpu/drm/exynos/exynos_drm_scaler.c exynos_drm_ipp_unregister(dev, ipp); ipp 790 drivers/phy/broadcom/phy-brcm-usb-init.c if (params->ipp == 1) ipp 802 drivers/phy/broadcom/phy-brcm-usb-init.c if (params->ipp != 2) ipp 811 drivers/phy/broadcom/phy-brcm-usb-init.c if (params->ipp == 1 && ((reg & USB_CTRL_MASK(SETUP, IPP)) == 0)) ipp 20 drivers/phy/broadcom/phy-brcm-usb-init.h int ipp; ipp 323 drivers/phy/broadcom/phy-brcm-usb.c of_property_read_u32(dn, "brcm,ipp", &priv->ini.ipp); ipp 31 fs/gfs2/super.h struct gfs2_inode **ipp); ipp 496 fs/xfs/xfs_icache.c struct xfs_inode **ipp, ipp 578 fs/xfs/xfs_icache.c *ipp = ip; ipp 621 fs/xfs/xfs_icache.c xfs_inode_t **ipp) ipp 671 fs/xfs/xfs_icache.c *ipp = ip; ipp 46 fs/xfs/xfs_icache.h uint flags, uint lock_flags, xfs_inode_t **ipp); ipp 682 fs/xfs/xfs_inode.c xfs_inode_t **ipp, ipp 697 fs/xfs/xfs_inode.c error = xfs_iget(dp->i_mount, NULL, inum, 0, 0, ipp); ipp 707 fs/xfs/xfs_inode.c *ipp = NULL; ipp 751 fs/xfs/xfs_inode.c xfs_inode_t **ipp) ipp 770 fs/xfs/xfs_inode.c *ipp = NULL; ipp 945 fs/xfs/xfs_inode.c *ipp = ip; ipp 969 fs/xfs/xfs_inode.c xfs_inode_t **ipp) /* pointer to inode; it will be ipp 1006 fs/xfs/xfs_inode.c *ipp = NULL; ipp 1010 fs/xfs/xfs_inode.c *ipp = NULL; ipp 1057 fs/xfs/xfs_inode.c *ipp = NULL; ipp 1076 fs/xfs/xfs_inode.c *ipp = NULL; ipp 1083 fs/xfs/xfs_inode.c *ipp = ip; ipp 1131 fs/xfs/xfs_inode.c xfs_inode_t **ipp) ipp 1257 fs/xfs/xfs_inode.c *ipp = ip; ipp 1286 fs/xfs/xfs_inode.c struct xfs_inode **ipp) ipp 1352 fs/xfs/xfs_inode.c *ipp = ip; ipp 416 fs/xfs/xfs_inode.h struct xfs_inode **ipp, struct xfs_name *ci_name); ipp 418 fs/xfs/xfs_inode.h umode_t mode, dev_t rdev, struct xfs_inode **ipp); ipp 420 fs/xfs/xfs_inode.h struct xfs_inode **ipp); ipp 150 fs/xfs/xfs_symlink.c struct xfs_inode **ipp) ipp 173 fs/xfs/xfs_symlink.c *ipp = NULL; ipp 346 fs/xfs/xfs_symlink.c *ipp = ip; ipp 11 fs/xfs/xfs_symlink.h const char *target_path, umode_t mode, struct xfs_inode **ipp); ipp 1473 net/iucv/iucv.c struct iucv_path_pending *ipp = (void *) data; ipp 1478 net/iucv/iucv.c BUG_ON(iucv_path_table[ipp->ippathid]); ipp 1481 net/iucv/iucv.c path = iucv_path_alloc(ipp->ipmsglim, ipp->ipflags1, GFP_ATOMIC); ipp 1484 net/iucv/iucv.c path->pathid = ipp->ippathid; ipp 1486 net/iucv/iucv.c EBCASC(ipp->ipvmid, 8); ipp 1499 net/iucv/iucv.c if (!handler->path_pending(path, ipp->ipvmid, ipp->ipuser)) ipp 1509 net/iucv/iucv.c iucv_sever_pathid(ipp->ippathid, error); ipp 3218 security/smack/smack_lsm.c static int smack_ipc_permission(struct kern_ipc_perm *ipp, short flag) ipp 3220 security/smack/smack_lsm.c struct smack_known **blob = smack_ipc(ipp); ipp 3228 security/smack/smack_lsm.c ad.a.u.ipc_id = ipp->id; ipp 3240 security/smack/smack_lsm.c static void smack_ipc_getsecid(struct kern_ipc_perm *ipp, u32 *secid) ipp 3242 security/smack/smack_lsm.c struct smack_known **blob = smack_ipc(ipp);