pixel_clk 1233 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c info->lcd_timing.pixel_clk = pixel_clk 1351 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c info->lcd_timing.pixel_clk = pixel_clk 868 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10; pixel_clk 1509 drivers/gpu/drm/amd/display/dc/bios/command_table.c uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; pixel_clk 1513 drivers/gpu/drm/amd/display/dc/bios/command_table.c div_u64(pixel_clk * pixel_clk_10_khz_out, pixel_clk 128 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h uint32_t pixel_clk; /* in KHz */ pixel_clk 93 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c clk_set_rate(priv->pixel_clk, m->crtc_clock * 1000); pixel_clk 537 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk) pixel_clk 549 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (pixel_clk == 25175000) pixel_clk 551 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 27027000) pixel_clk 553 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 74176000 || pixel_clk == 148352000) pixel_clk 561 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (pixel_clk == 25175000) pixel_clk 563 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 74176000) pixel_clk 565 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 148352000) pixel_clk 573 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (pixel_clk == 25175000) pixel_clk 575 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 27027000) pixel_clk 577 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 74176000) pixel_clk 579 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c else if (pixel_clk == 148352000) pixel_clk 594 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c unsigned long pixel_clk, unsigned int sample_rate) pixel_clk 596 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c unsigned long ftdms = pixel_clk; pixel_clk 601 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c n = hdmi_compute_n(sample_rate, pixel_clk); pixel_clk 67 drivers/gpu/drm/mediatek/mtk_dpi.c struct clk *pixel_clk; pixel_clk 382 drivers/gpu/drm/mediatek/mtk_dpi.c clk_disable_unprepare(dpi->pixel_clk); pixel_clk 399 drivers/gpu/drm/mediatek/mtk_dpi.c ret = clk_prepare_enable(dpi->pixel_clk); pixel_clk 441 drivers/gpu/drm/mediatek/mtk_dpi.c clk_set_rate(dpi->pixel_clk, vm.pixelclock); pixel_clk 442 drivers/gpu/drm/mediatek/mtk_dpi.c vm.pixelclock = clk_get_rate(dpi->pixel_clk); pixel_clk 707 drivers/gpu/drm/mediatek/mtk_dpi.c dpi->pixel_clk = devm_clk_get(dev, "pixel"); pixel_clk 708 drivers/gpu/drm/mediatek/mtk_dpi.c if (IS_ERR(dpi->pixel_clk)) { pixel_clk 709 drivers/gpu/drm/mediatek/mtk_dpi.c ret = PTR_ERR(dpi->pixel_clk); pixel_clk 109 drivers/gpu/drm/msm/dsi/dsi_host.c struct clk *pixel_clk; pixel_clk 407 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->pixel_clk = msm_clk_get(pdev, "pixel"); pixel_clk 408 drivers/gpu/drm/msm/dsi/dsi_host.c if (IS_ERR(msm_host->pixel_clk)) { pixel_clk 409 drivers/gpu/drm/msm/dsi/dsi_host.c ret = PTR_ERR(msm_host->pixel_clk); pixel_clk 412 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->pixel_clk = NULL; pixel_clk 432 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->pixel_clk_src = clk_get_parent(msm_host->pixel_clk); pixel_clk 521 drivers/gpu/drm/msm/dsi/dsi_host.c ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); pixel_clk 549 drivers/gpu/drm/msm/dsi/dsi_host.c ret = clk_prepare_enable(msm_host->pixel_clk); pixel_clk 567 drivers/gpu/drm/msm/dsi/dsi_host.c clk_disable_unprepare(msm_host->pixel_clk); pixel_clk 602 drivers/gpu/drm/msm/dsi/dsi_host.c ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); pixel_clk 626 drivers/gpu/drm/msm/dsi/dsi_host.c ret = clk_prepare_enable(msm_host->pixel_clk); pixel_clk 647 drivers/gpu/drm/msm/dsi/dsi_host.c clk_disable_unprepare(msm_host->pixel_clk); pixel_clk 655 drivers/gpu/drm/msm/dsi/dsi_host.c clk_disable_unprepare(msm_host->pixel_clk); pixel_clk 65 drivers/gpu/drm/msm/edp/edp_ctrl.c struct clk *pixel_clk; pixel_clk 156 drivers/gpu/drm/msm/edp/edp_ctrl.c ctrl->pixel_clk = msm_clk_get(pdev, "pixel"); pixel_clk 157 drivers/gpu/drm/msm/edp/edp_ctrl.c if (IS_ERR(ctrl->pixel_clk)) { pixel_clk 158 drivers/gpu/drm/msm/edp/edp_ctrl.c ret = PTR_ERR(ctrl->pixel_clk); pixel_clk 160 drivers/gpu/drm/msm/edp/edp_ctrl.c ctrl->pixel_clk = NULL; pixel_clk 238 drivers/gpu/drm/msm/edp/edp_ctrl.c ret = clk_set_rate(ctrl->pixel_clk, pixel_clk 246 drivers/gpu/drm/msm/edp/edp_ctrl.c ret = clk_prepare_enable(ctrl->pixel_clk); pixel_clk 264 drivers/gpu/drm/msm/edp/edp_ctrl.c clk_disable_unprepare(ctrl->pixel_clk); pixel_clk 283 drivers/gpu/drm/msm/edp/edp_ctrl.c clk_disable_unprepare(ctrl->pixel_clk); pixel_clk 479 drivers/gpu/drm/stm/ltdc.c result = clk_round_rate(ldev->pixel_clk, target); pixel_clk 523 drivers/gpu/drm/stm/ltdc.c if (clk_set_rate(ldev->pixel_clk, rate) < 0) { pixel_clk 528 drivers/gpu/drm/stm/ltdc.c adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; pixel_clk 1123 drivers/gpu/drm/stm/ltdc.c clk_disable_unprepare(ldev->pixel_clk); pixel_clk 1133 drivers/gpu/drm/stm/ltdc.c ret = clk_prepare_enable(ldev->pixel_clk); pixel_clk 1179 drivers/gpu/drm/stm/ltdc.c ldev->pixel_clk = devm_clk_get(dev, "lcd"); pixel_clk 1180 drivers/gpu/drm/stm/ltdc.c if (IS_ERR(ldev->pixel_clk)) { pixel_clk 1181 drivers/gpu/drm/stm/ltdc.c if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER) pixel_clk 1183 drivers/gpu/drm/stm/ltdc.c return PTR_ERR(ldev->pixel_clk); pixel_clk 1186 drivers/gpu/drm/stm/ltdc.c if (clk_prepare_enable(ldev->pixel_clk)) { pixel_clk 1281 drivers/gpu/drm/stm/ltdc.c clk_disable_unprepare(ldev->pixel_clk); pixel_clk 1290 drivers/gpu/drm/stm/ltdc.c clk_disable_unprepare(ldev->pixel_clk); pixel_clk 33 drivers/gpu/drm/stm/ltdc.h struct clk *pixel_clk; /* lcd pixel clock */ pixel_clk 192 drivers/gpu/ipu-v3/ipu-csi.c static int ipu_csi_set_testgen_mclk(struct ipu_csi *csi, u32 pixel_clk, pixel_clk 198 drivers/gpu/ipu-v3/ipu-csi.c div_ratio = (ipu_clk / pixel_clk) - 1; pixel_clk 70 drivers/media/platform/cadence/cdns-csi2rx.c struct clk *pixel_clk[CSI2RX_STREAMS_MAX]; pixel_clk 154 drivers/media/platform/cadence/cdns-csi2rx.c ret = clk_prepare_enable(csi2rx->pixel_clk[i]); pixel_clk 179 drivers/media/platform/cadence/cdns-csi2rx.c clk_disable_unprepare(csi2rx->pixel_clk[i - 1]); pixel_clk 197 drivers/media/platform/cadence/cdns-csi2rx.c clk_disable_unprepare(csi2rx->pixel_clk[i]); pixel_clk 352 drivers/media/platform/cadence/cdns-csi2rx.c csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); pixel_clk 353 drivers/media/platform/cadence/cdns-csi2rx.c if (IS_ERR(csi2rx->pixel_clk[i])) { pixel_clk 355 drivers/media/platform/cadence/cdns-csi2rx.c return PTR_ERR(csi2rx->pixel_clk[i]); pixel_clk 107 drivers/media/platform/cadence/cdns-csi2tx.c struct clk *pixel_clk[CSI2TX_STREAMS_MAX]; pixel_clk 481 drivers/media/platform/cadence/cdns-csi2tx.c csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); pixel_clk 482 drivers/media/platform/cadence/cdns-csi2tx.c if (IS_ERR(csi2tx->pixel_clk[i])) { pixel_clk 485 drivers/media/platform/cadence/cdns-csi2tx.c return PTR_ERR(csi2tx->pixel_clk[i]); pixel_clk 507 drivers/video/fbdev/mx3fb.c uint32_t pixel_clk, pixel_clk 568 drivers/video/fbdev/mx3fb.c div = clk_get_rate(ipu_clk) * 16 / pixel_clk; pixel_clk 581 drivers/video/fbdev/mx3fb.c pixel_clk, div >> 4, (div & 7) * 125);