pu 122 arch/powerpc/mm/hugetlbpage.c pud_t *pu; pu 144 arch/powerpc/mm/hugetlbpage.c pu = pud_alloc(mm, pg, addr); pu 145 arch/powerpc/mm/hugetlbpage.c if (!pu) pu 148 arch/powerpc/mm/hugetlbpage.c return (pte_t *)pu; pu 150 arch/powerpc/mm/hugetlbpage.c ptl = pud_lockptr(mm, pu); pu 151 arch/powerpc/mm/hugetlbpage.c hpdp = (hugepd_t *)pu; pu 154 arch/powerpc/mm/hugetlbpage.c pm = pmd_alloc(mm, pu, addr); pu 172 arch/powerpc/mm/hugetlbpage.c pu = pud_alloc(mm, pg, addr); pu 173 arch/powerpc/mm/hugetlbpage.c if (!pu) pu 176 arch/powerpc/mm/hugetlbpage.c ptl = pud_lockptr(mm, pu); pu 177 arch/powerpc/mm/hugetlbpage.c hpdp = (hugepd_t *)pu; pu 180 arch/powerpc/mm/hugetlbpage.c pm = pmd_alloc(mm, pu, addr); pu 66 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c nv50_dac_power(struct nvkm_ior *dac, bool normal, bool pu, pu 72 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c const u32 state = 0x80000000 | (0x00000040 * ! pu | pu 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h void (*power)(struct nvkm_ior *, bool normal, bool pu, pu 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c nv50_pior_power(struct nvkm_ior *pior, bool normal, bool pu, pu 64 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift; pu 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c g94_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) pu 68 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) pu 69 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c data[2] = (data[2] & ~0x0000ff00) | (pu << 8); pu 71 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) pu 81 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) pu 82 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c data[2] = (data[2] & ~0x0000ff00) | (pu << 8); pu 27 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) pu 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c pu &= 0x0f; pu 39 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0) pu 40 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c data[2] = (data[2] & ~0x00000f00) | (pu << 8); pu 47 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu, pu 53 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift; pu 158 drivers/lightnvm/pblk-core.c int lun_off = ppa.m.pu * geo->num_chk; pu 60 drivers/lightnvm/pblk-trace.h (u64)(((struct ppa_addr *)(&__entry->ppa))->m.pu), pu 86 drivers/lightnvm/pblk-trace.h (u64)(((struct ppa_addr *)(&__entry->ppa))->m.pu), pu 1008 drivers/lightnvm/pblk.h ppa.m.pu = luns; pu 1056 drivers/lightnvm/pblk.h paddr += (u64)p.m.pu * uaddrf->sec_lun_stripe; pu 1208 drivers/lightnvm/pblk.h p->m.grp, p->m.pu, p->m.chk, p->m.sec); pu 1252 drivers/lightnvm/pblk.h ppa->m.pu < geo->num_lun && pu 584 drivers/nvme/host/lightnvm.c log_pos += ppa.m.pu * geo->num_chk; pu 484 drivers/of/property.c u32 *pu) pu 501 drivers/of/property.c *pu = be32_to_cpup(curv); pu 170 drivers/pinctrl/bcm/pinctrl-ns2-mux.c #define NS2_PIN_DESC(p, n, b, o, s, i, pu, d) \ pu 179 drivers/pinctrl/bcm/pinctrl-ns2-mux.c .pull_shift = pu, \ pu 1724 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c u32 ie, oe, pu, pd; pu 1731 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c pu = ioread32(bank->base + NPCM7XX_GP_N_PU) & pinmask; pu 1734 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c rc = (!pu && !pd); pu 1736 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c rc = (pu && !pd); pu 1738 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c rc = (!pu && pd); pu 229 drivers/pinctrl/pinctrl-st.c struct regmap_field *alt, *oe, *pu, *od; pu 244 drivers/pinctrl/pinctrl-st.c const int alt, oe, pu, od, rt; pu 346 drivers/pinctrl/pinctrl-st.c .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, pu 357 drivers/pinctrl/pinctrl-st.c .pu = -1, /* Not Available */ pu 387 drivers/pinctrl/pinctrl-st.c struct regmap_field *pull_up = pc->pu; pu 585 drivers/pinctrl/pinctrl-st.c if (pc->pu) { pu 586 drivers/pinctrl/pinctrl-st.c regmap_field_read(pc->pu, &pu_value); pu 1148 drivers/pinctrl/pinctrl-st.c pc->pu = st_pc_get_value(dev, regmap, bank/4, data->pu, lsb, msb); pu 170 drivers/regulator/max77620-regulator.c int pu = rpdata->active_fps_pu_slot; pu 178 drivers/regulator/max77620-regulator.c pu = rpdata->suspend_fps_pu_slot; pu 183 drivers/regulator/max77620-regulator.c if (pu >= 0) { pu 184 drivers/regulator/max77620-regulator.c val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT); pu 55 fs/nls/nls_base.c int utf8_to_utf32(const u8 *s, int inlen, unicode_t *pu) pu 71 fs/nls/nls_base.c *pu = (unicode_t) l; pu 65 include/linux/lightnvm.h u64 pu : NVM_GEN_LUN_BITS; pu 459 include/linux/lightnvm.h l.ppa |= ((u64)r.m.pu) << lbaf->lun_offset; pu 488 include/linux/lightnvm.h l.m.pu = (r.ppa & lbaf->lun_mask) >> lbaf->lun_offset; pu 550 include/linux/lightnvm.h ppa64.m.pu = (ppa32 & lbaf->lun_mask) >> pu 588 include/linux/lightnvm.h ppa32 |= ppa64.m.pu << lbaf->lun_offset; pu 55 include/linux/nls.h extern int utf8_to_utf32(const u8 *s, int len, unicode_t *pu); pu 541 include/linux/of.h u32 *pu); pu 925 include/linux/of.h const __be32 *cur, u32 *pu)