set_mask 267 arch/arm/mach-omap2/common.h extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); set_mask 13 arch/arm/mm/pageattr.c pgprot_t set_mask; set_mask 23 arch/arm/mm/pageattr.c pte = set_pte_bit(pte, cdata->set_mask); set_mask 37 arch/arm/mm/pageattr.c pgprot_t set_mask, pgprot_t clear_mask) set_mask 54 arch/arm/mm/pageattr.c data.set_mask = set_mask; set_mask 16 arch/arm64/mm/pageattr.c pgprot_t set_mask; set_mask 28 arch/arm64/mm/pageattr.c pte = set_pte_bit(pte, cdata->set_mask); set_mask 38 arch/arm64/mm/pageattr.c pgprot_t set_mask, pgprot_t clear_mask) set_mask 43 arch/arm64/mm/pageattr.c data.set_mask = set_mask; set_mask 54 arch/arm64/mm/pageattr.c pgprot_t set_mask, pgprot_t clear_mask) set_mask 94 arch/arm64/mm/pageattr.c if (rodata_full && (pgprot_val(set_mask) == PTE_RDONLY || set_mask 98 arch/arm64/mm/pageattr.c PAGE_SIZE, set_mask, clear_mask); set_mask 108 arch/arm64/mm/pageattr.c return __change_memory_common(start, size, set_mask, clear_mask); set_mask 154 arch/arm64/mm/pageattr.c .set_mask = __pgprot(0), set_mask 169 arch/arm64/mm/pageattr.c .set_mask = __pgprot(PTE_VALID | PTE_WRITE), set_mask 151 drivers/gpio/gpio-mmio.c unsigned long set_mask = 0; set_mask 156 drivers/gpio/gpio-mmio.c set_mask = *mask & gc->bgpio_dir; set_mask 159 drivers/gpio/gpio-mmio.c if (set_mask) set_mask 160 drivers/gpio/gpio-mmio.c *bits |= gc->read_reg(gc->reg_set) & set_mask; set_mask 267 drivers/gpio/gpio-mmio.c unsigned long *set_mask, set_mask 272 drivers/gpio/gpio-mmio.c *set_mask = 0; set_mask 280 drivers/gpio/gpio-mmio.c *set_mask |= bgpio_line2mask(gc, i); set_mask 293 drivers/gpio/gpio-mmio.c unsigned long set_mask, clear_mask; set_mask 297 drivers/gpio/gpio-mmio.c bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); set_mask 299 drivers/gpio/gpio-mmio.c gc->bgpio_data |= set_mask; set_mask 323 drivers/gpio/gpio-mmio.c unsigned long set_mask, clear_mask; set_mask 325 drivers/gpio/gpio-mmio.c bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); set_mask 327 drivers/gpio/gpio-mmio.c if (set_mask) set_mask 328 drivers/gpio/gpio-mmio.c gc->write_reg(gc->reg_set, set_mask); set_mask 3606 drivers/gpio/gpiolib.c gpio_chip_set_multiple(array_info->chip, array_info->set_mask, set_mask 3609 drivers/gpio/gpiolib.c if (bitmap_full(array_info->set_mask, array_size)) set_mask 3612 drivers/gpio/gpiolib.c i = find_first_zero_bit(array_info->set_mask, array_size); set_mask 3673 drivers/gpio/gpiolib.c i = find_next_zero_bit(array_info->set_mask, set_mask 4820 drivers/gpio/gpiolib.c array_info->set_mask = array_info->get_mask + set_mask 4828 drivers/gpio/gpiolib.c bitmap_set(array_info->set_mask, descs->ndescs, set_mask 4835 drivers/gpio/gpiolib.c __clear_bit(descs->ndescs, array_info->set_mask); set_mask 4854 drivers/gpio/gpiolib.c array_info->set_mask); set_mask 4861 drivers/gpio/gpiolib.c array_info->set_mask); set_mask 4874 drivers/gpio/gpiolib.c *array_info->get_mask, *array_info->set_mask, set_mask 77 drivers/gpio/gpiolib.h unsigned long *set_mask; set_mask 79 drivers/hwmon/lm75.c u8 set_mask; set_mask 130 drivers/hwmon/lm75.c .set_mask = 2 << 5, /* 11-bit mode */ set_mask 139 drivers/hwmon/lm75.c .set_mask = 2 << 5, /* 11-bit mode */ set_mask 148 drivers/hwmon/lm75.c .set_mask = 2 << 5, /* 11-bit mode */ set_mask 160 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode*/ set_mask 210 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 220 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 229 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 238 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 247 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 8 samples / second */ set_mask 255 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 264 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 273 drivers/hwmon/lm75.c .set_mask = 3 << 5, /* 12-bit mode */ set_mask 302 drivers/hwmon/lm75.c static int lm75_write_config(struct lm75_data *data, u8 set_mask, set_mask 309 drivers/hwmon/lm75.c value |= set_mask; set_mask 593 drivers/hwmon/lm75.c err = lm75_write_config(data, data->params->set_mask, set_mask 2588 drivers/infiniband/hw/mlx5/main.c static int check_mpls_supp_fields(u32 field_support, const __be32 *set_mask) set_mask 2590 drivers/infiniband/hw/mlx5/main.c if (MLX5_GET(fte_match_mpls, set_mask, mpls_label) && set_mask 2594 drivers/infiniband/hw/mlx5/main.c if (MLX5_GET(fte_match_mpls, set_mask, mpls_exp) && set_mask 2598 drivers/infiniband/hw/mlx5/main.c if (MLX5_GET(fte_match_mpls, set_mask, mpls_s_bos) && set_mask 2602 drivers/infiniband/hw/mlx5/main.c if (MLX5_GET(fte_match_mpls, set_mask, mpls_ttl) && set_mask 91 drivers/infiniband/hw/mlx5/qp.c u32 set_mask; /* raw_qp_set_mask_map */ set_mask 3169 drivers/infiniband/hw/mlx5/qp.c if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { set_mask 3216 drivers/infiniband/hw/mlx5/qp.c if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { set_mask 3295 drivers/infiniband/hw/mlx5/qp.c if (raw_qp_param->set_mask == set_mask 3300 drivers/infiniband/hw/mlx5/qp.c return raw_qp_param->set_mask ? -EINVAL : 0; set_mask 3305 drivers/infiniband/hw/mlx5/qp.c if (raw_qp_param->set_mask) set_mask 3656 drivers/infiniband/hw/mlx5/qp.c raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; set_mask 3687 drivers/infiniband/hw/mlx5/qp.c raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; set_mask 94 drivers/mfd/ssbi.c static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) set_mask 101 drivers/mfd/ssbi.c if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0)) set_mask 73 drivers/net/ethernet/ibm/ibmveth.h unsigned long reset_mask, unsigned long set_mask, set_mask 80 drivers/net/ethernet/ibm/ibmveth.h reset_mask, set_mask); set_mask 2865 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h __le32 set_mask; set_mask 200 drivers/net/ethernet/microchip/encx24j600-regmap.c unsigned int set_mask = mask & val; set_mask 206 drivers/net/ethernet/microchip/encx24j600-regmap.c if (set_mask & 0xff) set_mask 207 drivers/net/ethernet/microchip/encx24j600-regmap.c ret = regmap_encx24j600_sfr_set_bits(ctx, reg, set_mask); set_mask 209 drivers/net/ethernet/microchip/encx24j600-regmap.c set_mask = (set_mask & 0xff00) >> 8; set_mask 211 drivers/net/ethernet/microchip/encx24j600-regmap.c if ((set_mask & 0xff) && (ret == 0)) set_mask 212 drivers/net/ethernet/microchip/encx24j600-regmap.c ret = regmap_encx24j600_sfr_set_bits(ctx, reg + 1, set_mask); set_mask 214 drivers/net/phy/bcm7xxx.c int set_mask, int clr_mask) set_mask 223 drivers/net/phy/bcm7xxx.c v |= set_mask; set_mask 1459 drivers/pinctrl/pinctrl-at91.c uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio); set_mask 1462 drivers/pinctrl/pinctrl-at91.c writel_relaxed(set_mask, pio + PIO_SODR); set_mask 595 drivers/s390/scsi/zfcp_erp.c void zfcp_erp_notify(struct zfcp_erp_action *erp_action, unsigned long set_mask) set_mask 602 drivers/s390/scsi/zfcp_erp.c erp_action->status |= set_mask; set_mask 5282 fs/btrfs/ioctl.c u64 set_mask = flags & change_mask; set_mask 5285 fs/btrfs/ioctl.c unsupported = set_mask & ~supported_flags; set_mask 5300 fs/btrfs/ioctl.c disallowed = set_mask & ~safe_set; set_mask 292 net/iucv/iucv.c struct iucv_cmd_set_mask set_mask; set_mask 398 net/iucv/iucv.c parm->set_mask.ipmask = 0xf8; set_mask 411 net/iucv/iucv.c parm->set_mask.ipmask = 0xf8; set_mask 451 net/iucv/iucv.c parm->set_mask.ipmask = 0x08; set_mask 455 net/iucv/iucv.c parm->set_mask.ipmask = 0x20; set_mask 2541 sound/pci/ice1712/ice1712.c ice->gpio.set_mask = snd_ice1712_set_gpio_mask; set_mask 354 sound/pci/ice1712/ice1712.h void (*set_mask)(struct snd_ice1712 *ice, unsigned int data); set_mask 407 sound/pci/ice1712/ice1712.h ice->gpio.set_mask(ice, bits); set_mask 435 sound/pci/ice1712/ice1712.h ice->gpio.set_mask(ice, ice->gpio.saved[1]); set_mask 2541 sound/pci/ice1712/ice1724.c ice->gpio.set_mask = snd_vt1724_set_gpio_mask; set_mask 272 sound/pci/ice1712/quartet.c ice->gpio.set_mask(ice, ~GPIO_SPI_ALL); set_mask 314 sound/pci/ice1712/quartet.c ice->gpio.set_mask(ice, 0xffffff); set_mask 405 sound/pci/ice1712/quartet.c ice->gpio.set_mask(ice, ~(tmp)); set_mask 429 sound/pci/ice1712/quartet.c ice->gpio.set_mask(ice, 0xffffff); set_mask 358 sound/soc/bcm/cygnus-pcm.c u32 set_mask; set_mask 365 sound/soc/bcm/cygnus-pcm.c set_mask = BIT(aio->portnum); set_mask 369 sound/soc/bcm/cygnus-pcm.c writel(set_mask, aio->cygaud->audio + ESR0_MASK_SET_OFFSET); set_mask 370 sound/soc/bcm/cygnus-pcm.c writel(set_mask, aio->cygaud->audio + ESR1_MASK_SET_OFFSET); set_mask 371 sound/soc/bcm/cygnus-pcm.c writel(set_mask, aio->cygaud->audio + ESR3_MASK_SET_OFFSET); set_mask 373 sound/soc/bcm/cygnus-pcm.c writel(set_mask, aio->cygaud->audio + ESR2_MASK_SET_OFFSET); set_mask 374 sound/soc/bcm/cygnus-pcm.c writel(set_mask, aio->cygaud->audio + ESR4_MASK_SET_OFFSET);