u_off 283 drivers/gpu/ipu-v3/ipu-cpmem.c void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off) u_off 285 drivers/gpu/ipu-v3/ipu-cpmem.c WARN_ON_ONCE((u_off & 0x7) || (v_off & 0x7)); u_off 287 drivers/gpu/ipu-v3/ipu-cpmem.c ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8); u_off 106 drivers/gpu/ipu-v3/ipu-image-convert.c u32 u_off; u_off 977 drivers/gpu/ipu-v3/ipu-image-convert.c u32 uv_row_off, uv_col_off, uv_off, u_off, v_off, tmp; u_off 1006 drivers/gpu/ipu-v3/ipu-image-convert.c u_off = y_size - y_off + uv_off; u_off 1007 drivers/gpu/ipu-v3/ipu-image-convert.c v_off = (fmt->uv_packed) ? 0 : u_off + uv_size; u_off 1009 drivers/gpu/ipu-v3/ipu-image-convert.c tmp = u_off; u_off 1010 drivers/gpu/ipu-v3/ipu-image-convert.c u_off = v_off; u_off 1015 drivers/gpu/ipu-v3/ipu-image-convert.c image->tile[tile].u_off = u_off; u_off 1018 drivers/gpu/ipu-v3/ipu-image-convert.c if ((y_off & 0x7) || (u_off & 0x7) || (v_off & 0x7)) { u_off 1025 drivers/gpu/ipu-v3/ipu-image-convert.c y_off, u_off, v_off); u_off 1057 drivers/gpu/ipu-v3/ipu-image-convert.c image->tile[tile].u_off = 0; u_off 1327 drivers/gpu/ipu-v3/ipu-image-convert.c tile_image.u_offset = image->tile[tile_idx[0]].u_off; u_off 1676 drivers/gpu/ipu-v3/ipu-image-convert.c src_tile->u_off, u_off 1680 drivers/gpu/ipu-v3/ipu-image-convert.c dst_tile->u_off, u_off 21 drivers/media/platform/rockchip/rga/rga-hw.c unsigned int u_off; u_off 66 drivers/media/platform/rockchip/rga/rga-hw.c lt->u_off = u_off 68 drivers/media/platform/rockchip/rga/rga-hw.c lt->v_off = lt->u_off + frm->width * frm->height / uv_factor; u_off 71 drivers/media/platform/rockchip/rga/rga-hw.c lb->u_off = lt->u_off + (h / y_div - 1) * uv_stride; u_off 75 drivers/media/platform/rockchip/rga/rga-hw.c rt->u_off = lt->u_off + w / x_div - 1; u_off 79 drivers/media/platform/rockchip/rga/rga-hw.c rb->u_off = lb->u_off + w / x_div - 1; u_off 328 drivers/media/platform/rockchip/rga/rga-hw.c src_offsets.left_top.u_off; u_off 342 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset->u_off; u_off 260 include/video/imx-ipu-v3.h void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off);