_base 29 arch/arm/mach-ep93xx/dma.c #define DMA_CHANNEL(_name, _base, _irq) \ _base 30 arch/arm/mach-ep93xx/dma.c { .name = (_name), .base = (_base), .irq = (_irq) } _base 51 arch/mips/alchemy/common/platform.c #define PORT(_base, _irq) \ _base 53 arch/mips/alchemy/common/platform.c .mapbase = _base, \ _base 282 arch/mips/alchemy/common/platform.c #define MAC_RES(_base, _enable, _irq, _macdma) \ _base 284 arch/mips/alchemy/common/platform.c .start = _base, \ _base 285 arch/mips/alchemy/common/platform.c .end = _base + 0xffff, \ _base 19 arch/mips/include/asm/mips-cps.h return mips_##unit##_base + (off); \ _base 98 arch/mips/jazz/setup.c #define MEMPORT(_base, _irq) \ _base 100 arch/mips/jazz/setup.c .mapbase = (_base), \ _base 101 arch/mips/jazz/setup.c .membase = (void *)(_base), \ _base 20 arch/mips/sni/a20r.c #define PORT(_base,_irq) \ _base 22 arch/mips/sni/a20r.c .iobase = _base, \ _base 70 arch/mips/sni/pcimt.c #define PORT(_base,_irq) \ _base 72 arch/mips/sni/pcimt.c .iobase = _base, \ _base 22 arch/mips/sni/pcit.c #define PORT(_base,_irq) \ _base 24 arch/mips/sni/pcit.c .iobase = _base, \ _base 27 arch/mips/sni/rm200.c #define MEMPORT(_base,_irq) \ _base 29 arch/mips/sni/rm200.c .mapbase = _base, \ _base 392 arch/powerpc/platforms/512x/mpc512x_shared.c #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ _base 393 arch/powerpc/platforms/512x/mpc512x_shared.c ((u32)(_base) + sizeof(struct mpc52xx_psc))) _base 93 arch/xtensa/platforms/xt2000/setup.c #define _SERIAL_PORT(_base,_irq) \ _base 95 arch/xtensa/platforms/xt2000/setup.c .mapbase = (_base), \ _base 96 arch/xtensa/platforms/xt2000/setup.c .membase = (void*)(_base), \ _base 285 drivers/gpio/gpio-ep93xx.c #define EP93XX_GPIO_BANK(_label, _data, _dir, _base, _has_irq, _has_hier, _irq_base) \ _base 290 drivers/gpio/gpio-ep93xx.c .base = _base, \ _base 138 drivers/gpio/gpio-f7188x.c #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ _base 149 drivers/gpio/gpio-f7188x.c .base = _base, \ _base 123 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ _base 124 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h { .name = #_id, .statetype = _type, .base = _base, \ _base 172 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h #define HLSQ_DBG_REGS(_base, _type, _array) \ _base 173 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h { .val0 = _base, .val1 = _type, .registers = _array, \ _base 175 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define SSPP_BLK(_name, _id, _base, _features, \ _base 179 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .base = _base, .len = 0x1c8, \ _base 218 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define LM_BLK(_name, _id, _base, _pp, _lmpair) \ _base 221 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .base = _base, .len = 0x320, \ _base 252 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define PP_BLK_TE(_name, _id, _base) \ _base 255 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .base = _base, .len = 0xd4, \ _base 259 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define PP_BLK(_name, _id, _base) \ _base 262 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .base = _base, .len = 0xd4, \ _base 277 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define INTF_BLK(_name, _id, _base, _type, _ctrl_id) \ _base 280 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .base = _base, .len = 0x280, \ _base 129 drivers/net/ethernet/intel/igc/igc_base.c struct igc_dev_spec_base *dev_spec = &hw->dev_spec._base; _base 207 drivers/net/ethernet/intel/igc/igc_hw.h struct igc_dev_spec_base _base; _base 60 drivers/net/ethernet/intel/igc/igc_i225.c if (hw->dev_spec._base.clear_semaphore_once) { _base 61 drivers/net/ethernet/intel/igc/igc_i225.c hw->dev_spec._base.clear_semaphore_once = false; _base 1837 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_LED_OFFSET(_base, _i) (_base << (8 * (_i))) _base 2191 drivers/net/wireless/ralink/rt2x00/rt2800.h #define BEACON_BASE_TO_OFFSET(_base) (((_base) - 0x4000) / 64) _base 113 drivers/scsi/aic94xx/aic94xx_reg.c u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\ _base 122 drivers/scsi/aic94xx/aic94xx_reg.c u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\ _base 99 drivers/tty/serial/8250/8250.h #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ _base 101 drivers/tty/serial/8250/8250.h .iobase = _base, \ _base 108 drivers/tty/serial/8250/8250.h #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) _base 12 drivers/tty/serial/8250/8250_fourport.c #define SERIAL8250_FOURPORT(_base, _irq) \ _base 13 drivers/tty/serial/8250/8250_fourport.c SERIAL8250_PORT_FLAGS(_base, _irq, UPF_FOURPORT) _base 189 include/linux/vt_kern.h unsigned int rolled_over, void *_base, unsigned int size); _base 137 mm/vmscan.c #define prefetch_prev_lru_page(_page, _base, _field) \ _base 139 mm/vmscan.c if ((_page)->lru.prev != _base) { \ _base 147 mm/vmscan.c #define prefetch_prev_lru_page(_page, _base, _field) do { } while (0) _base 151 mm/vmscan.c #define prefetchw_prev_lru_page(_page, _base, _field) \ _base 153 mm/vmscan.c if ((_page)->lru.prev != _base) { \ _base 161 mm/vmscan.c #define prefetchw_prev_lru_page(_page, _base, _field) do { } while (0)