_val 89 arch/arm64/include/asm/arch_timer.h u64 _val; \ _val 92 arch/arm64/include/asm/arch_timer.h _val = erratum_handler(read_ ## reg)(); \ _val 95 arch/arm64/include/asm/arch_timer.h _val; \ _val 177 arch/arm64/include/asm/arch_timer.h u64 tmp, _val = (val); \ _val 183 arch/arm64/include/asm/arch_timer.h : "=r" (tmp) : "r" (_val)); \ _val 7 arch/mips/ath25/devices.h #define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S) _val 131 arch/mips/include/asm/mips-gic.h uint64_t _val; \ _val 134 arch/mips/include/asm/mips-gic.h _val = __raw_readq(addr); \ _val 135 arch/mips/include/asm/mips-gic.h _val &= ~BIT_ULL(intr % 64); \ _val 136 arch/mips/include/asm/mips-gic.h _val |= (uint64_t)val << (intr % 64); \ _val 137 arch/mips/include/asm/mips-gic.h __raw_writeq(_val, addr); \ _val 139 arch/mips/include/asm/mips-gic.h uint32_t _val; \ _val 142 arch/mips/include/asm/mips-gic.h _val = __raw_readl(addr); \ _val 143 arch/mips/include/asm/mips-gic.h _val &= ~BIT(intr % 32); \ _val 144 arch/mips/include/asm/mips-gic.h _val |= val << (intr % 32); \ _val 145 arch/mips/include/asm/mips-gic.h __raw_writel(_val, addr); \ _val 208 arch/mips/include/asm/sn/addrs.h #define BDPRT_ENTRY_S(_pa, _rgn, _val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa), (_rgn))=(_val)) _val 33 arch/mips/include/asm/sn/agent.h #define SET_HUB_NIC(_my_cpuid, _val) \ _val 34 arch/mips/include/asm/sn/agent.h (HUB_S(HUB_NIC_ADDR(_my_cpuid), (_val))) _val 437 arch/mips/include/asm/sn/sn0/hubmd.h #define SET_CPU_LEDS(_nasid, _slice, _val) \ _val 438 arch/mips/include/asm/sn/sn0/hubmd.h (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val))) _val 265 arch/mips/pci/pci-alchemy.c u8 _val; _val 266 arch/mips/pci/pci-alchemy.c int rc = read_config_byte(bus, devfn, where, &_val); _val 268 arch/mips/pci/pci-alchemy.c *val = _val; _val 272 arch/mips/pci/pci-alchemy.c u16 _val; _val 273 arch/mips/pci/pci-alchemy.c int rc = read_config_word(bus, devfn, where, &_val); _val 275 arch/mips/pci/pci-alchemy.c *val = _val; _val 16 arch/openrisc/include/asm/spr.h #define mtspr(_spr, _val) __asm__ __volatile__ ( \ _val 18 arch/openrisc/include/asm/spr.h : : "K" (_spr), "r" (_val)) _val 19 arch/openrisc/include/asm/spr.h #define mtspr_off(_spr, _off, _val) __asm__ __volatile__ ( \ _val 21 arch/openrisc/include/asm/spr.h : : "r" (_off), "r" (_val), "K" (_spr)) _val 53 arch/x86/include/asm/rmwcc.h #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \ _val 55 arch/x86/include/asm/rmwcc.h __CLOBBERS_MEM(), [val] vcon (_val)) _val 66 arch/x86/include/asm/rmwcc.h #define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, cc, vcon, _val, clobbers...)\ _val 68 arch/x86/include/asm/rmwcc.h __CLOBBERS_MEM(clobbers), [val] vcon (_val)) _val 2509 arch/x86/kernel/cpu/resctrl/rdtgroup.c static u32 cbm_ensure_valid(u32 _val, struct rdt_resource *r) _val 2513 arch/x86/kernel/cpu/resctrl/rdtgroup.c unsigned long val = _val; _val 92 drivers/clk/at91/pmc.h #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) _val 33 drivers/clk/meson/vid-pll-div.c #define VID_PLL_DIV(_val, _sel, _ft, _fb) \ _val 35 drivers/clk/meson/vid-pll-div.c .shift_val = (_val), \ _val 345 drivers/clocksource/arm_arch_timer.c u64 _val; \ _val 349 drivers/clocksource/arm_arch_timer.c _val = read_sysreg(reg); \ _val 351 drivers/clocksource/arm_arch_timer.c } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \ _val 354 drivers/clocksource/arm_arch_timer.c _val; \ _val 174 drivers/firmware/broadcom/bcm47xx_sprom.c #define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \ _val 176 drivers/firmware/broadcom/bcm47xx_sprom.c nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \ _val 37 drivers/gpu/drm/gma500/framebuffer.c #define CMAP_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16) _val 888 drivers/gpu/drm/gma500/psb_drv.h #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) _val 905 drivers/gpu/drm/gma500/psb_drv.h #define PSB_WSGX32(_val, _offs) iowrite32(_val, dev_priv->sgx_reg + (_offs)) _val 909 drivers/gpu/drm/gma500/psb_drv.h #define PSB_WMSVDX32(_val, _offs) iowrite32(_val, dev_priv->msvdx_reg + (_offs)) _val 179 drivers/i2c/busses/i2c-brcmstb.c #define __bsc_writel(_val, _reg) iowrite32be(_val, _reg) _val 182 drivers/i2c/busses/i2c-brcmstb.c #define __bsc_writel(_val, _reg) iowrite32(_val, _reg) _val 188 drivers/i2c/busses/i2c-brcmstb.c #define bsc_writel(_dev, _val, _reg) \ _val 189 drivers/i2c/busses/i2c-brcmstb.c __bsc_writel(_val, _dev->base + offsetof(struct bsc_regs, _reg)) _val 157 drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h #define PVRDMA_GET_CAP(_dev, _old_val, _val) \ _val 158 drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h ((PVRDMA_IS_VERSION18(_dev)) ? _val : _old_val) _val 214 drivers/media/dvb-frontends/stv0910.c #define SET_FIELD(_reg, _val) \ _val 216 drivers/media/dvb-frontends/stv0910.c FSTV0910_P1_##_reg, _val) _val 218 drivers/media/dvb-frontends/stv0910.c #define SET_REG(_reg, _val) \ _val 220 drivers/media/dvb-frontends/stv0910.c RSTV0910_P1_##_reg, _val) _val 222 drivers/media/dvb-frontends/stv0910.c #define GET_REG(_reg, _val) \ _val 224 drivers/media/dvb-frontends/stv0910.c RSTV0910_P1_##_reg, _val) _val 203 drivers/media/i2c/ov9640.c u8 _val; _val 219 drivers/media/i2c/ov9640.c ret = ov9640_reg_read(client, reg, &_val); _val 61 drivers/media/i2c/smiapp/smiapp-quirk.h #define SMIAPP_MK_QUIRK_REG_8(_reg, _val) \ _val 64 drivers/media/i2c/smiapp/smiapp-quirk.h .val = _val, \ _val 13 drivers/media/platform/s3c-camif/camif-regs.c #define camif_write(_camif, _off, _val) writel(_val, (_camif)->io_base + (_off)) _val 179 drivers/media/tuners/mc44s803_priv.h #define MC44S803_REG_SM(_val, _reg) \ _val 180 drivers/media/tuners/mc44s803_priv.h (((_val) << _reg##_S) & (_reg)) _val 183 drivers/media/tuners/mc44s803_priv.h #define MC44S803_REG_MS(_val, _reg) \ _val 184 drivers/media/tuners/mc44s803_priv.h (((_val) & (_reg)) >> _reg##_S) _val 147 drivers/media/tuners/tuner-xc2028.c static u8 _val[] = data; \ _val 149 drivers/media/tuners/tuner-xc2028.c if (sizeof(_val) != \ _val 151 drivers/media/tuners/tuner-xc2028.c _val, sizeof(_val)))) { \ _val 349 drivers/media/usb/pvrusb2/pvrusb2-hdw-internal.h #define VCREATE_DATA(lab) int lab##_val; int lab##_dirty _val 963 drivers/media/usb/pvrusb2/pvrusb2-hdw.c {*vp = cptr->hdw->vname##_val; return 0;} \ _val 965 drivers/media/usb/pvrusb2/pvrusb2-hdw.c {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \ _val 2820 drivers/media/usb/pvrusb2/pvrusb2-hdw.c pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \ _val 1389 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define SET_BITS(_var, _index, _width, _val) \ _val 1392 drivers/net/ethernet/amd/xgbe/xgbe-common.h (_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index)); \ _val 1398 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define SET_BITS_LE(_var, _index, _width, _val) \ _val 1401 drivers/net/ethernet/amd/xgbe/xgbe-common.h (_var) |= cpu_to_le32((((_val) & \ _val 1418 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_SET_BITS(_var, _prefix, _field, _val) \ _val 1421 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1428 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_SET_BITS_LE(_var, _prefix, _field, _val) \ _val 1431 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1448 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_IOWRITE(_pdata, _reg, _val) \ _val 1449 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32((_val), (_pdata)->xgmac_regs + _reg) _val 1451 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1456 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1473 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val) \ _val 1474 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32((_val), (_pdata)->xgmac_regs + \ _val 1477 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \ _val 1482 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1498 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_DMA_IOWRITE(_channel, _reg, _val) \ _val 1499 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32((_val), (_channel)->dma_regs + _reg) _val 1501 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XGMAC_DMA_IOWRITE_BITS(_channel, _reg, _field, _val) \ _val 1506 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1518 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XPCS_SET_BITS(_var, _prefix, _field, _val) \ _val 1521 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1523 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XPCS32_IOWRITE(_pdata, _off, _val) \ _val 1524 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32(_val, (_pdata)->xpcs_regs + (_off)) _val 1529 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XPCS16_IOWRITE(_pdata, _off, _val) \ _val 1530 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite16(_val, (_pdata)->xpcs_regs + (_off)) _val 1543 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XSIR_SET_BITS(_var, _prefix, _field, _val) \ _val 1546 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1556 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XSIR0_IOWRITE(_pdata, _reg, _val) \ _val 1557 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite16((_val), (_pdata)->sir0_regs + _reg) _val 1559 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XSIR0_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1564 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1576 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XSIR1_IOWRITE(_pdata, _reg, _val) \ _val 1577 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite16((_val), (_pdata)->sir1_regs + _reg) _val 1579 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XSIR1_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1584 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1599 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XRXTX_IOWRITE(_pdata, _reg, _val) \ _val 1600 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite16((_val), (_pdata)->rxtx_regs + _reg) _val 1602 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XRXTX_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1607 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1619 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XP_SET_BITS(_var, _prefix, _field, _val) \ _val 1622 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1632 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XP_IOWRITE(_pdata, _reg, _val) \ _val 1633 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32((_val), (_pdata)->xprop_regs + (_reg)) _val 1635 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XP_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1640 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1652 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XI2C_SET_BITS(_var, _prefix, _field, _val) \ _val 1655 drivers/net/ethernet/amd/xgbe/xgbe-common.h _prefix##_##_field##_WIDTH, (_val)) _val 1665 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XI2C_IOWRITE(_pdata, _reg, _val) \ _val 1666 drivers/net/ethernet/amd/xgbe/xgbe-common.h iowrite32((_val), (_pdata)->xi2c_regs + (_reg)) _val 1668 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XI2C_IOWRITE_BITS(_pdata, _reg, _field, _val) \ _val 1673 drivers/net/ethernet/amd/xgbe/xgbe-common.h _reg##_##_field##_WIDTH, (_val)); \ _val 1689 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XMDIO_WRITE(_pdata, _mmd, _reg, _val) \ _val 1691 drivers/net/ethernet/amd/xgbe/xgbe-common.h MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff), (_val))) _val 1693 drivers/net/ethernet/amd/xgbe/xgbe-common.h #define XMDIO_WRITE_BITS(_pdata, _mmd, _reg, _mask, _val) \ _val 1697 drivers/net/ethernet/amd/xgbe/xgbe-common.h mmd_val |= (_val); \ _val 203 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c #define CL22_WR_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ _val 207 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c _val) _val 209 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c #define CL22_RD_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ _val 213 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c _val) _val 7640 drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h #define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80) _val 102 drivers/net/ethernet/freescale/fman/fman_memac.c #define GET_TX_EMPTY_DEFAULT_VALUE(_val) \ _val 104 drivers/net/ethernet/freescale/fman/fman_memac.c _val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \ _val 105 drivers/net/ethernet/freescale/fman/fman_memac.c ((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \ _val 106 drivers/net/ethernet/freescale/fman/fman_memac.c (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G) :\ _val 107 drivers/net/ethernet/freescale/fman/fman_memac.c (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G));\ _val 56 drivers/net/ethernet/qlogic/qed/qed_mcp.c #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ _val 58 drivers/net/ethernet/qlogic/qed/qed_mcp.c _val) _val 63 drivers/net/ethernet/qlogic/qed/qed_mcp.c #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ _val 65 drivers/net/ethernet/qlogic/qed/qed_mcp.c offsetof(struct public_drv_mb, _field), _val) _val 117 drivers/net/ethernet/synopsys/dwc-xlgmac.h typeof(val) _val = (val); \ _val 118 drivers/net/ethernet/synopsys/dwc-xlgmac.h _val = (_val << _pos) & GENMASK(_pos + _len - 1, _pos); \ _val 119 drivers/net/ethernet/synopsys/dwc-xlgmac.h _var = (_var & ~GENMASK(_pos + _len - 1, _pos)) | _val; \ _val 126 drivers/net/ethernet/synopsys/dwc-xlgmac.h typeof(val) _val = (val); \ _val 127 drivers/net/ethernet/synopsys/dwc-xlgmac.h _val = (_val << _pos) & GENMASK(_pos + _len - 1, _pos); \ _val 128 drivers/net/ethernet/synopsys/dwc-xlgmac.h _var = (_var & ~GENMASK(_pos + _len - 1, _pos)) | _val; \ _val 112 drivers/net/wireless/ath/ath5k/ath5k.h #define AR5K_REG_SM(_val, _flags) \ _val 113 drivers/net/wireless/ath/ath5k/ath5k.h (((_val) << _flags##_S) & (_flags)) _val 116 drivers/net/wireless/ath/ath5k/ath5k.h #define AR5K_REG_MS(_val, _flags) \ _val 117 drivers/net/wireless/ath/ath5k/ath5k.h (((_val) & (_flags)) >> _flags##_S) _val 124 drivers/net/wireless/ath/ath5k/ath5k.h #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ _val 126 drivers/net/wireless/ath/ath5k/ath5k.h (((_val) << _flags##_S) & (_flags)), _reg) _val 761 drivers/net/wireless/ath/ath9k/ath9k.h #define ATH_DUMP_BTCOEX(_s, _val) \ _val 764 drivers/net/wireless/ath/ath9k/ath9k.h "%20s : %10d\n", _s, (_val)); \ _val 24 drivers/net/wireless/ath/ath9k/debug.c #define REG_WRITE_D(_ah, _reg, _val) \ _val 25 drivers/net/wireless/ath/ath9k/debug.c ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg)) _val 79 drivers/net/wireless/ath/ath9k/hw.h #define REG_WRITE(_ah, _reg, _val) \ _val 80 drivers/net/wireless/ath/ath9k/hw.h (_ah)->reg_ops.write((_ah), (_val), (_reg)) _val 85 drivers/net/wireless/ath/ath9k/hw.h #define REG_READ_MULTI(_ah, _addr, _val, _cnt) \ _val 86 drivers/net/wireless/ath/ath9k/hw.h (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt)) _val 115 drivers/net/wireless/ath/ath9k/hw.h #define PR_EEP(_s, _val) \ _val 118 drivers/net/wireless/ath/ath9k/hw.h _s, (_val)); \ _val 24 drivers/net/wireless/ath/hw.c #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) _val 26 drivers/net/wireless/ath/key.c #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) _val 292 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_REV_DASH(_val) (((_val) & 0x0000003) >> 0) _val 293 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_REV_STEP(_val) (((_val) & 0x000000C) >> 2) _val 294 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_REV_TYPE(_val) (((_val) & 0x000FFF0) >> 4) _val 297 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RFID_FLAVOR(_val) (((_val) & 0x000000F) >> 0) _val 298 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RFID_DASH(_val) (((_val) & 0x00000F0) >> 4) _val 299 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RFID_STEP(_val) (((_val) & 0x0000F00) >> 8) _val 300 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RFID_TYPE(_val) (((_val) & 0x0FFF000) >> 12) _val 348 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RF_ID_TYPE_CHIP_ID(_val) (((_val) >> 12) & 0xFFF) _val 351 drivers/net/wireless/intel/iwlwifi/iwl-csr.h #define CSR_HW_RF_STEP(_val) (((_val) >> 8) & 0xF) _val 563 drivers/net/wireless/mediatek/mt76/mt76.h #define mt76_rmw_field(_dev, _reg, _field, _val) \ _val 564 drivers/net/wireless/mediatek/mt76/mt76.h mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) _val 566 drivers/net/wireless/mediatek/mt76/mt76.h #define __mt76_rmw_field(_dev, _reg, _field, _val) \ _val 567 drivers/net/wireless/mediatek/mt76/mt76.h __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) _val 297 drivers/net/wireless/mediatek/mt7601u/mt7601u.h #define mt76_rmw_field(_dev, _reg, _field, _val) \ _val 298 drivers/net/wireless/mediatek/mt7601u/mt7601u.h mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) _val 49 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_PS_POLL_AID(_hdr, _val) \ _val 50 drivers/net/wireless/realtek/rtlwifi/base.h (*(u16 *)((u8 *)(_hdr) + 2) = _val) _val 51 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_PS_POLL_BSSID(_hdr, _val) \ _val 52 drivers/net/wireless/realtek/rtlwifi/base.h ether_addr_copy(((u8 *)(_hdr)) + 4, (u8 *)(_val)) _val 53 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_PS_POLL_TA(_hdr, _val) \ _val 54 drivers/net/wireless/realtek/rtlwifi/base.h ether_addr_copy(((u8 *)(_hdr))+10, (u8 *)(_val)) _val 56 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_HDR_ADDRESS1(_hdr, _val) \ _val 57 drivers/net/wireless/realtek/rtlwifi/base.h CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8 *)(_val)) _val 58 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_HDR_ADDRESS2(_hdr, _val) \ _val 59 drivers/net/wireless/realtek/rtlwifi/base.h CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS2, (u8 *)(_val)) _val 60 drivers/net/wireless/realtek/rtlwifi/base.h #define SET_80211_HDR_ADDRESS3(_hdr, _val) \ _val 61 drivers/net/wireless/realtek/rtlwifi/base.h CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8 *)(_val)) _val 324 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h #define FW_CMD_IO_UPDATE(rtlpriv, _val) \ _val 325 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h rtlpriv->rtlhal.fwcmd_iomap = _val; _val 327 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h #define FW_CMD_IO_SET(rtlpriv, _val) \ _val 329 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val); \ _val 330 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h FW_CMD_IO_UPDATE(rtlpriv, _val); \ _val 333 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h #define FW_CMD_PARA_SET(rtlpriv, _val) \ _val 335 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val); \ _val 336 drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h rtlpriv->rtlhal.fwcmd_ioparam = _val; \ _val 2902 drivers/net/wireless/realtek/rtlwifi/wifi.h #define EF1BYTE(_val) \ _val 2903 drivers/net/wireless/realtek/rtlwifi/wifi.h ((u8)(_val)) _val 2904 drivers/net/wireless/realtek/rtlwifi/wifi.h #define EF2BYTE(_val) \ _val 2905 drivers/net/wireless/realtek/rtlwifi/wifi.h (le16_to_cpu(_val)) _val 2906 drivers/net/wireless/realtek/rtlwifi/wifi.h #define EF4BYTE(_val) \ _val 2907 drivers/net/wireless/realtek/rtlwifi/wifi.h (le32_to_cpu(_val)) _val 19 drivers/nvmem/mtk-efuse.c unsigned int reg, void *_val, size_t bytes) _val 22 drivers/nvmem/mtk-efuse.c u32 *val = _val; _val 32 drivers/nvmem/mtk-efuse.c unsigned int reg, void *_val, size_t bytes) _val 35 drivers/nvmem/mtk-efuse.c u32 *val = _val; _val 18 drivers/nvmem/qfprom.c unsigned int reg, void *_val, size_t bytes) _val 21 drivers/nvmem/qfprom.c u8 *val = _val; _val 20 drivers/nvmem/uniphier-efuse.c unsigned int reg, void *_val, size_t bytes) _val 23 drivers/nvmem/uniphier-efuse.c u8 *val = _val; _val 55 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define MTK_FUNCTION(_val, _name) \ _val 57 drivers/pinctrl/mediatek/pinctrl-mtk-common.h .muxval = _val, \ _val 37 drivers/pinctrl/mediatek/pinctrl-paris.h #define MTK_FUNCTION(_val, _name) \ _val 39 drivers/pinctrl/mediatek/pinctrl-paris.h .muxval = _val, \ _val 157 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ _val 159 drivers/pinctrl/mvebu/pinctrl-mvebu.h .val = _val, \ _val 167 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ _val 168 drivers/pinctrl/mvebu/pinctrl-mvebu.h _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) _val 170 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ _val 171 drivers/pinctrl/mvebu/pinctrl-mvebu.h _MPP_VAR_FUNCTION(_val, _name, NULL, _mask) _val 174 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define MPP_FUNCTION(_val, _name, _subname) \ _val 175 drivers/pinctrl/mvebu/pinctrl-mvebu.h MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1) _val 190 drivers/pinctrl/sunxi/pinctrl-sunxi.h #define SUNXI_FUNCTION(_val, _name) \ _val 193 drivers/pinctrl/sunxi/pinctrl-sunxi.h .muxval = _val, \ _val 196 drivers/pinctrl/sunxi/pinctrl-sunxi.h #define SUNXI_FUNCTION_VARIANT(_val, _name, _variant) \ _val 199 drivers/pinctrl/sunxi/pinctrl-sunxi.h .muxval = _val, \ _val 203 drivers/pinctrl/sunxi/pinctrl-sunxi.h #define SUNXI_FUNCTION_IRQ(_val, _irq) \ _val 206 drivers/pinctrl/sunxi/pinctrl-sunxi.h .muxval = _val, \ _val 210 drivers/pinctrl/sunxi/pinctrl-sunxi.h #define SUNXI_FUNCTION_IRQ_BANK(_val, _bank, _irq) \ _val 213 drivers/pinctrl/sunxi/pinctrl-sunxi.h .muxval = _val, \ _val 83 drivers/pinctrl/zte/pinctrl-zx.h #define TOP_MUX(_val, _name) { \ _val 85 drivers/pinctrl/zte/pinctrl-zx.h .muxval = _val, \ _val 94 drivers/pinctrl/zte/pinctrl-zx.h #define AON_MUX(_val, _name) { \ _val 96 drivers/pinctrl/zte/pinctrl-zx.h .muxval = _val | AON_MUX_FLAG, \ _val 64 drivers/power/supply/max77650-charger.c #define MAX77650_CHARGER_VCHGIN_MIN_SHIFT(_val) ((_val) << 5) _val 67 drivers/power/supply/max77650-charger.c #define MAX77650_CHARGER_ICHGIN_LIM_SHIFT(_val) ((_val) << 2) _val 688 drivers/rtc/rtc-omap.c static int omap_rtc_scratch_read(void *priv, unsigned int offset, void *_val, _val 692 drivers/rtc/rtc-omap.c u32 *val = _val; _val 702 drivers/rtc/rtc-omap.c static int omap_rtc_scratch_write(void *priv, unsigned int offset, void *_val, _val 706 drivers/rtc/rtc-omap.c u32 *val = _val; _val 467 drivers/s390/net/qeth_core.h #define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val)) _val 470 drivers/s390/net/qeth_core.h #define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val)) _val 6693 drivers/scsi/advansys.c ushort _val; _val 6701 drivers/scsi/advansys.c _val = AscReadLramWord(iop_base, _val 6703 drivers/scsi/advansys.c scsiq->q_status = (uchar)_val; _val 6704 drivers/scsi/advansys.c scsiq->q_no = (uchar)(_val >> 8); _val 6705 drivers/scsi/advansys.c _val = AscReadLramWord(iop_base, _val 6707 drivers/scsi/advansys.c scsiq->cntl = (uchar)_val; _val 6708 drivers/scsi/advansys.c sg_queue_cnt = (uchar)(_val >> 8); _val 6709 drivers/scsi/advansys.c _val = AscReadLramWord(iop_base, _val 6712 drivers/scsi/advansys.c scsiq->sense_len = (uchar)_val; _val 6713 drivers/scsi/advansys.c scsiq->extra_bytes = (uchar)(_val >> 8); _val 223 drivers/scsi/bfa/bfa_ioc.h #define bfa_mem_write(_raddr, _off, _val) \ _val 224 drivers/scsi/bfa/bfa_ioc.h writel(swab32((_val)), ((_raddr) + (_off))) _val 54 drivers/scsi/csiostor/csio_wr.c #define CSIO_SET_FLBUF_SIZE(_hw, _reg, _val) \ _val 55 drivers/scsi/csiostor/csio_wr.c csio_wr_reg32((_hw), (_val), SGE_FL_BUFFER_SIZE##_reg##_A) _val 83 drivers/scsi/cxlflash/superpipe.h #define DECODE_CTXID(_val) (_val & 0xFFFFFFFF) _val 44 drivers/soc/sunxi/sunxi_sram.c #define SUNXI_SRAM_MAP(_reg_val, _val, _func) \ _val 47 drivers/soc/sunxi/sunxi_sram.c .val = _val, \ _val 26 drivers/staging/rtl8188eu/include/basic_types.h #define EF1BYTE(_val) \ _val 27 drivers/staging/rtl8188eu/include/basic_types.h ((u8)(_val)) _val 28 drivers/staging/rtl8188eu/include/basic_types.h #define EF2BYTE(_val) \ _val 29 drivers/staging/rtl8188eu/include/basic_types.h (le16_to_cpu(_val)) _val 30 drivers/staging/rtl8188eu/include/basic_types.h #define EF4BYTE(_val) \ _val 31 drivers/staging/rtl8188eu/include/basic_types.h (le32_to_cpu(_val)) _val 41 drivers/staging/rtl8723bs/include/basic_types.h #define EF1BYTE(_val) \ _val 42 drivers/staging/rtl8723bs/include/basic_types.h ((u8)(_val)) _val 43 drivers/staging/rtl8723bs/include/basic_types.h #define EF2BYTE(_val) \ _val 44 drivers/staging/rtl8723bs/include/basic_types.h (le16_to_cpu(_val)) _val 45 drivers/staging/rtl8723bs/include/basic_types.h #define EF4BYTE(_val) \ _val 46 drivers/staging/rtl8723bs/include/basic_types.h (le32_to_cpu(_val)) _val 58 drivers/staging/rtl8723bs/include/basic_types.h #define WRITEEF1BYTE(_ptr, _val) \ _val 60 drivers/staging/rtl8723bs/include/basic_types.h (*((u8 *)(_ptr))) = EF1BYTE(_val); \ _val 63 drivers/staging/rtl8723bs/include/basic_types.h #define WRITEEF2BYTE(_ptr, _val) \ _val 65 drivers/staging/rtl8723bs/include/basic_types.h (*((u16 *)(_ptr))) = EF2BYTE(_val); \ _val 68 drivers/staging/rtl8723bs/include/basic_types.h #define WRITEEF4BYTE(_ptr, _val) \ _val 70 drivers/staging/rtl8723bs/include/basic_types.h (*((u32 *)(_ptr))) = EF2BYTE(_val); \ _val 111 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8 *)(_val), ((u8 *)(__pHeader))+8) _val 112 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+14) _val 113 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8 *)(_val), ((u8 *)(__pHeader))+18) _val 114 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+24) _val 121 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8 *)(__pHeader))+8, (u8 *)(_val)) _val 122 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8 *)(__pHeader))+14, (u8 *)(_val)) _val 123 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8 *)(__pHeader))+18, (u8 *)(_val)) _val 124 drivers/staging/rtl8723bs/include/hal_com_h2c.h #define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8 *)(__pHeader))+24, (u8 *)(_val)) _val 86 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 2, _val) _val 87 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 0, 1, _val) _val 91 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart), 0, 1, _val) _val 101 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val)) _val 102 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val)) _val 103 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val)) _val 104 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val)) _val 105 drivers/staging/rtl8723bs/include/rtw_ht.h #define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val)) _val 36 drivers/video/fbdev/vermilion/vermilion.c #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16) _val 607 fs/binfmt_elf_fdpic.c struct { unsigned long _id, _val; } __user *ent; \ _val 611 fs/binfmt_elf_fdpic.c __put_user((val), &ent[nr]._val); \ _val 253 include/asm-generic/barrier.h typeof(*ptr) _val; \ _val 254 include/asm-generic/barrier.h _val = smp_cond_load_relaxed(ptr, cond_expr); \ _val 256 include/asm-generic/barrier.h _val; \ _val 44 include/linux/bitfield.h #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ _val 49 include/linux/bitfield.h BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ _val 50 include/linux/bitfield.h ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ _val 65 include/linux/bitfield.h #define FIELD_FIT(_mask, _val) \ _val 67 include/linux/bitfield.h __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \ _val 68 include/linux/bitfield.h !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ _val 79 include/linux/bitfield.h #define FIELD_PREP(_mask, _val) \ _val 81 include/linux/bitfield.h __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ _val 82 include/linux/bitfield.h ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ _val 32 include/rdma/rdma_netlink.h #define MODULE_ALIAS_RDMA_NETLINK(_index, _val) \ _val 35 include/rdma/rdma_netlink.h BUILD_BUG_ON(_index != _val); \ _val 37 include/rdma/rdma_netlink.h MODULE_ALIAS("rdma-netlink-subsys-" __stringify(_val)) _val 939 include/rdma/uverbs_ioctl.h s64 _val; \ _val 940 include/rdma/uverbs_ioctl.h int _ret = _uverbs_get_const(&_val, _attrs_bundle, _idx, \ _val 943 include/rdma/uverbs_ioctl.h (*_to) = _val; \ _val 949 include/rdma/uverbs_ioctl.h s64 _val; \ _val 952 include/rdma/uverbs_ioctl.h _uverbs_get_const(&_val, _attrs_bundle, _idx, \ _val 955 include/rdma/uverbs_ioctl.h (*_to) = _val; \ _val 351 kernel/sched/core.c typeof(*_ptr) _old, _val = *_ptr; \ _val 354 kernel/sched/core.c _old = cmpxchg(_ptr, _val, _val | _mask); \ _val 355 kernel/sched/core.c if (_old == _val) \ _val 357 kernel/sched/core.c _val = _old; \ _val 2791 kernel/sched/fair.c #define add_positive(_ptr, _val) do { \ _val 2793 kernel/sched/fair.c typeof(_val) val = (_val); \ _val 2811 kernel/sched/fair.c #define sub_positive(_ptr, _val) do { \ _val 2813 kernel/sched/fair.c typeof(*ptr) val = (_val); \ _val 2827 kernel/sched/fair.c #define lsub_positive(_ptr, _val) do { \ _val 2829 kernel/sched/fair.c *ptr -= min_t(typeof(*ptr), *ptr, _val); \ _val 27 net/6lowpan/nhc.h static u8 __nhc##_val[_idlen]; \ _val 33 net/6lowpan/nhc.h .id = __nhc##_val, \ _val 115 net/ipv4/gre_demux.c u8 _val, *val; _val 118 net/ipv4/gre_demux.c sizeof(_val), &_val); _val 187 sound/pci/hda/patch_realtek.c #define UPDATE_COEFEX(_nid, _idx, _mask, _val) \ _val 188 sound/pci/hda/patch_realtek.c { .nid = (_nid), .idx = (_idx), .mask = (_mask), .val = (_val) } _val 189 sound/pci/hda/patch_realtek.c #define WRITE_COEFEX(_nid, _idx, _val) UPDATE_COEFEX(_nid, _idx, -1, _val) _val 190 sound/pci/hda/patch_realtek.c #define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val) _val 191 sound/pci/hda/patch_realtek.c #define UPDATE_COEF(_idx, _mask, _val) UPDATE_COEFEX(0x20, _idx, _mask, _val) _val 1378 tools/perf/util/bpf-loader.c u8 _val = (u8)(val); _val 1379 tools/perf/util/bpf-loader.c err = bpf_map_update_elem(map_fd, pkey, &_val, BPF_ANY); _val 1383 tools/perf/util/bpf-loader.c u16 _val = (u16)(val); _val 1384 tools/perf/util/bpf-loader.c err = bpf_map_update_elem(map_fd, pkey, &_val, BPF_ANY); _val 1388 tools/perf/util/bpf-loader.c u32 _val = (u32)(val); _val 1389 tools/perf/util/bpf-loader.c err = bpf_map_update_elem(map_fd, pkey, &_val, BPF_ANY); _val 685 virt/kvm/eventfd.c u64 _val; _val 709 virt/kvm/eventfd.c _val = *(u8 *)val; _val 712 virt/kvm/eventfd.c _val = *(u16 *)val; _val 715 virt/kvm/eventfd.c _val = *(u32 *)val; _val 718 virt/kvm/eventfd.c _val = *(u64 *)val; _val 724 virt/kvm/eventfd.c return _val == p->datamatch ? true : false;