Lines Matching refs:no

46 	there will be no entries in the TLB for 'mm'.
60 	running, there will be no entries in the TLB for 'mm' for
85 	is, after running, there will be no entries in the TLB for
140 indexed physically tagged caches of IA32 processors have no need to
142 and have no dependency on translation information.
149 	the caches.  That is, after running, there will be no cache
158 	the caches.  That is, after running, there will be no cache
171 	addresses from the cache.  After running, there will be no
199 	After running, there will be no entries in the cache for
211 	After running, there will be no entries in the cache for
222 	there will be no entries in the cache for the kernel address
314 	the actual flush if there are currently no user processes
361 	page up to date.  It is assumed here that the user has no