Lines Matching refs:idle
2 ARM idle states binding description
12 the range of dynamic idle states that a processor can enter at run-time, can be
14 to enter/exit specific idle states on a given processor.
27 PM implementation to put the processor in different idle states (which include
28 states listed above; "off" state is not an idle state since it does not have
35 The device tree binding definition for ARM idle states is the subject of this
39 2 - idle-states definitions
44 triggered upon idle states entry and exit.
47 properties required to enter and exit an idle state:
59 Diagram 1: CPU idle state execution phases
63 PREP: Preparation phase before committing the hardware to idle mode
70 ENTRY: The hardware is committed to idle mode. This period must run
73 IDLE: This is the actual energy-saving idle period. This may last
79 entry-latency: Worst case latency required to enter the idle state. The
83 idle state to be worthwhile energywise.
91 An idle CPU requires the expected min-residency time to select the most
92 appropriate idle state based on the expected expiry time of the next IRQ
97 of an idle state, eg:
112 idle state, and possibly to prevent that to guarantee reliable device
145 and denotes the energy costs incurred whilst entering and leaving the idle
148 shallower slope and essentially represents the energy consumption of the idle
151 min-residency is defined for a given idle state as the minimum expected
157 For sake of simplicity, let's consider a system with two idle states IDLE1,
183 Graph 2: idle states min-residency example
185 In graph 2 above, that takes into account idle states entry/exit energy
186 costs, it is clear that if the idle state residency time (ie time till next
187 wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state
193 However, the lower power consumption (ie shallower energy curve slope) of idle
198 shallower states in a system with multiple idle states) is defined
202 The definitions provided in this section underpin the idle states
206 3 - idle-states node
209 ARM processor idle states are defined within the idle-states node, which is
211 processor idle states, defined as device tree nodes, are listed.
213 - idle-states node
215 Usage: Optional - On ARM systems, it is a container of processor idle
218 supports idle_standby an idle-states node is not
221 Description: idle-states node is a container node, where its
222 subnodes describe the CPU idle states.
224 Node name must be "idle-states".
226 The idle-states node's parent node must be the cpus node.
228 The idle-states node's child nodes can be:
234 An idle-states node defines the following properties:
244 The nodes describing the idle states (state) can only be defined within the
245 idle-states node, any other configuration is considered invalid and therefore
252 A state node represents an idle state description and must be defined as
257 Description: must be child of the idle-states node
263 The idle state entered by executing the wfi instruction (idle_standby
273 Definition: Must be "arm,idle-state".
285 microseconds required to enter the idle state.
293 in microseconds required to exit the idle state.
300 entry, for this idle state to be considered
324 the operational status of an idle-state.
326 "okay": to indicate that the idle state is
328 "disabled": to indicate that the idle state has
331 If the property is not present the idle-state must
334 - idle-state-name:
337 Definition: A string used as a descriptive name for the idle
342 idle-states node, please refer to the entry-method bindings
360 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
369 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
378 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
387 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
396 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
405 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
414 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
423 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
432 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
441 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
450 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
459 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
468 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
477 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
486 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
495 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
499 idle-states {
503 compatible = "arm,idle-state";
511 compatible = "arm,idle-state";
521 compatible = "arm,idle-state";
530 compatible = "arm,idle-state";
540 compatible = "arm,idle-state";
548 compatible = "arm,idle-state";
558 compatible = "arm,idle-state";
568 compatible = "arm,idle-state";
590 cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
597 cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
604 cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
611 cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
618 cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;
625 cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;
632 cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;
639 cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;
642 idle-states {
644 compatible = "arm,idle-state";
653 compatible = "arm,idle-state";
662 compatible = "arm,idle-state";
671 compatible = "arm,idle-state";