Lines Matching refs:pll

49 	"atmel,at91rm9200-clk-pll" or
50 	"atmel,at91sam9g45-clk-pll" or
52 	"atmel,sama5d3-clk-pll":
53 		at91 pll clocks
280 Required properties for pll clocks:
285 - reg : pll id.
291 - #atmel,pll-clk-output-range-cells : number of cells reserved for pll output
299 - atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter
300 				depending on #atmel,pll-output-range-cells
305 		compatible = "atmel,at91sam9g45-clk-pll";
312 		#atmel,pll-clk-output-range-cells = <4>;
313 		atmel,pll-clk-output-ranges = <74500000 800000000 0 0
323 Required properties for plldiv clocks (plldiv = pll / 2):
327 The pll divisor is equal to 2 and cannot be changed.