Lines Matching refs:mmc

28 - cap-mmc-highspeed: MMC high-speed timing is supported
37 - mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
38 - mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
39 - mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
40 - mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
41 - mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
42 - mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
76 - mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*"
116 	mmc-pwrseq = <&sdhci0_pwrseq>
121 mmc3: mmc@01c12000 {
130 	mmc-pwrseq = <&sdhci0_pwrseq>