Lines Matching refs:descriptor
6 processors(PDSP), linking RAM, descriptor pools and infrastructure
10 reading descriptor address to a particular memory mapped location. The PDSPs
13 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
15 queue pool management (allocation, push, pop and notify) and descriptor
46 as free descriptor queues or the
65 the buffer for descriptor information. This firmware
74 entries : Size of the accumulator descriptor list
84 - descriptor-regions : child node describing the memory regions for keystone
90 <"# of descriptors" "descriptor size">.
92 descriptor in the region.
209 descriptor-regions {