Lines Matching refs:as
20 non-dedicated pin can be configured as a GPIO; and most chips have at least
36 of pins configured as "output", which is very useful in such "wire-OR"
40 - Inputs can often be used as IRQ signals, often edge triggered but
41 sometimes level triggered. Such IRQs may be configurable as system
44 - Usually a GPIO will be configurable as either input or output, as needed
67 One platform might implement it as simple inline functions accessing chip
71 in this document, but drivers acting as clients to the GPIO interface must
78 GPIO calls are available, either as "real code" or as optimized-away stubs,
93 reserves "negative" numbers for other purposes like marking signals as
95 touch the underlying hardware treats these integers as opaque cookies.
122 implementation issue, as are whether that support can leave "holes" in the space
134 /* set as input or output, returning 0 or negative errno */
142 before tasking is enabled, as part of early board setup.
156 that board setup code probably needs to multiplex that pin as a GPIO,
223 the same as the spinlock-safe calls.
255 Passing invalid GPIO numbers to gpio_request() will fail, as will requesting
259 before tasking is enabled, as part of early board setup.
262 are actually in use as GPIOs, for better diagnostics; systems may have
268 GPIO can serve as a kind of lock.
271 power management, such as by powering down unused chip sectors and, more
289 Similarly, other aspects of the GPIO or pin may need to be configured, such as
317 * GPIOF_DIR_IN - to configure direction as input
318 * GPIOF_DIR_OUT - to configure direction as output
320 * GPIOF_INIT_LOW - as output, set initial level to LOW
321 * GPIOF_INIT_HIGH - as output, set initial level to HIGH
328 since GPIOF_INIT_* are only valid when configured as output, so group valid
329 combinations as:
331 * GPIOF_IN - configure as input
332 * GPIOF_OUT_INIT_LOW - configured as output, initial level LOW
333 * GPIOF_OUT_INIT_HIGH - configured as output, initial level HIGH
335 When setting the flag as GPIOF_OPEN_DRAIN then it will assume that pins is
341 When setting the flag as GPIOF_OPEN_SOURCE then it will assume that pins is
350 introduced to encapsulate all three fields as:
393 some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO
394 number that wasn't set up as an input using gpio_direction_input(), or
403 options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are
426 be used as either an input or an output:
480 exact name string of pinctrl device has to be passed as one of the
499 platform-specific issue, as are models like (not) having a one-to-one
508 from pins not managed as GPIOs. Code relying on such mechanisms will
511 Dynamic definition of GPIOs is not currently standard; for example, as
528 In this framework each GPIO controller is packaged as a "struct gpio_chip"
546 not exposed by the GPIO interfaces, such as addressing, power management,
547 and more. Chips such as codecs will have complex non-GPIO state.
550 requested as GPIOs. They can use gpiochip_is_requested(), which returns
582 Fancier implementations could instead define those as inline functions with
585 cost as little as two or three instructions, never sleeping. When such an
595 available, from arch_initcall() or earlier; they can often serve as IRQs.
600 For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
680 "direction" ... reads as either "in" or "out". This value may
681 normally be written. Writing as "out" defaults to
682 initializing the value as low. To ensure glitch free
684 configure the GPIO as an output with that initial value.
691 "value" ... reads as either 0 (low) or 1 (high). If the GPIO
692 is configured as an output, this value may be written;
693 any nonzero value is treated as high.
695 If the pin can be configured as interrupt-generating interrupt
705 "edge" ... reads as either "none", "rising", "falling", or
709 This file exists only if the pin can be configured as an
712 "active_low" ... reads as either 0 (false) or 1 (true). Write
725 "base" ... same as N, the first GPIO managed by this chip
764 suitable for documenting as part of a board support package.