Lines Matching refs:instructions
105 instructions it emits in any order it likes, provided it doesn't affect the
1175 DIVIDE } Divide instructions generally
1570 16-bit store instructions with 7-bit immediate fields, the compiler
1571 might be tempted to use two 16-bit store-immediate instructions to
1578 than two instructions to build the constant and then store it.
1818 one-way barriers is that the effects of instructions outside of a critical
2357 compiler barrier, thus making sure the compiler emits the instructions in the
2447 situations because on some CPUs the atomic instructions used imply full memory
2448 barriers, and so barrier instructions are superfluous in conjunction with them,
2544 indeed have special I/O space access cycles and instructions, but many
2621 [*] Some instructions have more than one effect - such as changing the
2623 instructions may depend on different effects.
2626 ultimate effect. For example, if two adjacent instructions both load an
2676 The CPU core may execute instructions in any order it deems fit, provided the
2677 expected program causality appears to be maintained. Some of the instructions
2693 the use of any special device communication instructions the CPU may have.
2952 special ld.acq and st.rel instructions that prevent such reordering.