Lines Matching refs:the
7 The coherent accelerator interface is designed to allow the
9 POWER system. These devices need to adhere to the Coherent
12 IBM refers to this as the Coherent Accelerator Processor Interface
13 or CAPI. In the kernel it's referred to by the name CXL to avoid
14 confusion with the ISDN CAPI subsystem.
16 Coherent in this context means that the accelerator and CPUs can
17 both access system memory directly and with the same effective
38 unit which is part of the PCIe Host Bridge (PHB). This is managed
39 by Linux by calls into OPAL. Linux doesn't directly program the
43 The POWER Service Layer (PSL) and the Accelerator Function Unit
45 the PSL. The PSL, among other things, provides memory address
49 The AFU is the core part of the accelerator (eg. the compression,
50 crypto etc function). The kernel has no knowledge of the function
51 of the AFU. Only userspace interacts directly with the AFU.
53 The PSL provides the translation and interrupt services that the
54 AFU needs. This is what the kernel interacts with. For example, if
55 the AFU needs to read a particular effective address, it sends
56 that address to the PSL, the PSL then translates it, fetches the
57 data from memory and returns it to the AFU. If the PSL has a
58 translation miss, it interrupts the kernel and the kernel services
59 the fault. The context to which this fault is serviced is based on
66 There are two programming modes supported by the AFU. Dedicated
70 this mode, only one userspace process can use the accelerator at
75 applications may use the accelerator (although specific AFUs may
76 support fewer). In this mode, the AFU sends a 16 bit context ID
77 with each of its requests. This tells the PSL which context is
78 associated with each operation. If the PSL can't translate an
79 operation, the ID can also be accessed by the kernel so it can
80 determine the userspace context associated with an operation.
86 A portion of the accelerator MMIO space can be directly mapped
87 from the AFU to userspace. Either the whole space can be mapped or
89 the kernel can determine the offset and size of the per context
97 are received by the kernel as hardware interrupts and passed onto
100 Data storage faults and error interrupts are handled by the kernel
107 The WED is a 64-bit parameter passed to the AFU when a context is
108 started. Its format is up to the AFU hence the kernel has no
109 knowledge of what it represents. Typically it will be the
110 effective address of a work queue or status block where the AFU
122 context. Master contexts have access to the full MMIO space an
123 AFU provides. Slave contexts have access to only the per process
126 For AFUs operating in dedicated process mode, the driver will
128 /dev/cxl/afu0.0d. This will have access to the entire MMIO space
129 that the AFU provides (like master contexts in AFU directed).
140 Opens the device and allocates a file descriptor to be used with
141 the rest of the API.
143 A dedicated mode AFU only has one context and only allows the
146 An AFU directed mode AFU can have many contexts, the device can be
149 When all available contexts are allocated the open call will fail
153 the number of contexts that can be created, and therefore
154 how many times the device can be opened. The POWER8 CAPP
155 supports 2040 IRQs and 3 are used by the kernel, so 2037 are
165 Starts the AFU context and associates it with the current
168 using the same effective addresses. No additional calls are
171 returns once the AFU context is started.
189 Indicates which optional fields in the structure are
194 defined by the AFU. Typically this is an effective
199 Authority Mask Register (AMR), same as the powerpc
200 AMR. This field is only used by the kernel when the
202 flags. If not specified the kernel will use a default
207 is only used by the kernel when the corresponding
209 If not specified the minimum number required by the
217 Get the current context id, also known as the process element.
218 The value is returned from the kernel as a __u32.
224 An AFU may have an MMIO space to facilitate communication with the
225 AFU. If it does, the MMIO space can be accessed via mmap. The size
226 and contents of this area are specific to the particular AFU. The
230 the MMIO space and slave contexts are allowed to only map the per
231 process MMIO space associated with the context. In dedicated
232 process mode the entire MMIO space can always be mapped.
234 This mmap call must be done after the START_WORK ioctl.
237 accesses are supported by POWER8. Also, the AFU will be designed
241 queues the WED may describe.
247 Reads events from the AFU. Blocks if no events are pending
248 (unless O_NONBLOCK is supplied). Returns -EIO in the case of an
249 unrecoverable error or if the card is removed.
255 The result of the read will be a buffer of one or more events,
277 This defines the type of event. The type determines how
278 the rest of the event is structured. These types are
282 This is the size of the event in bytes including the
283 struct cxl_event_header. The start of the next event can
284 be found at this offset from the start of the current
288 Context ID of the event.
293 If the event type is CXL_EVENT_AFU_INTERRUPT then the event
307 The IRQ number sent by the AFU.
312 If the event type is CXL_EVENT_DATA_STORAGE then the event
329 The address that the AFU unsuccessfully attempted to
330 access. Valid accesses will be handled transparently by the
334 This field gives information on the type of fault. It is a
335 copy of the DSISR from the PSL hardware when the address
336 fault occurred. The form of the DSISR is as defined in the
342 If the event type is CXL_EVENT_AFU_ERROR then the event structure
357 Error status from the AFU. Defined by the AFU.
366 enumeration and tuning of the accelerators. Its layout is
372 The following udev rules could be used to create a symlink to the
374 dedicated, afuX.Ys for afu directed), since the API is virtually