Lines Matching refs:as

16 on this timeline, providing facilities such as high-resolution timers.
31 It will ideally NEVER stop ticking as long as the system is running. It
34 The clock source shall have as high resolution as possible, and the frequency
35 shall be as stable and correct as possible as compared to a real-world wall
54 into a nanosecond value as an unsigned long long (unsigned 64 bit) number.
56 mathematical sense is not desirable: instead the number is taken as close as
63 to aid in providing these mult and shift values, such as
67 factors using the frequency of the clock source as the only input.
94 fire interrupts, so as to trigger events on the system timeline. On an SMP
114 implementation is not provided, the system jiffy counter will be used as
126 characteristics as the clock source, i.e. it should be monotonic.
149 same counter that is also used as clock source is used for this purpose.
153 Some hardware (such as the x86 TSC) will cause the sched_clock() function to
168 is calibrated: as an effect when the frequency is geared down to half the
169 full frequency, any delay() will be twice as long. Usually this does not
170 hurt, as you're commonly requesting that amount of delay *or more*. But