Lines Matching refs:write_aux_reg
111 write_aux_reg(ARC_REG_TLBPD1, 0); in __tlb_entry_erase()
112 write_aux_reg(ARC_REG_TLBPD0, 0); in __tlb_entry_erase()
113 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); in __tlb_entry_erase()
120 write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid); in tlb_entry_lkup()
122 write_aux_reg(ARC_REG_TLBCOMMAND, TLBProbe); in tlb_entry_lkup()
175 write_aux_reg(ARC_REG_TLBINDEX, 0xa); in utlb_invalidate()
178 write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB); in utlb_invalidate()
200 write_aux_reg(ARC_REG_TLBCOMMAND, TLBGetIndex); in tlb_entry_insert()
203 write_aux_reg(ARC_REG_TLBPD1, pd1); in tlb_entry_insert()
210 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); in tlb_entry_insert()
226 write_aux_reg(ARC_REG_TLBPD1, 0); in local_flush_tlb_all()
227 write_aux_reg(ARC_REG_TLBPD0, 0); in local_flush_tlb_all()
231 write_aux_reg(ARC_REG_TLBINDEX, entry); in local_flush_tlb_all()
232 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); in local_flush_tlb_all()
646 write_aux_reg(ARC_REG_PID, MMU_ENABLE); in arc_mmu_init()
651 write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir); in arc_mmu_init()
693 write_aux_reg(ARC_REG_PID, MMU_ENABLE | read_aux_reg(ARC_REG_PID)); in do_tlb_overlap_fault()
700 write_aux_reg(ARC_REG_TLBINDEX, in do_tlb_overlap_fault()
702 write_aux_reg(ARC_REG_TLBCOMMAND, TLBRead); in do_tlb_overlap_fault()
734 write_aux_reg(ARC_REG_TLBINDEX, in do_tlb_overlap_fault()