Lines Matching refs:clock
56 clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
58 clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
59 <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
60 <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>,
61 <&clock CLK_XUSBXTI>;
62 #clock-cells = <1>;
115 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
116 clock-names = "fin_pll", "mct";
131 clock: clock-controller@10030000 { label
132 compatible = "samsung,exynos4210-clock";
134 #clock-cells = <1>;
165 clocks = <&clock CLK_TMU_APBIF>;
166 clock-names = "tmu_apbif";
196 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
197 clock-names = "sclk_fimg2d", "fimg2d";
202 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
203 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
204 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
233 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
235 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
236 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
237 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
243 clocks = <&clock CLK_PPMULCD1>;
244 clock-names = "ppmu";