Lines Matching refs:clock
16 #include <dt-bindings/clock/exynos5420.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
62 clock-frequency = <1800000000>;
70 clock-frequency = <1800000000>;
78 clock-frequency = <1800000000>;
86 clock-frequency = <1800000000>;
94 clock-frequency = <1000000000>;
102 clock-frequency = <1000000000>;
110 clock-frequency = <1000000000>;
118 clock-frequency = <1000000000>;
160 clock: clock-controller@10010000 { label
161 compatible = "samsung,exynos5420-clock";
163 #clock-cells = <1>;
166 clock_audss: audss-clock-controller@3810000 {
167 compatible = "samsung,exynos5420-audss-clock";
169 #clock-cells = <1>;
170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
179 clocks = <&clock CLK_MFC>;
180 clock-names = "mfc";
190 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
191 clock-names = "biu", "ciu";
202 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
203 clock-names = "biu", "ciu";
214 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
215 clock-names = "biu", "ciu";
228 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
229 clock-names = "fin_pll", "mct";
254 clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
255 clock-names = "asb0", "asb1";
267 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
268 <&clock CLK_MOUT_USER_ACLK333>;
269 clock-names = "oscclk", "pclk0", "clk0";
283 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK200>,
284 <&clock CLK_MOUT_USER_ACLK200_DISP1>,
285 <&clock CLK_MOUT_SW_ACLK300>,
286 <&clock CLK_MOUT_USER_ACLK300_DISP1>,
287 <&clock CLK_MOUT_SW_ACLK400>,
288 <&clock CLK_MOUT_USER_ACLK400_DISP1>,
289 <&clock CLK_FIMD1>, <&clock CLK_MIXER>;
290 clock-names = "oscclk", "pclk0", "clk0",
332 clocks = <&clock CLK_RTC>;
333 clock-names = "rtc";
350 clock-names = "apb_pclk";
360 clocks = <&clock CLK_PDMA0>;
361 clock-names = "apb_pclk";
371 clocks = <&clock CLK_PDMA1>;
372 clock-names = "apb_pclk";
382 clocks = <&clock CLK_MDMA0>;
383 clock-names = "apb_pclk";
393 clocks = <&clock CLK_MDMA1>;
394 clock-names = "apb_pclk";
418 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
431 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
432 clock-names = "iis", "i2s_opclk0";
444 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
445 clock-names = "iis", "i2s_opclk0";
462 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
463 clock-names = "spi", "spi_busclk0";
478 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
479 clock-names = "spi", "spi_busclk0";
494 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
495 clock-names = "spi", "spi_busclk0";
500 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
501 clock-names = "uart", "clk_uart_baud0";
505 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
506 clock-names = "uart", "clk_uart_baud0";
510 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
511 clock-names = "uart", "clk_uart_baud0";
515 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
516 clock-names = "uart", "clk_uart_baud0";
524 clocks = <&clock CLK_PWM>;
525 clock-names = "timers";
535 clocks = <&clock CLK_DP1>;
536 clock-names = "dp";
554 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
555 clock-names = "bus_clk", "pll_clk";
562 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
563 clock-names = "sclk_fimd", "fimd";
571 clocks = <&clock CLK_TSADC>;
572 clock-names = "adc";
585 clocks = <&clock CLK_I2C0>;
586 clock-names = "i2c";
599 clocks = <&clock CLK_I2C1>;
600 clock-names = "i2c";
613 clocks = <&clock CLK_I2C2>;
614 clock-names = "i2c";
627 clocks = <&clock CLK_I2C3>;
628 clock-names = "i2c";
643 clocks = <&clock CLK_USI0>;
644 clock-names = "hsi2c";
656 clocks = <&clock CLK_USI1>;
657 clock-names = "hsi2c";
669 clocks = <&clock CLK_USI2>;
670 clock-names = "hsi2c";
682 clocks = <&clock CLK_USI3>;
683 clock-names = "hsi2c";
695 clocks = <&clock CLK_USI4>;
696 clock-names = "hsi2c";
708 clocks = <&clock CLK_USI5>;
709 clock-names = "hsi2c";
721 clocks = <&clock CLK_USI6>;
722 clock-names = "hsi2c";
730 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
731 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
732 <&clock CLK_MOUT_HDMI>;
733 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
749 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
750 <&clock CLK_SCLK_HDMI>;
751 clock-names = "mixer", "hdmi", "sclk_hdmi";
759 clocks = <&clock CLK_GSCL0>;
760 clock-names = "gscl";
768 clocks = <&clock CLK_GSCL1>;
769 clock-names = "gscl";
776 clock-names = "clkout16";
777 clocks = <&clock CLK_FIN_PLL>;
778 #clock-cells = <1>;
793 clocks = <&clock CLK_TMU>;
794 clock-names = "tmu_apbif";
802 clocks = <&clock CLK_TMU>;
803 clock-names = "tmu_apbif";
811 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
812 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
820 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
821 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
829 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
830 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
861 clocks = <&clock CLK_WDT>;
862 clock-names = "watchdog";
870 clocks = <&clock CLK_SSS>;
871 clock-names = "secss";
876 clocks = <&clock CLK_USBD300>;
877 clock-names = "usbdrd30";
894 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
895 clock-names = "phy", "ref";
902 clocks = <&clock CLK_USBD301>;
903 clock-names = "usbdrd30";
920 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
921 clock-names = "phy", "ref";
931 clocks = <&clock CLK_USBH20>;
932 clock-names = "usbhost";
946 clocks = <&clock CLK_USBH20>;
947 clock-names = "usbhost";
959 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
960 clock-names = "phy", "ref";